Commit Graph

4 Commits

Author SHA1 Message Date
Eric Anholt
b1a8b3979c broadcom/vc5: Lay out MSAA textures/renderbuffers as UIF scaled by 4.
We just need to multiply width/height by 2 each, and always set them up as
UIF tiling, since that's how the TLB will store them in raw (per-sample)
mode.
2017-10-30 13:31:27 -07:00
Eric Anholt
bacbcafec1 broadcom/vc5: Always set up 1D textures as raster order.
1D is the exception to "all V3D textures are tiled", since tiling 1D
textures would just waste memory and cache space.  This ended up being a
problem once we started actually marking 1D textures as 1D instead of 2D.
2017-10-30 13:31:15 -07:00
Eric Anholt
dbf9e4fbf8 broadcom/vc5: Remove the u_resource_vtbl usage.
Like for vc4, this was just a wasted indirection.
2017-10-12 12:44:27 -07:00
Eric Anholt
45bb8f2957 broadcom: Add V3D 3.3 gallium driver called "vc5", for BCM7268.
V3D 3.3 is a continuation of the 3D implementation in VC4 (v2.1 and v2.6).
V3D 3.3 introduces an MMU (no more CMA allocations) and support for
GLES3.1.  This driver is not currently conformant, though that will be a
target as soon as possible.

V3D 3.x parts use a new texture tiling layout common across many Broadcom
graphics parts including and the HVS scanout engine.  It also massively
changes the QPU instructions, introducing a common physical register file
(no more A/B split) and half-float instructions, while removing the 4x8
unorm instructions in favor of half-float for talking to fixed function
interfaces.  Because so much has changed, vc5 is implemented in a separate
gallium driver, using only the XML code-generation support from vc4.

v2: Fix tile layout for 64bpp textures.  Fix texture swizzling for 32-bit
    returns.  Fix up a bit of MRT setup.  Sync the simulator to kernel
    behavior a bit more.  Improve uniform debugging code.  Rebase on
    QIR->VIR rename.  Move texture state mostly to the CSOs.  Improve
    cache flushing on the simulator.  Fix program deletion
    use-after-frees.

Acked-by: Dave Airlie <airlied@gmail.com> (uabi plan)
Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> (uabi plan)
2017-10-10 11:42:04 -07:00