Commit Graph

165153 Commits

Author SHA1 Message Date
Sil Vilerino
fb0038f489 frontends/va: Update state var frame_num disregarding cap check
The frame_num variable must be updated for encode entrypoint disregarding
the outcome of the PIPE_VIDEO_CAP_REQUIRES_FLUSH_ON_END_FRAME cap check

fixes: 229c6f79a6 ("frontends/va: Implement vaSyncBuffer")

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20490>
2023-01-03 16:26:27 +00:00
Rhys Perry
1825ad134b radeonsi,radv/llvm: fix amdgpu-color/depth-export with epilogs
The main shader wouldn't use ac_build_export(), and the discard exit would
have no export.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Fixes: 1174ab6d56 ("ac/llvm: use amdgpu-color-export/amdgpu-depth-export")
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Mikhail Gavrilov <mikhail.v.gavrilov@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7991
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20482>
2023-01-03 15:32:56 +00:00
David Heidelberg
c68530bedb postprocess: move the definition of pp_filters into **/pp_init.c
An LTO-friendly move.

Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7881

Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20374>
2023-01-03 14:45:28 +00:00
David Heidelberg
f43cd04228 ci: build test LTO
Reviewed-by: Adam Jackson <ajax@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20374>
2023-01-03 14:45:28 +00:00
Mike Blumenkrantz
7ab5c5d36d zink: use EXT_descriptor_buffer with ZINK_DESCRIPTORS=db
this should be bug-free, as it passes cts/piglit/gaming on multiple drivers,
but since it's new, it stays behind an env var for at least one release

Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20489>
2023-01-03 09:20:45 -05:00
Mike Blumenkrantz
20e1474c2c zink: move some descriptor data into a substruct
no functional changes

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20489>
2023-01-03 09:19:31 -05:00
Mike Blumenkrantz
885e5a3571 Revert "zink: remove descriptor-mode selection infrastructure"
this would've been in-use, but khronos changes while I was on vacation
blocked a merge

This reverts commit 3f371d4e94.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20489>
2023-01-03 09:19:31 -05:00
Tapani Pälli
97f2b60833 anv: implement Wa_14015814527 for task shaders
After using task shader, we need to emit a zero URB state and a
nullprim (empty pipe control) before rendering with primitives.

After this, a normal URB state needs to be returned, this will
happen when pipeline batch is emitted during pipeline switch.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20334>
2023-01-03 12:44:08 +00:00
Pavel Ondračka
53d9b696e4 nir: basic tests for nir_opt_shrink_vectors
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20213>
2023-01-03 12:32:33 +01:00
Pavel Ondračka
3305c9602d nir: fix shrinking of load_const for large vectors
Specifically when shrinking load_const with number of components
> 5, if the final number of components is not allowed (for example 8->6)
it would report false for progress even if we actually did some
reshuffling and also it would skip on the rewrite of the readers.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20213>
2023-01-03 12:32:33 +01:00
Pavel Ondračka
cb7f201288 nir: remove duplicate alu channels in nir_opt_shrink_vectors
This will clean code like:
   vec3 32 ssa_8 = frcp ssa_7.www
   vec3 32 ssa_9 = fmul ssa_7.xyz, ssa_8
into
   vec1 32 ssa_8 = frcp ssa_7.w
   vec3 32 ssa_9 = fmul ssa_7.xyz, ssa_8.xxx

This helps r300 driver because we can only do single channel for math
ops at a time, so the first version would result in three frcp
instructions. The nir_opt_shrink_vectors comments even claim the pass
should be doing this, however it actually does it only for nir_op_vecx
instructions, so extend this for generic alu instructions.

RV530 shader-db:
total instructions in shared programs: 135032 -> 133707 (-0.98%)
instructions in affected programs: 46121 -> 44796 (-2.87%)
helped: 452
HURT: 26
total temps in shared programs: 17051 -> 17033 (-0.11%)
temps in affected programs: 1509 -> 1491 (-1.19%)
helped: 91
HURT: 30

12.02->12.08 (+0.5%) fps gain in Unigine Sanctuary (n=5) with RV530

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7051
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reiewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20213>
2023-01-03 12:32:33 +01:00
Alyssa Rosenzweig
980df9ede1 pan/bi: Move Bifrost specific C code to src/compiler/bifrost
The goal is to make files at the root of src/compiler/ apply to both Bifrost and
Valhall, while ISA-specific code (e.g. instruction packing) code goes in
compiler/bifrost/ or compiler/valhall/. This is what Valhall is already doing,
the Bifrost specific stuff was just grandfathered in.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20455>
2023-01-02 17:54:49 +00:00
Alyssa Rosenzweig
551c2aadd4 pan/bi: Remove standalone compiler
This functionality is now available on Linux with drm-shim + shader-db, and I
suspect the version bundled here is broken anyway. Strictly this drops
Windows/macOS support for the known-broken frontend to the shader compiler but I
can't say I'm terribly worried about that.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20455>
2023-01-02 17:54:48 +00:00
Alyssa Rosenzweig
1a35acd8d9 pan/bi: Rename panfrost/bifrost -> panfrost/compiler
This is the compiler for both Bifrost and Valhall, and presumably future
Mali GPUs too. Give it a more generic name so we can use the bifrost/ path for
something a bit more specific.

For historical reasons the compiler's name is still "bifrost" and uses the
prefix `bi_`. I think that's ok in the same way that i915 in the kernel supports
way more than just i915.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20455>
2023-01-02 17:54:48 +00:00
Sviatoslav Peleshko
261a334509 hasvk: Add layer with work-around for Doom 64 texture corruption
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7817
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19502>
2023-01-02 15:05:06 +00:00
Sviatoslav Peleshko
c2acd9f76a anv: Add layer with work-around for Doom 64 texture corruption
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7817
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19502>
2023-01-02 15:05:06 +00:00
Konstantin Seurer
28ee90bc7f radv: Add an app layer driconf and use it for Metro Exodus
To make adding more application layers easier.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>
2023-01-02 14:39:23 +00:00
Konstantin Seurer
1525063055 radv: Clean up entrypoints generation
This should make it easier to add new tracing and application layers.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>
2023-01-02 14:39:23 +00:00
Konstantin Seurer
124a405f6f radv: Use multiple dispatch tables for layers
Every layer has its own dispatch table that it can use to call down the
layer stack. This allows us to use RRA and RGP tracing simultaneously.
Using application layers with tracing should work as well.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>
2023-01-02 14:39:23 +00:00
Konstantin Seurer
0821f76fd7 radv: Move dispatch table init into a separate function
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>
2023-01-02 14:39:23 +00:00
Konstantin Seurer
b0e55c4d60 vulkan: Allow passing NULL dispatch tables to vk_device_init
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20439>
2023-01-02 14:39:23 +00:00
Gert Wollny
8ad6b10a01 r600: Don't merge alu groups with variable length dot using t-slot
Since the variable length dot must stay in its slot configuration
do not try to merge the group with the previous group when an op may be
moved to the t slot, because this may lead to breaking the multi-slot
operation.

Fixes:  357e5fac99
   r600/sfn: Use variable length DOT on Evergreen and Cayman

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
9fd9f3cd10 r600/sfn: Set minimum required registers based on array allocation
In the rare case that after register allocation the highest directly
accessed register index is below the highest value used for an
indirectly accessed array we have to ensure that the shader allocates
enough registers to account for these indices that are not seen by the
assembler.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7966
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
8348c9c84d r600: enable ARB_gl_spirv
76 out of 86 piglits pass.
Some fail because SSBOs are only supported for FS and CS on r600, but
the piglits try to use SSBOs with VS, and there are piglits that try to
bind SSBO at 8, and only 0-7 is supported as binding point.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
0ff00cfe97 r600: Fix early exit when setting SSBOs
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
ff4de13c70 r600/sfn: Fix FS primid input slot
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
c69f2fe5fd r600/sfn: Fix warning for mixed use of enum and integer
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
2df023a1f1 r600/sfn: pre-evaluate allowed dest mask in Alu instructions
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Gert Wollny
e2eb7cd3d8 r600/sfn: move handling of legacy math rules to assembler
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20451>
2023-01-02 14:31:35 +00:00
Erico Nunes
46a493a2f0 st/mesa: Fix free of non-shareable shaders on context destroy
On drivers that do not set PIPE_CAP_SHAREABLE_SHADERS,
st_destroy_program_variants() may reach st_save_zombie_shader()
which accesses st->zombie_shaders.mutex.
Destroying st->zombie_shaders.mutex before destroying program variants
may result in an invalid access in a multiple context scenario for
those drivers.
Move the mutex destroy call to after program variants destroy so that
it doesn't hit a deadlock on context destroy.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20458>
2023-01-02 13:50:52 +00:00
Rhys Perry
1174ab6d56 ac/llvm: use amdgpu-color-export/amdgpu-depth-export
These are necessary to use the correct export target on GFX11:
https://reviews.llvm.org/D128185

Fixes artifacts on Lara in Rise of the Tomb Raider benchmark and hair in
The Witcher 3 (classic).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20357>
2023-01-02 12:00:04 +00:00
Timur Kristóf
d496f0b97d radv: Decouple radv_before_taskmesh_draw from radv_before_draw.
radv_before_taskmesh_draw will no longer call radv_before_draw and
instead implement the necessary functionality on its own.

radv_before_draw will no longer have to emit mesh shader descriptors.

As a result, both functions should have a lower CPU overhead now.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18829>
2023-01-02 12:24:42 +01:00
Samuel Pitoiset
050c39c92f radv: fix missing initialization of radv_resolve_barrier::dst_stage_mask
Otherwise, this value is unitialized when read in
radv_ace_internal_barrier().

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7909
Fixes: 4c6f83006d ("radv: Synchronization for task shaders.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20351>
2023-01-02 08:04:29 +01:00
Marek Olšák
fc0e23b6dd iris: implement PIPE_CAP_MAP_UNSYNCHRONIZED_THREAD_SAFE
required by glthread

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20379>
2023-01-01 16:00:07 -05:00
Marek Olšák
b9caddb4a7 glthread,gallium: add a CAP to disable glBufferSubData optimization in glthread
it regresses performance on iris

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20379>
2023-01-01 16:00:07 -05:00
Daniel Schürmann
83b31b11a5 aco: Reassign dead definitions of p_split_vector to associated register
Any unused split_vector definition can always use the same register
as the operand. This avoids creating unnecessary copies.

Fossil DB stats on Rembrandt (RDNA2):
Totals from 3904 (2.89% of 134906) affected shaders:
CodeSize: 18326692 -> 18271688 (-0.30%)
Instrs: 3386632 -> 3372888 (-0.41%)
Latency: 42337481 -> 42330085 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 6566731 -> 6566424 (-0.00%); split: -0.01%, +0.00%
Copies: 224301 -> 210559 (-6.13%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:04:07 +01:00
Timur Kristóf
75b1027722 aco: Try to reassign split vector registers post-RA.
Eliminate unnecessary copies when the operand registers of a
p_split_vector instruction are not clobbered between the p_split_vector
and the user of its definitions.

This happens when p_split_vector doesn't kill its operand and its
definitions have a shorter lifespan that the operand. It affects every
NGG culling shader among other things.

This optimization exists because it's too difficult to solve it
in RA, and should be removed after we solved this in RA.

v2 by Daniel Schürmann:
- Rearrange and simplify conditions for the new optimization
- Fix a few bugs

v3 by Daniel Schürmann:
- Check number of encoded ALU operands

Fossil DB stats on Rembrandt (RDNA2):
Totals from 64896 (48.10% of 134906) affected shaders:
CodeSize: 175693348 -> 175434944 (-0.15%)
Instrs: 33333912 -> 33269388 (-0.19%)
Latency: 183766084 -> 183763432 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 28589651 -> 28589340 (-0.00%); split: -0.00%, +0.00%
Copies: 2806550 -> 2742038 (-2.30%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:04:07 +01:00
Timur Kristóf
3d29779a25 aco/optimizer_postRA: Distinguish overwritten untrackable and subdword.
This allows is_overwritten_since to return false when the last
writer instruction of a register can't be tracked but we know it wasn't
written in the current block.

Fossil DB stats on Rembrandt (RDNA2):
Totals from 1163 (0.86% of 134906) affected shaders:
CodeSize: 9815920 -> 9805016 (-0.11%)
Instrs: 1843688 -> 1840962 (-0.15%)
Latency: 19219153 -> 19209171 (-0.05%)
InvThroughput: 3354375 -> 3353852 (-0.02%)

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:04:07 +01:00
Daniel Schürmann
d3b0f78110 aco/optimizer_postRA: Initialize loop header with preheader information
This works because of SSA and should be safer than just setting 'not_written_yet'.

No Fossil DB changes on Rembrandt (RDNA2).

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:03:57 +01:00
Daniel Schürmann
8f4eccb138 aco: fix reset_block_regs() in postRA-optimizer
Accidentally, we picked the index of the predecessors instead of the predecessors.

Totals from 8496 (6.30% of 134913) affected shaders: (GFX10.3)
CodeSize: 64070724 -> 64022516 (-0.08%); split: -0.08%, +0.00%
Instrs: 11932750 -> 11920698 (-0.10%); split: -0.10%, +0.00%
Latency: 144040266 -> 144017062 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 29327735 -> 29326421 (-0.00%); split: -0.00%, +0.00%

Fossil DB stats on Rembrandt (RDNA2):
Totals from 4488 (3.33% of 134906) affected shaders:
CodeSize: 42759736 -> 42735392 (-0.06%); split: -0.06%, +0.00%
Instrs: 7960522 -> 7954436 (-0.08%); split: -0.08%, +0.00%
Latency: 96192647 -> 96172571 (-0.02%); split: -0.02%, +0.00%
InvThroughput: 19313576 -> 19312575 (-0.01%); split: -0.01%, +0.00%

Fixes: 75967a4814 ('aco/optimizer_postRA: Speed up reset_block() with predecessors.')
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16161>
2023-01-01 15:03:51 +01:00
Gert Wollny
b2dc63ed8c aux/trace: Add pipe_context::set_hw_atomic_buffers
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20453>
2023-01-01 13:18:54 +00:00
Konstantin Seurer
37cb882883 radv: Advertise rt pipelines for DOOM Eternal
The game has been fixed recently.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20464>
2022-12-31 20:24:54 +00:00
Konstantin Seurer
4125a35c9c radv: Advertise rt pipelines for Quake II RTX
The game has been working for a while now.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20464>
2022-12-31 20:24:54 +00:00
Konstantin Seurer
ea38efb17e radv: Add a driconf to advertise rt pipelines
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20464>
2022-12-31 20:24:54 +00:00
Christian Gmeiner
9e56f69edf isaspec: encode: handle special fieldname properties
Without this change a fieldname like '{DST::align=12}' was not used for
encoding. Change the regex to include such fieldnames and remove the fieldname
property in a later step.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20462>
2022-12-31 13:43:15 +00:00
Jordan Justen
4429bdd7f5 drm-shim: Use hide_drm_device_path() to hide other drm devices
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19241>
2022-12-30 15:51:11 -08:00
Jordan Justen
b39044fd9f drm-shim: Add hide_drm_device_path()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19241>
2022-12-30 15:51:07 -08:00
Jordan Justen
d7ed05d1ba drm-shim: Convert nfasprintf and nfvasprintf to functions
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19241>
2022-12-30 15:50:36 -08:00
Rob Clark
c9a4c0f22a freedreno/a6xx: Linewrap
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>
2022-12-30 10:41:55 -08:00
Rob Clark
d75a1bb4d0 freedreno: Fix use_fence_fd typo
This was causing excessive flushes, because requesting an out-fence fd
triggers the drm layer to flush deferred submits instead of continued
merging.

Fixes: 48b5164356 ("freedreno/drm: Return fence from submit flush")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20465>
2022-12-30 10:41:55 -08:00