Commit Graph

146 Commits

Author SHA1 Message Date
Brian Paul
ab9d1011f5 Merge branch 'mesa_7_6_branch' 2009-10-22 18:38:19 -06:00
Brian Paul
55058652b8 intel: flush old context before binding new context
Per the GLX spec, when changing rendering contexts, the old context
should first be flushed.
2009-10-22 18:33:26 -06:00
Brian Paul
ea659f8917 intel: Fallback field is a bitmask, use GLbitfield 2009-10-22 16:52:59 -06:00
Brian Paul
55770d09c1 Merge branch 'mesa_7_6_branch'
Conflicts:

	src/gallium/auxiliary/util/u_cpu_detect.c
2009-10-05 14:42:08 -06:00
Brian Paul
3b29dcbb5e intel: remove a buffer equality test in _mesa_make_current()
Before, if we called glXMakeCurrent() to change a context's window binding
while an FBO was bound, we weren't updating the intel->driDrawable and
intel->driReadDrawable fields.  This could cause us to dereference a null
pointer elsewhere.
2009-10-05 14:07:29 -06:00
Michel Dänzer
c67bb22fe7 Merge branch 'mesa_7_6_branch' 2009-09-21 10:48:32 +02:00
Michel Dänzer
1d4dbd8d9b Merge branch 'mesa_7_5_branch' into mesa_7_6_branch 2009-09-21 10:39:20 +02:00
Michel Dänzer
999592745f intel: Fix crash in intel_flush().
Since commit 2921a2555d ('intel: Deassociated
drawables from private context struct in intelUnbindContext'),
intel->driDrawable may be NULL in intel_flush().
2009-09-21 10:28:37 +02:00
Brian Paul
da9d8f1924 Revert "mesa: move _mesa_meta_init/free() calls to core Mesa"
This reverts commit 651cffd626.

The commit inadvertantly introduced a new gallium dependency on the meta code.
2009-09-20 22:06:03 -06:00
Brian Paul
651cffd626 mesa: move _mesa_meta_init/free() calls to core Mesa 2009-09-19 16:43:16 -06:00
Ian Romanick
5ce72c559c Merge branch 'mesa_7_6_branch' 2009-09-16 08:05:36 -07:00
Ian Romanick
88e3a57605 Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Conflicts:
	src/mesa/main/dlist.c
2009-09-16 07:57:19 -07:00
Ian Romanick
2921a2555d intel: Deassociated drawables from private context struct in intelUnbindContext
The generic DRI infrastructure makes sure that __DRIcontextRec::driDrawablePriv
and __DRIcontextRec::driReadablePriv are set to NULL after unbinding a
context.  However, the intel_context structure keeps cached copies of
these pointers.  If these cached pointers are not NULLed and the
drawable is actually destroyed after unbinding the context (typically
by way of glXDestroyWindow), freed memory will be dereferenced in
intelDestroyContext.

This should fix bug #23418.
2009-09-16 07:39:58 -07:00
Brian Paul
3c31049439 intel: remove unneeded driver function assignments
These default swrast functions are already installed by
_mesa_init_driver_functions().
2009-09-14 12:42:18 -06:00
Ian Romanick
8398535331 Merge branch 'mesa_7_5_branch' into mesa_7_6_branch
Conflicts:
	src/mesa/drivers/dri/intel/intel_context.c
2009-09-10 11:24:56 -07:00
Zhenyu Wang
2dd3da3a4a intel: add B43 chipset support
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>

Hopefully this will be one of the last cherry-picks.

(cherry picked from commit ca246dd186)
2009-09-10 11:18:41 -07:00
Zhenyu Wang
ca246dd186 intel: add B43 chipset support
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2009-09-09 13:28:59 +08:00
Eric Anholt
58a57e3fc4 Revert "intel: helper to debug bufmgr (disabled)"
This reverts commit e0ec405a9f.

This is already available in INTEL_DEBUG=bufmgr in the environment.
2009-09-08 14:28:23 -07:00
Eric Anholt
cf820a045f intel: Also get the DRI2 front buffer when doing front buffer reading.
(cherry picked from commit df70d3049a)
2009-09-04 14:40:21 -07:00
Eric Anholt
afd6141934 intel: Add support for ARB_sync.
We currently weasel out of supporting the timeout parameter, but otherwise
this extension looks ready, and should make the common case happy.
2009-09-03 11:22:47 -07:00
Brian Paul
e0ec405a9f intel: helper to debug bufmgr (disabled) 2009-09-03 11:45:17 -06:00
Brian Paul
0109e1b9f3 intel: add missing \n to fprintf() 2009-08-10 13:58:56 -06:00
Brian Paul
8cb389ce35 intel: use new _mesa_meta_blit_framebuffer() function
The previous version of framebuffer blit was a quick hack.  The new meta
version works pretty well.
2009-08-10 13:55:32 -06:00
Brian Paul
61673aebb0 intel: Fix inverted test for disabling flushing of front buffer output.
The comment disagreed with the code, and nicely drew my eyes to what was
going wrong.

Bug #21774 (blender)
Bug #21788 (readpix)

(cherry picked from master, commit fd65418f60)
2009-08-04 09:23:17 -06:00
Brian Paul
f5f8be8bb2 intel: Wait on the last swapbuffers to complete before queuing a new one.
This fixes jerkiness in doom3 and other apps since the kernel change to
throttle less absurdly, which led to a thundering herd of frames.

Because this is a rather minimal fix, there is at least one downside: If
the whole scene completes in one batchbuffer, we'll end up stalling the GPU.

Thanks to Michel Dänzer for suggesting using glFlush to signal frame end
instead of going to all the effort of adding a new DRI2 extension.

(cherry picked from master, commit 0828579a65)
2009-08-04 09:22:15 -06:00
Eric Anholt
fd65418f60 intel: Fix inverted test for disabling flushing of front buffer output.
The comment disagreed with the code, and nicely drew my eyes to what was
going wrong.

Bug #21774 (blender)
Bug #21788 (readpix)
2009-08-03 14:33:40 -07:00
Eric Anholt
0828579a65 intel: Wait on the last swapbuffers to complete before queuing a new one.
This fixes jerkiness in doom3 and other apps since the kernel change to
throttle less absurdly, which led to a thundering herd of frames.

Because this is a rather minimal fix, there is at least one downside: If
the whole scene completes in one batchbuffer, we'll end up stalling the GPU.

Thanks to Michel Dänzer for suggesting using glFlush to signal frame end
instead of going to all the effort of adding a new DRI2 extension.
2009-08-03 13:34:07 -07:00
Brian Paul
722d136f7b intel: Clean up leak of driver context structure on context destroy.
(cherry picked from commit ddef7dc87b)
2009-07-27 15:33:07 -06:00
Dave Airlie
f6f0e117a4 intel/radeon: add common metaops code.
Move all the metaops to a dri_metaops file and port radeon/intel
to use the new common meta ops code.
2009-07-15 10:30:23 +10:00
Brian Paul
9615daa932 Merge branch 'mesa_7_5_branch' 2009-07-13 08:47:37 -06:00
Ian Romanick
022e8e582e intel: Bump driver data, add RC3 tag 2009-07-12 21:07:38 -07:00
Xiang, Haihao
2995bf0d68 i965: add support for new chipsets
1. new PCI ids
2. fix some 3D commands on new chipset
3. fix send instruction on new chipset
4. new VUE vertex header
5. ff_sync message (added by Zou Nan Hai <nanhai.zou@intel.com>)
6. the offset in JMPI is in unit of 64bits on new chipset
7. new cube map layout
2009-07-13 11:01:13 +08:00
Eric Anholt
ddef7dc87b intel: Clean up leak of driver context structure on context destroy. 2009-07-02 14:07:10 -07:00
Brian Paul
b8c479d4b0 Merge branch 'mesa_7_5_branch' 2009-06-29 15:27:49 -06:00
Brian Paul
4e43126a59 intel: added null ptr check
This fixes a segfault seen with piglit's fdo20701 test.
2009-06-29 15:26:28 -06:00
Eric Anholt
a96f86831e Revert "intel: Remove unneded pthread mutex in LOCK_HARDWARE."
This reverts commit de447afff2 but
puts the lock under DRI1-only.

From keithw:
> It's there because the DRI1 code doesn't actually achieve the mutexing
> which it looks as if it should.  For multi-threaded applications it was
> always possible to get two threads inside locked regions -- I have no
> idea how, but it certainly was and presumably still is possible.
2009-06-29 11:39:09 -07:00
Eric Anholt
94008088c1 intel: Move note_unlock() implementation to the one place it's needed. 2009-06-29 10:33:50 -07:00
Eric Anholt
de447afff2 intel: Remove unneded pthread mutex in LOCK_HARDWARE.
This would cause LOCK_HARDWARE to mutex all contexts in this process on
both DRI1 and DRI2.  On DRI1, LOCK_HARDWARE already does it for all
processes on the system.  On DRI2, LOCK_HARDWARE doesn't, but there shouldn't
be any state outside the context that needs any additional protection.
Notably, the bufmgr is protected by its own mutex and not
LOCK_HARDWARE.

This code was originally introduced with the i915tex code dump, so it's not
clear what it was there for.
2009-06-29 10:33:50 -07:00
Eric Anholt
3927874d9c intel: Make LOCK_HARDWARE recursive to avoid hand-rolling recursiveness. 2009-06-29 10:33:50 -07:00
Ian Romanick
2d86503471 intel / DRI2: Additional flush of fake front-buffer to real front-buffer
To maintain correctness, the server will copy the real front-buffer to
a newly allocated fake front-buffer in DRI2GetBuffersWithFormat.
However, if the DRI2GetBuffersWithFormat is triggered by glViewport,
this will copy stale data into the new buffer.  Fix this by flushing
the current fake front-buffer to the real front-buffer in
intel_viewport.

Fixes bug #22288.
2009-06-26 13:32:26 -07:00
Eric Anholt
61a2c9668f intel: Skip the DRI2 renderbuffer update when doing Viewport on an FBO.
(cherry picked from commit d4a42b0ce6)
2009-06-17 10:52:49 -07:00
Brian Paul
a18e209edb Merge branch 'mesa_7_5_branch'
Conflicts:

	Makefile
	src/gallium/drivers/softpipe/sp_screen.c
	src/mesa/main/version.h
2009-06-26 17:07:07 -06:00
Eric Anholt
a9b03aaebf intel: Refuse to do texture tiling if we don't have the kernel support. 2009-06-23 19:31:10 -07:00
Eric Anholt
df70d3049a intel: Also get the DRI2 front buffer when doing front buffer reading. 2009-06-19 22:18:16 -07:00
Michel Dänzer
dd26899ca3 intel: Fixups for 'mesa: create/destroy buffer objects via driver functions'.
Initialize all driver function hooks before calling _mesa_initialize_context(),
and handle all buffer objects in intel_buffer_object().

Fixes assertion failure when running glxinfo.
2009-06-19 23:55:55 +02:00
Eric Anholt
b30dc2c66a i915: Add an option for testing the effect of early Z in classic mode.
The early Z stuff is supposed to be unsafe without some more work in the
enable/disable path (in particular, how do we want to get it disabled on
the way out to the X Server?), but at the moment is 6% in OA.
2009-06-09 16:12:43 -07:00
Brian Paul
89205a8760 intel: make a bunch of glTexImage-related functions static 2009-06-09 14:05:17 -06:00
Eric Anholt
1ba96651e1 intel: Add support for tiled textures.
This is about a 30% performance win in OA with high settings on my GM45,
and experiments with 915GM indicate that it'll be around a 20% win there.
Currently, 915-class hardware is seriously hurt by the fact that we use
fence regs to control the tiling even for 3D instructions that could live
without them, so we spend a bunch of time waiting on previous rendering in
order to pull fences off.  Thus, the texture_tiling driconf option defaults
off there for now.
2009-06-04 14:00:43 +00:00
Chris Wilson
9178b31546 intel: Override MaxRenderbufferSize with hardware constraints
Limit the maximum renderbuffer size to 8192 on i965 and to 2048 on
earlier hardware.
2009-05-26 15:51:33 -07:00
Brian Paul
ca327b1688 Merge branch 'mesa_7_5_branch' 2009-05-13 11:33:52 -06:00