Commit Graph

121139 Commits

Author SHA1 Message Date
John Stultz
09fbde830f panfrost: Move pan_afbc.c file to the the right Makefile.source file
It seems pan_afbc.c was added to the wrong Makefile.sources file.

So fix this, so we don't run into build issues with mesa/master
trying to build under AOSP.

Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
2020-03-11 02:52:58 +00:00
John Stultz
67aae8f98f freedreno: Add ir3_cf.c and ir3_delay.c to Makefile.sources
This patch adds missing ir3_cf.c and ir3_delay.c files to
the Makefile.sources file to address build issues seen
when trying to build mesa/master on AOSP

Signed-off-by: John Stultz <john.stultz@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4141>
2020-03-11 02:52:58 +00:00
Marek Olšák
2dc300421d gallium/cso_context: remove cso_delete_xxx_shader helpers to fix the live cache
With the live shader cache, equivalent shaders can be backed by the same
CSO. This breaks the logic that identifies whether the shader being deleted
is bound.

For example, having shaders A and B, you can bind shader A and delete
shader B. Deleting shader B will unbind shader A if they are equivalent.

Pierre-Eric figured out the root cause for this issue.

Fixes: 0db74f479b - radeonsi: use the live shader cache
Closes: #2596

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4078>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4078>
2020-03-10 22:19:47 -04:00
Eric Engestrom
1fa259b035 vulkan/wsi: fix cleanup when dup() fails
Fixes: f5433e4d6c ("vulkan/wsi: Add modifiers support to wsi_create_native_image")
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4137>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4137>
2020-03-10 22:43:25 +00:00
Karol Herbst
6e035c01fb Revert "gallium: make handles of set_global_binding 64 bit"
This reverts commit e1ffb72a05
2020-03-10 22:41:26 +00:00
Karol Herbst
e1ffb72a05 gallium: make handles of set_global_binding 64 bit
needed by CL

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4072>
2020-03-10 22:06:19 +00:00
Alyssa Rosenzweig
0541350e3a pan/bi: Implement comparison opcodes via BI_CMP
Pretty straightforward for the moment. Ideally these would be fused into
csel/branches but that will come a bit later.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:26:00 +00:00
Alyssa Rosenzweig
6409896ca7 pan/bi: Print source types unconditionally
We track them all now, let's use them.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:26:00 +00:00
Alyssa Rosenzweig
20c7d57ede pan/bi: Specify comparison op for BI_CMP
...and adjust printing so we can use it as an op name.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:26:00 +00:00
Alyssa Rosenzweig
08ab7cecd9 pan/bi: Lower b2f to bcsel
Since we can get a zero for free and a one inlined into the constant,
the obvious turns out to be efficient (while allowing flexibility for
boolean size).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
d3823551b4 pan/bi: Implement nir_op_bcsel
No condition fusing yet.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
3a1baafede pan/bi: Import algebraic pass from midgard
We'll need some of these at least.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
55f0d811e4 pan/bi: Add isub op
Can't be a regular ADD since there's no negate modifier for integers
(it's a different opcode entirely).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
acab788578 pan/bi: Disable lower_sub
For float, fixing up the modifier ourselves is easy. For int, we have a
dedicated isub instruction anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
1216a63ff2 pan/bi: Implement fabs, fneg as fmov with mods
Fusing will come later with the appropriate NIR support.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
8ed79c9ed7 pan/bi: Handle special ops in NIR->BIR
Only on supported GPUs at the moment; for older Bifrost that don't
support these, I'm not sure yet where the right place to do the lowering
is. NIR algebraic rules would be "nice" but probably impractical -- but
it wouldn't be hard to do it directly in BIR (as a lowering pass or
alternative implementation).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
b674e39d72 pan/bi: Add BI_SPECIAL_* enum
To disambiguate the different special ops from each other.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
c862234ab3 pan/bi: Add a bunch of ALU ops
These are all regular ALU ops found in GLES2 which makes them
particularly nice targets at the moment. Just translate straight to our
IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
5a5896cd76 pan/bi: Implement fsat as mov.sat
Soon we'll have a NIR support to handle this the Right Way along with
pos and sat_signed support, but we'll always need the fallback anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
48e50efd5d pan/bi: Allow inlining constants
This will allow us to optimize out the constant moves (although that
will require a DCE pass which has yet to be written).

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
929baf3f88 pan/bi: Add initial handling of ALU ops
We do the bare minimum translation, just enough for fmov/fadd/fmul right
now with no modifiers / inlined constants / etc. The rest is to come!
But hopefully I got bitsize handling right this time around.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
330e9a6696 pan/bi: Lower vec* to writemasks in NIR
I was hoping not to tread down this path but it seems inevitable now.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
69c66ffd84 pan/bi: Remove bi_load
This is now made redundant with writemasks, so let's regularize the IR.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
e9d480ca1b pan/bi: Introduce writemasks
I feel so dirty. But this will let the IR be a lot more flexible seeing
as we really are vector in a certain sense (I/O, small types)

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
795646d8f8 pan/bi: Generalize swizzles to avoid extracts
We'd really rather not emit extracts. We are approaching on a vector IR
anyway which is annoying but really necessary to handle I/O and fp16
correctly. So let's just go all the way and deal with swizzles and masks
within reason; it'll still be somewhat saner in the long-term.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Alyssa Rosenzweig
9b8cb9f5ae panfrost: Move mir_to_bytemask to common code
...also so we can start sharing code properly between the panfrost
compilers.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4139>
2020-03-10 19:25:59 +00:00
Rob Clark
ba03e308b6 freedreno/fdperf: set locale
Set local to get numbers printed w/ commas.. much easier to read that
way.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4119>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4119>
2020-03-10 16:52:02 +00:00
Rob Clark
30dd059925 freedreno/computerator: add performance counter support
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4119>
2020-03-10 16:52:02 +00:00
Jason Ekstrand
af68b0d346 vulkan/wsi: Return an error if dup() fails
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4135>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4135>
2020-03-10 16:39:27 +00:00
Jason Ekstrand
34d2637fa7 vulkan/wsi: Don't leak the FD when GetImageDrmFormatModifierProperties fails
Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4135>
2020-03-10 16:39:27 +00:00
Rob Clark
3c96e25de7 freedreno/ir3: try to avoid syncs
Update postsched to be better aware of where costly (ss) syncs would
result.  Sometimes it is better to allow a nop or two, to avoid a
sync quickly after an SFU.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
cc82521de4 freedreno/ir3: round-robin RA
In the second (scalar pass) use the information about # of registers
used in the first pass as the target max, and round-robin within that
range.  This generally gives the post-RA sched pass more opportunities
to re-order instructions to remove nop's.

Also, we can be a bit clever when assigning dest registers for SFU
instructions, by picking the register used for it's src (if available
and already assigned).  This avoids some (ss) syncs caused by write
after read hazards.  (Ie. the SFU instruction will read it's own src
before writing dest.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
b2b349096f freedreno/ir3: track register usage in first RA pass
We'll use the feedback from the first pass to select a target register
usage in the second pass.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
9ae93be8fb freedreno/ir3: fix has_latency_to_hide
Also count tex-prefetch instructions.  And only let the no-latency rule
kick in for frag shaders.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
b6eb11295a freedreno/ir3: split out has_latency_to_hide()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
dd2e050a84 util/ra: move NO_REG to header
In the select_reg callback, I want to be able to determine if a given
node is already assigned, and if so what physical register has been
assigned.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
36aed70b59 util/ra: spiff out select_reg_callback
Add a parameter so the callback can know which node it is selecting a
register for.  And remove the graph parameter, as it is unused by
existing users, and somewhat unnecessary (ie. the callback data could
be used instead).

And add a comment so $future_me remembers how this works.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
b3efa2a4da freedreno: fix FD_MESA_DEBUG=inorder
Fixes: 2c07e03b79 ("freedreno: allow ctx->batch to be NULL")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
752b9985be freedreno/ir3: add simplified stall estimation
Doesn't take into account stalls that result from a register written in
a different block, etc.  But this should be more useful than just using
number of (ss)'s by trying to estimate how costly a given sync is.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
64ae2ef8bb freedreno/ir3: remove extra nops inserted in scheduler
They were inserting a nop between back to back SFU instrucions.  But
that doesn't actually appear to be required.  And they get stripped out
later anyways before legalize.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
ad2ff7a278 freedreno/computerator: add hrsq/hlog2/hexp2
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
4a8e4c18d2 freedreno/ir3: also lower lowp frag outputs
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Rob Clark
3535797e8c nir/print: show variable precision
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4071>
2020-03-10 16:01:39 +00:00
Danylo Piliaiev
10eee6d8c6 intel/tools: Fix compilation with UBSan
Compilation failed with several similar errors:

../src/intel/tools/aub_read.c:322:4: error: case label does not reduce to an integer constant
  322 |    case MAKE_HEADER(TYPE_AUB, OPCODE_AUB, SUBOPCODE_HEADER):

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4132>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4132>
2020-03-10 15:20:26 +00:00
Mathias Fröhlich
74be835a84 i965: Use gl_vertex_format in brw_vertex_element.
State upload needs to cope with the vertex format
rather than with the full attribute data.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
e62b82a693 i965: Make use of the vertex format functions in i965.
v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
cf929823bf mesa: Provide gl_vertex_format accessors.
Provide the same set of VAO and current value gl_vertex_format
accessor functions like we have for the gl_array_attributes.
For most purpose the vertex format is what we need.

v2: Style fixes.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
1641c872ed mesa: Remove now unused _mesa_draw_attrib.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
305724dd7b mesa: Remove now unused _mesa_draw_attrib_and_binding.
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00
Mathias Fröhlich
4ccda7bfd9 i965: Remove glbinding from brw_vertex_element.
v2: Rebase.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/308>
2020-03-10 14:28:37 +00:00