This extension was originally intended to complement
EGL_WL_bind_wayland_display.
The idea behind bind_wayland_display was that libEGL.so on the server
side could register Wayland extensions for libEGL.so on the client side
to use to create buffers, with eglQueryWaylandBufferWL being used to
query the buffer properties, and EGL_WAYLAND_BUFFER_WL added as an
EGLImage target for texturing.
eglCreateWaylandBufferFromImageWL was then to be used for nested
compositors to perform passthrough: it would take an EGLImage created by
the magical libEGL secret handshake, and make it usable in the parent
compositor by doing the same secret handshake again.
Since that original idea, we've just standardised dmabuf across the
Wayland ecosystem instead. The last known user of this extension was a
sample client in the Weston tree, which was broken quite some years ago
and never ported to the Meson build system when we moved.
Given it won't affect anyone, let's just remove this extension so no-one
thinks it would be a good idea to use it.
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27793>
The previous patch changed the gfx12 CCS initial aux state from
pass-through to compressed-no-clear. This isn't always accurate.
This patch determines if a CCS is in the pass-through state by
inspecting the associated resources' bo field. In order to do that
clearly, move aux-state initialization out of
iris_resource_configure_aux (which can be called before BO creation).
Split up that logic and move the pieces into iris_resource_from_handle,
iris_resource_init_aux_buf, and a new function in ISL.
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27835>
The extra_aux memory range holds the CCS portion of surfaces using
MCS_CCS or HiZ+CCS on integrated gfx12.x. Avoid memsetting because:
* There's no known CCS initialization requirement for MCS_CCS.
* ACM has the same documented initialization requirements for HIZ+CCS on
TGL/MTL, but iris doesn't initialize the CCS portion on discrete. For
TGL+, anv does not initialize the CCS portion of HiZ+CCS. Let's be
consistent with these other cases and avoid initialization.
If we end up needing to initialize the CCS, we can try come up with
something that will work for both integrated and discrete gfx12.
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27835>
Previously, if first draw call with wasn't indexed but pipeline
had primitive restart enabled - primitive restart would be disabled
for draw calls, even indexed, that follow.
However, prim restart index works in non-indexed draw calls, but since
we don't emit fresh PC_RESTART_INDEX for them - they may use stale
value if prim restart is enabled for non-indexed draw calls.
So we have track the switch between indexed and non-indexed draw calls
and emit PC_PRIMITIVE_CNTL_0 for them.
Fixes car rear window in Need for Speed: Most Wanted (2012)
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27821>
this is a bandaid fix that allows users (zink) to actually call the
functions intended to be called. the real fix would be to figure out
which extensions are enabled on the device and then only GPA the
functions associated with those extensions
that's too hard though so I'm slapping some flex tape on it
cc: mesa-stable
Acked-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27834>
Lowering/layout is pretty much the same as direct descriptors. The
caveats is that since the descriptor buffers are not visible from the
binding tables we can't promote anything to the binding table (except
push descriptors).
The reason for this is that there is nothing that prevents an
application to use both types of descriptors and because descriptor
buffers have visible address + capture replay, we can't merge the 2
types in the same virtual address space location (limited to 4Gb max,
limited 2Gb with binding tables).
If we had the guarantee that both are not going to be used at the same
time, we could consider a 2Gb VA for descriptor buffers.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22151>
The way we implement embedded samplers will be to have the sampler
handle as a relocated constant in the shader.
This implies that 2 identical shaders with different embedded sampler
parameters must have different hash as we cannot reuse the final
shader binary.
So add the sampler hash to the descriptor set layout hash when the set
has embedded samplers.
This has the effect of creating multiple shader entries in the cache
unfortunately. An improvement over this would be to have a anv_device
map of (embedded samplers hash + shader hash) to shader in instruction
heap, so that pipeline caches only have a single entry regardless of
embedded sampler parameters.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22151>
