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137 Commits

Author SHA1 Message Date
Alyssa Rosenzweig
87ad9439d3 agx: Support bcsel 
We're already using cmpsel in lots of places, pipe through the real
thing!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:20 -04:00
Alyssa Rosenzweig
d3abe997ca agx: Add b2i implementation 
Another icmpsel variant.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
80edb8124d agx: Implement b2f 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
5a5abdc8d8 agx: Support 1-bit booleans 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
9201d31eac agx: Add min/max support 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
257a8cc111 agx: Emit texture ops 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:18 -04:00
Alyssa Rosenzweig
d555849c3c agx: Add agx_tex_dim helper 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:18 -04:00
Alyssa Rosenzweig
1455f33f9b agx: Implement vertex_id 
Preloaded to r5 in vertex shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:18 -04:00
Alyssa Rosenzweig
7566466354 agx: Lower load_attr to device memory accesses 
This is pretty annoying but not as catastrophic as I feared... at least,
until we need to support indirect access, non-native formats, or instancing.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig
1c6f34f611 agx: Set flag on last st_vary instruction 
Not sure what the point is but let's match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig
033d4d09fc agx: Implement load_ubo/kernel_input 
Lower to a read from global memory at a base address specified in a
sysval.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig
77e7168ae2 agx: Implement limited case of i2i16/i2i32 as iadd 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig
0f58e8dabe agx: Add dead code eliminator 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:16 -04:00
Alyssa Rosenzweig
28801b4849 agx: Add forward optimizing pass for fmov 
Explain the ideas behind our SSA-based optimizer (inspired by ACO's,
thank you to Daniel Schuermann for discussing this with me in the
context of Bifrost), and implement the subset needed to propagate
abs/neg through.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:16 -04:00
Alyssa Rosenzweig
e50bae00f4 agx: Add 32-bit bitwise shifts 
Only ishr has an actual native instruction, the others are special cases
of the bitfield insertion/extraction ops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:16 -04:00
Alyssa Rosenzweig
17bb5a067a agx: Add saturated integer add/subtract support 
Just a flag on the regular iadd instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:15 -04:00
Alyssa Rosenzweig
86ae965ea4 agx: Add iadd/imad integer arithmetic 
Lots of optimizations will be possible later on.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:15 -04:00
Alyssa Rosenzweig
0c21513693 agx: Add bitwise operations 
This get translated to bitop with the corresponding truth table with
some builder syntax sugar.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:15 -04:00
Alyssa Rosenzweig
c06dcaf0a0 agx: Implement native int->float conversions 
This time 8, 16, and 32-bit sources are supported natively, but not
64-bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:15 -04:00
Alyssa Rosenzweig
2126848771 agx: Implement native float->int conversions 
No 8-bit or 64-bit yet since those need lowerings.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:14 -04:00
Alyssa Rosenzweig
1f77aa95ec agx: Implement fsin/fcos 
First, we lower to fsin_agx and some ALU in NIR. Then, we implement
fsin_agx with the underlying transcental ops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:14 -04:00
Alyssa Rosenzweig
b5a3845f9a agx: Implement simple floating point ops 
These are all direct translations of NIR->AIR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:14 -04:00
Alyssa Rosenzweig
8648b2be0b agx: Implement ld_vary 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:13 -04:00
Alyssa Rosenzweig
e54fdc0fac agx: Terminate programs with stop and traps 
The function of stop is clear. The function of trap, let alone a whole
sled of them, is less so. Maybe a debugging feature for later.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:13 -04:00
Alyssa Rosenzweig
f2d264e191 agx: Add instruction packing 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:13 -04:00
Alyssa Rosenzweig
c215895eae agx: Add a trivial register allocator 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:12 -04:00
Alyssa Rosenzweig
8af9822d14 agx: Implement fragment_out 
For a single colour render target.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:12 -04:00
Alyssa Rosenzweig
0079783428 agx: Implement vec2/vec3/vec4 ops 
As p_combine, to un-stub emit_alu.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:12 -04:00
Alyssa Rosenzweig
7ad11e3923 agx: Add agx_alu_src_index helper for emit_alu 
Since we don't use abs/neg in NIR, this just needs to construct
p_extract ops to deal with swizzles.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:12 -04:00
Alyssa Rosenzweig
22886f50f9 agx: Implement direct st_vary 
Indirection can come later, if at all..

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:11 -04:00
Alyssa Rosenzweig
fde66f0aa8 agx: Implement load_const as mov 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:11 -04:00
Alyssa Rosenzweig
2bfe1a61c5 agx: Stub emit_intrinsic 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:11 -04:00
Alyssa Rosenzweig
075e6be90c agx: Stub NIR instruction iteration 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:11 -04:00
Alyssa Rosenzweig
186c56a2d4 agx: Stub control flow walking 
From Bifrost. We'll need to diverge (no pun intended) due to exec_mask
handling specific to Apple.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:10 -04:00
Alyssa Rosenzweig
8b8c1a2827 agx: Remap varyings to match AGX ABI 
It's not clear if this is software or hardware defined, but until we
know more about linkage, let's match the blob. Fixes dEQP issues with
gl_PointSize.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:10 -04:00
Alyssa Rosenzweig
2470a080d2 agx: Stub NIR backend compiler 
A fork of the Bifrost compiler, tailored to AGX. nir_register support is
removed, as I want to use an SSA-based allocator for AGX. (There are no
VLIW-like requirements and extremely limited vector semantics, so we can
use an ACO approach with ease.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:10 -04:00
Alyssa Rosenzweig
972409dacb asahi: Stub command-line compiler for AGX G13B 
Based on the Bifrost standalone compiler, which was based on Midgard's
standalone compiler, which was based on Freedreno's standalone compiler,
which was.....

It's like sour dough!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:09 -04:00