Commit Graph

137 Commits

Author SHA1 Message Date
Alyssa Rosenzweig
b4108e1d01 agx: Lower UBO loads to use per-element indexing
This lets us support indirect access to UBOs easily. The existing
constant special case disappears too, since the peephole optimizer can
inline the constant later. (note: this is too conservative since we can
go up to 16-bit immediates...)

Unfortunately, nir_opt_algebraic can't seem to optimize expressions like
"((a << 3) + 4) >> 2" to "(a << 1) + 1" which would be necessary for
reasonable perf out of this...

Fixes:

dEQP-GLES2.functional.shaders.indexing.uniform_array.float_dynamic_loop_read_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14581>
2022-01-24 14:25:18 +00:00
Alyssa Rosenzweig
9645fa9107 agx: Handle discard intrinsics
Lower to `sample_mask = 0`. Actually that implements a demote... doing
discard correctly probably requires rewriting the shader control flow to
insert a return where necessary...

Also, possibly we should be lowering this in NIR to play nice with
gl_SampleMask writes but that's a problem for when we understand the
hardware better.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14219>
2022-01-16 18:23:28 +00:00
Dave Airlie
d051854cca treewide: drop mtypes/macros includes from main
These aren't required in lots of places, so remove them.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14127>
2021-12-08 22:14:45 +00:00
Timothy Arceri
a9ed4538ab nir: add indirect loop unrolling to compiler options
This is where it should be rather than having to pass it into the
optimisation pass every time.

It also allows us to call the loop analysis pass without having to
duplicate these options which we will do later in this series.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12064>
2021-08-03 10:54:50 +00:00
Alyssa Rosenzweig
3cd6f62388 agx: Shift vertex buffer stride in the compiler
Required to support non-32-bit vertex formats efficiently.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:57:19 -04:00
Alyssa Rosenzweig
3417ecb4d7 agx: Implement instanced arrays
Divide by instance divisor if needed. Same strategy as ACO.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:25:11 -04:00
Alyssa Rosenzweig
0c353d47be agx: Add udiv-by-constant routine
Uses the ridiculousfish algorithm, will be used to lower instanced
arrays into something efficient.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:24:02 -04:00
Alyssa Rosenzweig
50a4c993fd agx: Add agx_ushr helper
Syntax sugar for the underlying bitfield manipulation instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 17:23:42 -04:00
Alyssa Rosenzweig
3c1f754a71 agx: Handle load_instance_id
Preloaded into r6, as predicted.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 15:12:18 -04:00
Alyssa Rosenzweig
3f5eebe5e6 agx: Drop dated /* TODO: RA */
We skip over vertex ID in RA now, it's fine.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 15:12:03 -04:00
Alyssa Rosenzweig
5fb9159eb9 agx: Fix mismatched units in load_ubo
Fixes assertion failure in
dEQP-GLES3.functional.ubo.single_basic_type.shared.highp_float_fragment

   Assertion failed: ((value & 1) == 0), function agx_print_sized, file
   ../src/asahi/compiler/agx_print.c, line 39.

Fixes: 033d4d09fc ("agx: Implement load_ubo/kernel_input")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12053>
2021-07-24 14:39:44 -04:00
Alyssa Rosenzweig
dd98918a5a agx: Flip point coordinates because OpenGL
Fixes dEQP-GLES2.functional.shaders.builtin_variable.pointcoord

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11 22:32:41 +00:00
Alyssa Rosenzweig
3291779c21 asahi: Handle point coordinates
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11 22:32:41 +00:00
Alyssa Rosenzweig
3d75cff7d7 asahi: Identify triangle/lines vs point varyings
Seems to allow skipping over point coords?

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11 22:32:41 +00:00
Alyssa Rosenzweig
2468b123bb asahi: Set bit for psiz
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11818>
2021-07-11 22:32:41 +00:00
Alyssa Rosenzweig
1d0008734c agx: Ensure we don't overallocate registers
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig
7e65e47d19 agx: Pipe in nir_register
This is kind of lazy...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig
50f012542f agx: Handle txl
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
8361e24604 agx: Legalize LOD sources to be 16-bit only
I'm not convinced this is /right/ but it's a step.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
c99dfe6a0c agx: Fix 32-bit bitwise shifts
Fixes dEQP-GLES2.functional.shaders.functions.qualifiers.const_int_fragment

Fixes: e50bae00f4 ("agx: Add 32-bit bitwise shifts")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
5228be45b6 asahi: Generalize varying linking
Handles matrices now. Fixes

dEQP-GLES2.functional.shaders.matrix.add.dynamic_mediump_mat4_float_fragment

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
5049907ae1 asahi: Implement colour buffer reloads
Gets glmark2 -bdesktop working.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
a1f732e67b agx: Track logical control flow graph
Logic lifted from the Bifrost compiler, which was a copypaste of the Midgard
compiler, which was based on a faulty understanding of the v3d compiler,
which...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
a207c77314 agx: Lift agx_block_add_successor from Panfrost
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
f49ba0874a asahi: Unify varying linking code with vertex shaders
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
6a657b17b9 agx: Remap fragment shader varyings explicitly
Needed to handle fragcoord.z correctly, for example. Step 1, at least.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
32f4be5dd7 agx: Rename agx_pack to agx_pack_binary
Conflicts with GenXML.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
bf8d1734fd agx: Implement ld_vary_flat
Not clear what any of this is for but let's be nice and match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
3eab648d6b agx: Implement nir_intrinsic_load_frag_coord
Depends on matching ABI.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
8457524238 agx: Rename remap_varyings -> remap_varyings_vs
Want to do the same for fragment shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
99b67ab355 agx: Add perspective bit to ld_var
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
be4d88a6ba agx: Mark components as ASSERTED
Prevents a release build warning.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
0e2293a52b agx: Handle load_back_face_agx
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig
c21168a26c agx: Lower front face to back face
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig
5de49375ec asahi: Expose PIPE_CAP_CLIP_HALFZ
Use the Zink lowering pass to handle the non-halfz case. Metal, like Vulkan,
uses half-z (and Metal is not configurable, making r/e tricky).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
e9483110d2 agx: Zero r0l before first use of control flow
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
839fff846a agx: Add break/continue support
Following Dougall's notes closely.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
dd06e6af34 agx: Implement loops in the simplest way
Again, optimizations are possible, but for now go for conformance.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
11705488ed agx: Optimize out empty else blocks
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
cf43206e76 agx: Implement emit_if the simplest way
Lots of optimizations are possible from here.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
f7918ebc82 agx: Track current_block
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
0a7a6f0558 agx: Implement boolean mov
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
a1a8ee9b11 agx: Enable 1-bit load_const
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
15b5573194 agx: Set reads_tib appropriately
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
d0f566a90d agx: Implement load_output
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
1b9b2f9046 agx: Condition writeout ops on already being emitted
There's a lot of r/e waiting here, but will be needed for ld_tile. Match
the Metal blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
41d8db33a2 agx: Assume lower_fragcolor has been called
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
07fdc0015e agx: Rename blend -> st_tile
For symmetry.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
06fe6651b3 agx: Implement blend constant color sysvals
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
5fd489a6bd agx: Return agx_instr* from emit_intrinsic
Aesthetically useful.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
2021-05-09 23:29:45 -04:00