Commit Graph

285 Commits

Author SHA1 Message Date
Caio Oliveira
a1b1fdf70d intel/compiler: Rename 8_PATCH to MULTI_PATCH
Make it clearer we are dealing with multiple patches,
works better in constrast with SINGLE_PATCH.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18151>
2022-08-24 00:39:57 +00:00
Sviatoslav Peleshko
0a0aa24b33 iris: Always initialize shader compilation queue ready fence
We use/delete this fence unconditionally, but it was initialized only
when screen->precompile is set. Move the util_queue_fence_init call
to the iris_create_uncompiled_shader to initialize it always.

Fixes: 42c34e1a ("iris: Enable threaded shader compilation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7074
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Tested-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18182>
2022-08-23 12:38:11 +00:00
Jason Ekstrand
530de844ef intel,anv,iris,crocus: Drop subgroup size from the shader key
Use nir->info.subgroup_size instead.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17337>
2022-07-08 22:47:22 +00:00
Kenneth Graunke
fdae90aa85 intel/compiler: Split 3DPRIM_* defines out to a separate header.
These clash with genxml and will become a problem shortly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17309>
2022-06-30 23:46:35 +00:00
Kenneth Graunke
a141a351de intel/compiler: Stop including src/mesa/main/config.h
src/mesa/main includes are for Mesa's OpenGL implementation, and the
compiler is used in Vulkan drivers and other tools.  We really only
needed one #define, which is that we offer 32 samplers.  It probably
makes more sense to have our own defined limit for that rather than
importing a project-wide value which theoretically could be adjusted,
so swap MAX_SAMPLERS for a new BRW_MAX_SAMPLERS and call it a day.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17309>
2022-06-30 23:46:35 +00:00
Emma Anholt
cf265c6606 nir: Rename is_arb_asm to use_legacy_math_rules and document its meaning.
On iris and crocus, this flag is used to set "alt mode" math on the shader
as a whole.  Some other drivers have a similar mode for DX9/ARB-program
behavior, so document what it does so we can start using it.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16176>
2022-06-10 03:26:32 +00:00
Vadym Shovkoplias
55c71217ec driconf: Add a limit_trig_input_range option
With this option enabled range of input values for fsin and fcos is
limited to [-2*pi : 2*pi] by calculating the reminder after 2*pi modulo
division. This helps to improve calculation precision for large input
arguments on Intel.

-v2: Add limit_trig_input_range option to prog_key to update shader
     cache (Lionel)

Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16388>
2022-05-13 06:47:53 +00:00
Yonggang Luo
2ca6ef22f7 util: Rename pipe_debug_callback to util_debug_callback
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15657>
2022-04-01 01:52:43 +00:00
Xiaohui Gu
4d81c60e11 iris: Mark a dirty update when vs_needs_sgvs_element value changed
Add vs_needs_sgvs_element value check when updating vertex
element dirty state in iris_update_compiled_vs to solve
render error of Android game "Genshin Impact".

Signed-off-by: Xiaohui Gu <xiaohui.gu@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15142>
2022-03-04 05:41:38 +00:00
Dave Airlie
d54c07b4c4 mesa/*: use an internal enum for tessellation primitive types.
To avoid dragging gl.h into places it has no business being,
defined tessellation primitive mode to an enum.

This has a lot of fallout all over the place.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14605>
2022-01-19 21:54:58 +00:00
Caio Oliveira
58c4a95320 intel/compiler: Use a struct for brw_compile_gs parameters
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14139>
2021-12-13 01:08:16 +00:00
Caio Oliveira
acf2d3c78b intel/compiler: Use a struct for brw_compile_tes parameters
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14139>
2021-12-13 01:08:16 +00:00
Caio Oliveira
7372a48a4a intel/compiler: Use a struct for brw_compile_tcs parameters
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14139>
2021-12-13 01:08:16 +00:00
Jason Ekstrand
4fa58d27a5 intel/fs,vec4: Drop support for shader time
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14056>
2021-12-10 21:20:47 +00:00
Jason Ekstrand
8f3c100d61 intel/fs,vec4: Drop uniform compaction and pull constant support
The only driver using these was i965 and it's gone now.  This is all
dead code.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14056>
2021-12-10 21:20:47 +00:00
Dave Airlie
9bb375b0be intel/compiler: drop glsl options from brw_compiler
Only the nir options are used now, since i965 was dropped,
the glsl options come from the state tracker

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14102>
2021-12-07 08:52:36 +00:00
Marcin Ślusarz
d05f7b4a2c intel: fix INTEL_DEBUG environment variable on 32-bit systems
INTEL_DEBUG is defined (since 4015e1876a) as:

 #define INTEL_DEBUG __builtin_expect(intel_debug, 0)

which unfortunately chops off upper 32 bits from intel_debug
on platforms where sizeof(long) != sizeof(uint64_t) because
__builtin_expect is defined only for the long type.

Fix this by changing the definition of INTEL_DEBUG to be function-like
macro with "flags" argument. New definition returns 0 or 1 when
any of the flags match.

Most of the changes in this commit were generated using:
for c in `git grep INTEL_DEBUG | grep "&" | grep -v i915 | awk -F: '{print $1}' | sort | uniq`; do
    perl -pi -e "s/INTEL_DEBUG & ([A-Z0-9a-z_]+)/INTEL_DBG(\1)/" $c
    perl -pi -e "s/INTEL_DEBUG & (\([A-Z0-9_ |]+\))/INTEL_DBG\1/" $c
done
but it didn't handle all cases and required minor cleanups (like removal
of round brackets which were not needed anymore).

Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13334>
2021-10-15 19:55:14 +00:00
Anuj Phogat
efa27572a1 iris: Enable geometry distribution
Using recommended values based on performance studies across a range
of workloads.

Rework:
 * Always enable geometry distribution
 * Set ListCutIndexEnable if primitive restart is enabled
 * Set distribution mode based on TEEnable

v2:
- Flag missing IRIS_DIRTY_VFG bit (Ken)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12091>
2021-10-13 22:36:54 +00:00
Ian Romanick
897bb9a222 iris: Add finalize_nir
Improves performance of SynMark OglDrvShComp by +241.879%±1.01366% (n=5)
on a random KBL desktop that I have.  That seems to put it at about the
same performance as i965, but I did not test that in a statistically
sound way.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
2021-09-17 16:36:08 -07:00
Ian Romanick
b042c71ac1 iris: Move iris_set_max_shader_compiler_threads and iris_is_parallel_shader_compilation_finished
There's going to be at least one more shader function set in
pipe_screen, so it makes more sense to do it in iris_program.c.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
2021-09-17 16:36:08 -07:00
Ian Romanick
aaf2e6a9f5 iris: Eliminate iris_uncompiled_shader::needs_edge_flag
Use the flag that was set by nir_lower_passthrough_edgeflags.  The
lowering passes will soon be moved to a finalize_nir hook, so there
won't be any choice.  Ideally we'd like to eliminate iris_fix_edge_flags
completely, and this is a first step.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
2021-09-17 16:36:08 -07:00
Ian Romanick
d7ba52cce9 nir/edgeflags: Add a flag to indicate the edge flag input is needed
Most modern hardware needs the edge flag added as a hidden vertex input
and needs code added to the vertex shader to copy the input to an
output.  Intel hardware is a little different.  Gfx4 and Gfx5 hardware
works in the previously described mannter.  Gfx6+ hardware needs the
edge flag as a specific vertex shader input, and that input is magically
processed by fixed-function hardware without need for extra shader code.

This flag signals only that the vertex shader input is needed.  It would
be nice if we could decouple adding the vertex shader input from
generating the copy-to-output code, but that has proven to be
challenging.  Not having that code causes other passes to want to
eliminate that shader input.

v2: Convert conditional to assertion.  This pass is only called for
vertex shaders.  Suggested by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
2021-09-17 16:36:08 -07:00
Ian Romanick
3281ccf4b1 iris: Calculate uses_atomic_load_store after all lowering
The lowering passes will soon be moved to another function, so there
won't be any choice.

As a side benefit, this allows eliminating the uses_atomic_load_store
**pointer** parameter from brw_nir_lower_storage_image.  For some reason
crocus was passing false instead of NULL.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
2021-09-17 16:36:08 -07:00
Ian Romanick
e33055874b iris: crocus: Use shader_info::is_arb_asm flag
...instead of looking for "ARB" in the name of the shader.  This matches
the behavior of i965.  Using "ARB" was added in a1ebac3750 ("iris:
Implement ALT mode for ARB_{vertex,fragment}_shader"), but there's no
explanation of why that method was used.

v2: Just use shader_info::is_arb_asm everywhere instead of
iris_uncompiled_shader::use_alt_mode.  Suggested by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12858>
2021-09-17 16:36:08 -07:00
Jordan Justen
c7d8a69249 intel/devinfo: Add devinfo->max_scratch_ids
This consolidates several duplicated pieces of code into devinfo.
max_scratch_ids is an array that provides the max number of threads
for the rendering and compute stages.

This fixes some exceptions missed by crocus for scratch ids on haswell
and cherryview.

It also fills out devinfo->max_scratch_ids properly for stages VS
through CS on Gfx12.5. But, functionally this should not make a
difference as Gfx12.5 already uses COMPUTE for all stages.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12799>
2021-09-13 13:26:51 -07:00
Jordan Justen
32e848aeaa intel: Move subslice_total into devinfo
Reworks:
 * Move asserts for subslice_total into intel_device_info.c (s-b Ken)
 * Drop now unused intel_device_info_subslice_total (s-b Ken)
 * Add comment for subslice_total (Ken)

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12799>
2021-09-13 13:26:23 -07:00
Mykhailo Skorokhodov
e8cbfa95a3 iris: Fix compute shader leak
Variant after creation with the function iris_create_shader_variant
requires to be added to variants. Otherwise there is a memory
leak after execution.

Fixes: 2024d470483("iris: Add the variant to the list as early as possible")
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12645>
2021-09-01 10:02:38 +00:00
Kenneth Graunke
2616e15c01 iris: Rename bo->gtt_offset to bo->address
This is the virtual memory address of the buffer object.  Calling it the
BO's address is a lot more obvious than calling it an offset in one of
the now many graphics translation tables.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12206>
2021-08-11 08:05:00 +00:00
Sergii Melikhov
d16b9b27b0 iris: Fix Null pointer dereferences
Fix the error from Coverity report: CID 1489765

Signed-off-by: Sergii Melikhov <sergii.v.melikhov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12179>
2021-08-04 07:52:35 +00:00
Ian Romanick
5ffbee84a4 intel/compiler: Add id parameter to shader_perf_log callback
There are two problems with the current architecture.

In OpenGL, the id is supposed to be a unique identifier for a particular
log source.  This is done so that applications can (theoretically)
filter particular log messages.  The debug callback infrastructure in
Mesa assigns a uniqe value when a value of 0 is passed in.  This causes
the id to get set once to a unique value for each message.

By passing a stack variable that is initialized to 0 on every call,
every time the same message is logged, it will have a different id.
This isn't great, but it's also not catastrophic.

When threaded shader compiles are used, the id *pointer* is saved and
dereferenced at a possibly much later time on a possibly different
thread.  This causes one thread to access the stack from a different
thread... and that stack frame might not be valid any more. :(

I have not observed any crashes related to this particular issue.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12136>
2021-08-01 23:58:08 +00:00
Ian Romanick
dff0d9911d iris: Split iris_upload_shader in two
Now the part that uploads the shader and the part that finishes the
creation of the shader are separated.  Each now has a more reasonable
number of parameters.

Suggested-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Ian Romanick
42c34e1ac8 iris: Enable threaded shader compilation
There are a couple minor things that can be improved:

1. Eliminate (or reduce) the dynamic allocation of the
threaded_compile_job.

2. For apps like shader-db, improve the case where nr_threads=0.  Right
now this adds thread switching and mutex overhead.

3. Other performance improvements?  iris_uncompiled_shader::variants has
some special properties that make it ripe for replacement with a
lockless list.  Without gathering some data, it's hard to guess what
impact that could have.

v2: Fix whitespace and formatting issues.  Noticed by Ken.
s/threaded_compile_job/iris_threaded_compile_job/g.  Suggested by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Ian Romanick
2d1a2a1c09 iris: Don't pass the shader key to iris_compile_[shader stage]
Use the copy of the key embedded in the compiled shader.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Ian Romanick
2024d47048 iris: Add the variant to the list as early as possible
I tried to find a way to break this into some smaller commits, but
everything is very intertwined. :(

When searching the variants list in the iris_uncompiled_shader, add the
new variant if it is not found.  This will be necessary for threaded
shader compilation.  This conceptually simple change had a bunch of
fallout.

Much of this was at least conceptually borrowed from radeonsi.

- Other threads might find a variant in the list before the variant has
  been compiled.  To accomdate this, add a fence.  Each thread will wait
  on the fence in the variant when searching the list.

- A variant in the list may fail compilation.  To accomodate this, add a
  flag.  All paths will examine iris_compiled_shader::compilation_failed
  before trying to use the variant.

- The race condition between multiple threads trying to create the same
  variant at the same time is handled *before* both thread spend the
  effort to compile the shader.  The means that iris_upload_shader
  cannot change shaders on the caller, so it does not need to return
  anything.

v2: Change "found" parameter of find_or_add_variant to "added."  This
inverts the values returned, and it probably makes uses of the returned
value more easily understood.  Always set the value in the called
function.  Suggested by Ken.

v3: Move shader->compilation_failed check to avoid shader != NULL test.
Rearrange some logic and add a comment in iris_update_compiled_tcs.
Suggested by Ken.  Don't call find_or_add_variant in
iris_create_shader_state.  See
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229#note_1000843
for more details.  Noticed by Ken.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Ian Romanick
0e48b1a99d iris: Allocate shader variant in caller of iris_upload_shader
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Ian Romanick
d0fac4e4f8 iris: Ref count the uncompiled shaders
I tried /just/ ref counting the uncompiled shaders, but that is not
sufficient.  At the very least, it's a problem for blorp shaders that
only have variants (and no uncompiled shader).

This is in prepartion for using the live shader cache.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Ian Romanick
d5ec4716de iris: Merge iris_create_[shader stage]_state funcs into iris_create_shader_state
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Ian Romanick
eafcee4ab1 iris: Unify iris_create_[shader stage]_state functions
v2: Merge old iris_create_shader_state into the new function.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Ian Romanick
0d32ec5467 iris: Unify iris_delete_[shader stage]_state functions
This is in prepartion for using the live shader cache.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Ian Romanick
16b34334dc iris: Fix return type of iris_compile_*
Trivial.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11229>
2021-07-28 17:32:44 +00:00
Jordan Justen
b5514a2236 intel/compiler: Rename brw_nir_lower_image_load_store to brw_nir_lower_storage_image
Reworks:
 * Add crocus

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>
2021-07-21 11:02:15 -07:00
Jason Ekstrand
ae18e1e707 iris: Add support for scratch on XeHP
Rework:
 * Jordan: Handle prog_data->total_scratch==0 in iris_upload_compute_walker
 * Jordan: Resolve iris_get_scratch_space conflict with e2c5ef6cd6
 * Jordan: Rebase on 4256f7ed58. broken
 * Ken: Mostly fixed the rebase
 * Jordan: Fix two small compilation issues
 * Jordan: Rebase on Ken's ("iris: Make a pin_scratch_space() helper")
 * Lionel: Fix a few bugs with scratch handles
 * Jason: Tidy the patch up a bit

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11582>
2021-06-25 00:18:29 +00:00
Jason Ekstrand
f7668d6fe5 anv,iris: Move the SHADER_RELOC enums to brw_compiler.h
They're common between the two drivers and we want to add a couple more
that get emitted from code in src/intel/compiler.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8637>
2021-06-22 21:09:25 +00:00
Caio Marcelo de Oliveira Filho
8af6766062 nir: Move workgroup_size and workgroup_variable_size into common shader_info
Move it out the "cs" sub-struct, since these will be used for other
shader stages in the future.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11225>
2021-06-08 09:23:55 -07:00
Caio Marcelo de Oliveira Filho
c8a7bd0dc8 nir: Rename WORK_GROUP (and similar) to WORKGROUP
Be consistent with other usages in Vulkan and SPIR-V, and the recently
added workgroup_size field.

Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho
a71a780598 nir: Rename nir_intrinsic_load_local_group_size to nir_intrinsic_load_workgroup_size
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Caio Marcelo de Oliveira Filho
430d2206da compiler: Rename local_size to workgroup_size
Acked-by: Emma Anholt <emma@anholt.net>
Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11190>
2021-06-07 22:34:42 +00:00
Kenneth Graunke
32c5d6d1dc iris: Add an alignment parameter to iris_bo_alloc()
This is rarely useful, but after the next patch removes tiling tracking,
this would literally be the only difference between iris_bo_alloc and
iris_bo_alloc_tiled, so we may as well add it.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Kenneth Graunke
539494e767 iris: Add a flags argument to iris_bo_alloc()
Based on a patch by Rafael Antognolli.

We already had a flags parameter, but omitted it from the simple alloc
interface because most callers were passing 0.  However, we'll want to
use it for selecting between device local memory and system memory, and
possibly mmap cacheability modes, in the future.  At that point, many
more callers will want to specify, so I think we should include flags
in iris_bo_alloc() as well.

A few places used the iris_bo_alloc_tiled() function simply to pass
flags, so this patch converts them to use iris_bo_alloc() instead now
it does everything they want.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11169>
2021-06-07 10:35:25 -07:00
Dave Airlie
64fa67dd2f intel/gfx6: move xfb_setup outside the gs compiler into the driver.
This remove the use of a GL thing from the backend compiler

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11097>
2021-06-03 04:05:07 +00:00