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Author SHA1 Message Date
David Heidelberg
9d442b459a ci/freedreno: handle disabling farm properly for each FD/Collabora farm 
To acknowledge for disable freedreno or collabora farm, split definitions into:
 - google-* (a306, a530, a630)
 - collabora-* (a618, a660)

This let us control when jobs will run. This rules gets also used in zink.

Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24665>
 2023-08-17 13:25:46 +00:00
David Heidelberg
e6928735e6 ci/freedreno: switch references, the farm-rules takes care about this 
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24665>
 2023-08-17 13:25:46 +00:00
David Heidelberg
e62527c2d0 ci/freedreno: the tag belongs to the apq8016 only 
Acked-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24665>
 2023-08-17 13:25:46 +00:00
David Heidelberg
bcf5288351 ci/zink: drop a630, which we currently have very low amount available 
It's disabled anyway.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24665>
 2023-08-17 13:25:46 +00:00
David Heidelberg
3a4bdf26e6 ci: remove LAVA prefix from variables which can be used also elsewhere 
At least these two can be easily used in bare-metal or Labgrid setups.

Currently I already have MR for implementing these for Labgrid.

Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24665>
 2023-08-17 13:25:46 +00:00
Mike Blumenkrantz
8f3499bafc Revert "vk/wsi/x11: handle geometry updating more asynchronously" 
This reverts commit 36d5b58317.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24742>
 2023-08-17 12:52:35 +00:00
Karol Herbst
cc2f59d840 rusticl/kernel: optimize nir between lowering io and explicit types 
This is required to get rid of unneeded memory operations, like direct
scratch stores/loads to the same location.

Fixes: 66c6061491 ("rusticl/kernel: get rid of initial function_temp type lowering")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24734>
 2023-08-17 12:34:26 +00:00
Karol Herbst
91029b7e87 nouveau: take glsl_type ref unconditionally 
Calling into tgsi_to_nir requires it, which we are running into with vdpau
and potential other state-trackers still handing us TGSIs over.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9481
Fixes: 5889c13fcd ("nv50,nvc0: Use ttn for tgsi shaders by default")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24740>
 2023-08-17 12:12:56 +00:00
Eric Engestrom
51511892c6 ci: rename *.log to *.txt to work around gitlab bug 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24620>
 2023-08-17 11:36:42 +00:00
Mike Blumenkrantz
0fb9064231 vk/graphics: fix CWE handling with DS3 
VkPipelineColorBlendStateCreateInfo::attachmentCount cannot be used to
generate the CWE mask since it cannot be read if enough dynamic state is in use

instead just pass the max mask and let drivers figure it out

cc: mesa-stable

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24673>
 2023-08-17 11:01:36 +00:00
Christian Gmeiner
e13bdbbd5b etnaviv: switch to float_to_ubyte(..) 
The blob generates following values for e.g. this call.
  glBlendColor(0.002000f, 0.018000f, 0.030000f, 1.0)

  0xff010508, /*   [01424] PE.ALPHA_BLEND_COLOR := B=0x8,G=0x5,R=0x1,A=0xff */

etnaviv's etna_cfloat_to_uint8(..) creates different values.

  0.002000: 0x0
  0.018000: 0x4
  0.030000: 0x7

The same applies for the alpha reference value.

Lets drop this hand-rolled conversion helper to get the same values as
blob.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24727>
 2023-08-17 09:42:20 +00:00
Tapani Pälli
98eecece9b anv: remove assert, size is asserted in the runtime 
Otherwise gets hit on Android CTS tests.

Reported-by: Chris Spencer <spencercw@gmail.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24722>
 2023-08-17 08:36:15 +00:00
Tapani Pälli
2cbe85e6a9 vulkan/runtime: change assert to match specification needs 
Otherwise gets hit on Android CTS tests.

Reported-by: Chris Spencer <spencercw@gmail.com>
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24722>
 2023-08-17 08:36:15 +00:00
Marek Olšák
20d6bb2769 glthread: sync for VDPAU sync functions 
They should sync according to the spec.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24528>
 2023-08-17 04:53:37 +00:00
Helen Koike
3fe0cec4c1 ci: disable duplicated pipelines triggered by marge 
When Marge rebases, it creates two pipelines, one in the author's account
due to the rebase and another one in the target account due to the merge
request event. Depending on the order they appear, Marge erroneously
check the author's pipeline, and since it doesn't have the rights to
start this pipeline, Marge fails to merge because it timed out (since the
pipeline never got run).

Fix this by disabling the author's pipeline (source of type "push") when
a merge request is open.

We only disable when the pipeline is triggered by marge to not affect
running ci_run_n_monitor.py script

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24730>
 2023-08-17 03:45:39 +00:00
Eric Engestrom
9a2a0c6fa3 docs: add one more 23.1.x release 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24735>
 2023-08-17 01:50:47 +00:00
Eric Engestrom
444bc03fa8 docs: update calendar for 23.1.6 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24735>
 2023-08-17 01:50:47 +00:00
Eric Engestrom
42118a7504 docs: add sha256sum for 23.1.6 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24735>
 2023-08-17 01:50:47 +00:00
Eric Engestrom
42ab34522f docs: add release notes for 23.1.6 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24735>
 2023-08-17 01:50:47 +00:00
Emma Anholt
5a8672952a freedreno/a3-5xx: Don't try to emit ISAM for SSBO loads. 
We don't emit tex descriptors for the SSBOs, so if we took this path we'd
fault.

Fixes: 75eb0d2891 ("freedreno/ir3: Allow isam for non-bindless ssbo loads")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24682>
 2023-08-17 01:18:19 +00:00
Emma Anholt
408199236f ci/freedreno: Skip some tests on a5xx that destabilize other tests. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24682>
 2023-08-17 01:18:19 +00:00
Konstantin Seurer
3aa3eb8ddd nir/opt_large_constants: Handle small float arrays 
Handles small arrays of integer, positive floats.

RADV fossils:

Totals from 65 (0.05% of 131205) affected shaders:
Instrs: 30001 -> 29936 (-0.22%); split: -0.39%, +0.18%
CodeSize: 165676 -> 164996 (-0.41%); split: -0.53%, +0.12%
Latency: 126873 -> 127178 (+0.24%); split: -0.29%, +0.53%
InvThroughput: 26640 -> 26895 (+0.96%); split: -0.48%, +1.44%
VClause: 425 -> 371 (-12.71%)
SClause: 982 -> 981 (-0.10%); split: -0.92%, +0.81%
Copies: 2072 -> 1939 (-6.42%); split: -6.52%, +0.10%
PreVGPRs: 1553 -> 1537 (-1.03%)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9000>
 2023-08-16 23:36:29 +00:00
Faith Ekstrand
e38522608f nir/opt_large_constants: Add Small constant handling 
Adds handling for constant arrays that can be lowered to
'(imm >> bit_index) & bit_mask' instead of constant loads.

RADV fossils:

Totals from 70 (0.05% of 131205) affected shaders:
Instrs: 31441 -> 31260 (-0.58%); split: -0.59%, +0.02%
CodeSize: 172104 -> 170568 (-0.89%)
VGPRs: 2608 -> 2616 (+0.31%)
Latency: 296687 -> 280859 (-5.33%); split: -5.34%, +0.00%
InvThroughput: 65491 -> 65696 (+0.31%); split: -0.11%, +0.42%
VClause: 671 -> 646 (-3.73%)
SClause: 1014 -> 964 (-4.93%)
Copies: 1742 -> 1564 (-10.22%); split: -10.51%, +0.29%
PreSGPRs: 2039 -> 2036 (-0.15%)
PreVGPRs: 2014 -> 2017 (+0.15%)

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9000>
 2023-08-16 23:36:29 +00:00
Faith Ekstrand
8ec0fdf017 nir/large_constants: Add read/write_const_values helpers 
The write helper is just pulling code we already have out into a helper
and flipping the order of the loop and the switch.  The read helper will
be useful in the next commit where we add small constant support.  This
keeps the two helpers right next to each other in the file where they're
easy to compare and we can ensure that they stay in sync.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9000>
 2023-08-16 23:36:29 +00:00
Faith Ekstrand
7456ee0523 nir/large_constants: Use nir_component_mask_t 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9000>
 2023-08-16 23:36:29 +00:00
Mohamed Ahmed
783d59eec1 nil: Add support for G8B8_G8R8_UNORM and B8G8_R8G8_UNORM 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24614>
 2023-08-16 22:36:27 +00:00
Mohamed Ahmed
c7f109352d nvk: Enable MIDPOINT_CHROMA_SAMPLES_BIT for multi-planar formats only 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24614>
 2023-08-16 22:36:27 +00:00
Mohamed Ahmed
b9801a3c08 nvk: Enable SEPARATE_RECONSTRUCTION_FILTER_BIT for multi-planar formats only 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24614>
 2023-08-16 22:36:27 +00:00
Faith Ekstrand
4e2830c9ef nir: Clean up nir_op_is_vec() and its callers 
The nir_op_is_vec() helper I added in 842338e2f0 ("nir: Add a
nir_op_is_vec helper") treats nir_op_mov as a vec even though the
semanitcs of the two are different.  In retrospect, this was a mistake
as the previous three fixup commits show.  This commit splits the helper
into two: nir_op_is_vec() and nir_op_is_vec_or_mov() and uses the
appropriate helper at each call site.  Hopefully, this rename will
encurage any future users of these helpers to think about nir_op_mov as
separate from nir_op_vecN and we can avoid these bugs.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
 2023-08-16 21:42:30 +00:00
Faith Ekstrand
408929289a nir: Don't handle nir_op_mov in get_undef_mask in opt_undef 
It's unnecessary because earlier parts of the pass will ensure that a
mov of undef is turned into an undef.  It's also wrong because
nir_op_mov has different semantics from nir_op_vecN when it comes to how
sources map to destination components.

Fixes: 5f26c21e62 ("nir: Expand opt_undef to handle undef channels in a store intrinsic")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
 2023-08-16 21:42:30 +00:00
Faith Ekstrand
f9a17c6fef nir: Handle nir_op_mov properly in opt_shrink_vectors 
If the opcode is a mov, it falls into the nir_alu_src_is_trivial_ssa
case, not the vec case.

Fixes: 94eff7ccd8 ("nir: shrink phi nodes in nir_opt_shrink_vectors")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
 2023-08-16 21:42:30 +00:00
Faith Ekstrand
9bcc9597a5 nir: Fix nir_op_mov handling in nir_collect_src_uniforms 
For mov we need to follow the swizzle for the destination component, not
grab swizzle[0] for some random source.

Fixes: a406fff78a ("nir/inline_uniforms: support vector uniform")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
 2023-08-16 21:42:30 +00:00
Faith Ekstrand
87004fa701 nir: Rework nir_scalar_chase_movs a bit 
The cases in the if are the same as the cases we're using for the early
break.  Just check the things and break if it's not a handleable case.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24704>
 2023-08-16 21:42:30 +00:00
Rhys Perry
cf796aa885 radv: vectorize scratch access 
fossil-db (gfx1100):
Totals from 20 (0.01% of 133461) affected shaders:
Instrs: 49421 -> 49134 (-0.58%)
CodeSize: 251668 -> 249604 (-0.82%); split: -0.83%, +0.01%
Latency: 178126 -> 178412 (+0.16%); split: -0.16%, +0.32%
InvThroughput: 23565 -> 23646 (+0.34%); split: -0.05%, +0.39%
VClause: 957 -> 943 (-1.46%)
Copies: 5770 -> 5801 (+0.54%); split: -0.36%, +0.90%
PreVGPRs: 1368 -> 1359 (-0.66%)

Regressions seem to be a couple of cases of bad RA luck.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24350>
 2023-08-16 19:11:26 +00:00
Rhys Perry
81641b0155 radv: vectorize RT stack access 
fossil-db (gfx1100):
Totals from 10 (0.01% of 133461) affected shaders:
MaxWaves: 176 -> 174 (-1.14%)
Instrs: 39260 -> 38710 (-1.40%)
CodeSize: 202272 -> 197288 (-2.46%)
VGPRs: 888 -> 900 (+1.35%)
Latency: 82306 -> 81762 (-0.66%); split: -0.68%, +0.02%
InvThroughput: 11182 -> 11158 (-0.21%); split: -0.52%, +0.30%
VClause: 721 -> 700 (-2.91%)
SClause: 1147 -> 1148 (+0.09%); split: -0.17%, +0.26%
Copies: 3625 -> 3891 (+7.34%)
PreVGPRs: 819 -> 845 (+3.17%); split: -0.37%, +3.54%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24350>
 2023-08-16 19:11:26 +00:00
Rhys Perry
6f315e6049 nir/opt_load_store_vectorize: support scratch access 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24350>
 2023-08-16 19:11:26 +00:00
Rhys Perry
afb465013f nir/lower_shader_calls: fix align_offset 
I don't think this does anything at the moment, because all accesses are
scalar aligned.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24350>
 2023-08-16 19:11:26 +00:00
Rhys Perry
5a7efccdc3 radv/gfx11: re-enable 0001/1110 clear values 
Since 87444bb7ab, vi_alpha_is_on_msb always
returned false here. The new version matches radeonsi.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400>
 2023-08-16 18:38:24 +00:00
Rhys Perry
19f73f8eb4 radv: support 128bpp comp-to-single with all colors 
Previously, it was restricted to clear colors where R==G==B, but it seems
to work if that isn't the case.

This restriction was probably a leftover from before comp-to-single.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400>
 2023-08-16 18:38:24 +00:00
Rhys Perry
e2c7ce3719 radv: fix 128bpp comp-to-single clears 
We were clearing GB to A, instead of R.

This fixes some red tinting in Overwatch 2 when shadow quality is set to
"Ultra".

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 7451eb1d61 ("radv: implement DCC fast clears with comp-to-single")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9446
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400>
 2023-08-16 18:38:24 +00:00
Rhys Perry
405f3bf990 radv: disable 64-bit color attachments 
These work in some circumstances (dEQP-VK.spirv_assembly.instruction.graphics.16bit_storage.input_output_float_16_to_64.scalar9_tessc),
but I'm not sure if they work in all, blending certainly doesn't work and
this probably wasn't intended in the first place.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: 01bd012edd ("amd: fix 64-bit integer color image clears")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24400>
 2023-08-16 18:38:24 +00:00
Feng Jiang
ad40073e4e meson: Rename dri-vdpau.dyn to dri.dyn 
File 'src/gallium/targets/dri-vdpau.dyn' is now shared by multiple
targets and not just VDPAU, so renamed it to 'dri.dyn' as suggested
by Marek Olšák.

Related link:
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23177#note_2030493

Suggested-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24569>
 2023-08-16 16:57:54 +00:00
Emma Anholt
f0a362d5ba turnip: Move sysmem clears to the first subpass that uses them. 
This is a partial fix for the case where
VK_ATTACHMENT_DESCRIPTION_MAY_ALIAS_BIT and the aliased attachment clears
the attachment that was last used in a previous subpass (we have to move
the stores to the last used subpass, as well).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20994>
 2023-08-16 16:02:51 +00:00
Emma Anholt
21334e3b53 turnip: Move gmem clears and loads to the first subpass that uses them. 
This will help us share gmem space between attachments that aren't used at
the same time.  It's also a correctness fix for
VK_ATTACHMENT_DESCRIPTION_MAY_ALIAS_BIT, because they're supposed to
happen at the first subpass using the attachment, not the start of the
renderpass.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20994>
 2023-08-16 16:02:51 +00:00
Emma Anholt
4cfd021e3f turnip: Save the renderpass's clear values in the cmdbuf state. 
For delaying clears to subpass begin time, I needed to save these until
later.  Turns out this cleans up a good bit of threading these values all
through the command buffer setup.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20994>
 2023-08-16 16:02:51 +00:00
Emma Anholt
139cc91697 turnip: Skip emitting empty CP_COND_REG_EXEC. 
If we ended up emitting no code to be conditionally run, then drop the
whole conditional exec packet.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20994>
 2023-08-16 16:02:51 +00:00
Emma Anholt
c96b2cc511 turnip: Track the first/last subpass an attachment is used in. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20994>
 2023-08-16 16:02:51 +00:00
Emma Anholt
fce10ddf0f vulkan/util: Make multialloc succeed with 0 allocations. 
I wanted to use it for the attachments and clear values of a
vkCmdBeginRenderPass(), but both can be 0 count.  In that case, we would
end up with vk_default_alloc(0,0) because nothing had set the alignment,
and assertion fail instead of allocating 0 bytes.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20994>
 2023-08-16 16:02:51 +00:00
Matt Turner
d142c845d0 Revert "intel/fs: only avoid SIMD32 if strictly inferior in throughput" 
This reverts commit 6b494745be.

The logic is not entirely correct: the comparison is between two
static-analysis estimates of a dynamic system with variables that aren't
captured by the shader source, so using ">" will always have greater potential
to cause regressions whenever the performance difference between the two builds
is something not captured by the static model, no matter how much the model is
improved.

Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9262
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24615>
 2023-08-16 14:56:15 +00:00
Lionel Landwerlin
aebe584586 iris: ensure stalling pipe control before fast clear 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 87149cc545 ("blorp: update and move fast clear PIPE_CONTROLs to drivers")
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24718>
 2023-08-16 13:59:46 +00:00