OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
176,706 Commits 9 Branches 1 Tag
9c8cb69c1585faf85829b7e233bb7617a60d6173
Commit Graph

176706 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Faith Ekstrand
9c8cb69c15 nir: Add a nir_instr_clear_src() helper and use it 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
7af0dcbdfc nir/opt_undef: Don't rewrite a bcsel to mov 
Technically, it's possible because bcsel has more sources than mov.
However, it's not worth the pain of trying to get it right.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00
Faith Ekstrand
53294de682 nir: Take a nir_def * in nir_phi_instr_add_src() 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00
Faith Ekstrand
298a3eebd8 nir: Take a nir_def * in nir_tex_instr_add_src() 
NIR bits were hand-typed.  Driver updates done through the following
semantic patch:

    @@
    expression T, ST, D;
    @@

    -nir_tex_instr_add_src(T, ST, nir_src_for_ssa(D));
    +nir_tex_instr_add_src(T, ST, D);

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00
Christian Gmeiner
6d168b93bc ci/etnaviv: update ci expectation 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24751>
 2023-08-18 00:41:53 +00:00
Karol Herbst
3e0cd6dfb9 nv50: limit max code uploads to 0x8000 
I have no idea why a bigger size doesn't work, the hardware doesn't
complain, but it turns out that uploading big shaders still causes issues
with the old limit. *shrug*

Fixes: 7f63d2ebdb ("nv50: fix code uploads bigger than 0x10000 bytes")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24758>
 2023-08-18 00:24:01 +00:00
Sagar Ghuge
26b2bdcfe0 iris,crocus: drop unnecessary DEBUG_NO_CCS/NO_HIZ checks 
Now isl_surf_supports_ccs helper handles DEBUG_NO_CCS check and
isl_surf_get_hiz_surf handles DEBUG_NO_HIZ, so we don't
need to check it everywhere.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24731>
 2023-08-17 23:49:34 +00:00
Sagar Ghuge
20db03d32f anv,hasvk: drop unnecessary DEBUG_NO_CCS/NO_HIZ checks 
Now isl_surf_supports_ccs helper handles DEBUG_NO_CCS check and
isl_surf_get_hiz_surf handles DEBUG_NO_HIZ, so we don't
need to check it everywhere.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24731>
 2023-08-17 23:49:34 +00:00
Sagar Ghuge
b3affef252 intel/isl: Enable INTEL_DEBUG=noccs/nohiz in ISL helpers 
Let's enable INTEL_DEBUG=noccs in isl_surf_supports_ccs helper and
INTEL_DEBUG=nohiz in isl_surf_get_hiz_surf helper.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24731>
 2023-08-17 23:49:34 +00:00
Emma Anholt
4dfd306454 disk_cache: Disable the "List" test for RO disk cache. 
It uses a poll function that waits for a second hoping for another thread
to catch up, which is not a reliable way to do synchronization.  The test
has been spuriously failing merges on a regular basis recently.

This is issue #9222, which I'm leaving open until the author can fix the test.

Fixes: 3b69b67545 ("util/fossilize_db: add runtime RO foz db loading via FOZ_DBS_DYNAMIC_LIST")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24755>
 2023-08-17 22:52:23 +00:00
Igor Torrente
e595c367d5 zink: Fix one addicional case when running a compositor 
Covers the case where the `dri2_init_screen` calls
`pipe_loader_create_screen_vk` directly and not sets
the device major and minor.

Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24678>
 2023-08-17 20:47:34 +00:00
Kenneth Graunke
d7daf78f62 intel/compiler: Respect NIR_DEBUG_PRINT_INTERNAL for DEBUG_OPTIMIZER 
If the NIR_DEBUG_PRINT_INTERNAL flag is not set, don't print debugging
information for internal shaders in INTEL_DEBUG=optimizer dumps.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24684>
 2023-08-17 18:19:53 +00:00
Emma Anholt
8a8bde69a5 ci/turnip: Add a660 VK coverage. 
1/2 run pre-merge, and a half-hour full run for nightly.  Test status
looks very stable so far.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24737>
 2023-08-17 16:46:25 +00:00
Tapani Pälli
71a2d651c1 anv: refactor batch_set_preemption to use batch_emit_pipe_control 
This makes it easier to hook workarounds for this pipe control.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24690>
 2023-08-17 16:07:59 +00:00
Marek Olšák
f3398683f2 radeonsi: don't use threadID.yz/blockID.yz for compute_blit if they're always 0 
This can improve performance because fewer VGPRs and SGPRs need to be
initialized.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:07 +00:00
Marek Olšák
3952b89ebb radeonsi: don't use threadID.yz/blockID.yz for copy_image if those are always 0 
This can improve performance because fewer VGPRs and SGPRs need to be
initialized.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:07 +00:00
Marek Olšák
47a57416cf radeonsi: don't abort for descriptor failures, let the winsys handle it 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:07 +00:00
Marek Olšák
784492a363 radeon_winsys: add a ctx_set_sw_reset_status callback 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
d7b7332a16 winsys/amdgpu: rework how SW reset status is generated and reported 
This adds a new helper amdgpu_ctx_set_sw_reset_status that sets the SW
status. The logic of which CS is reported as rejected is also changed
slightly, i.e. other contexts no longer affect the current context.

The helper will be exposed to radeonsi to allow reporting non-recoverable
allocation failures and skipped draws.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
4b0f822e26 radeon_winsys: move allow_context_lost from cs_create to ctx_create 
to apply it to all command streams of each context.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
591aaea648 radeonsi: set PIPE_CONTEXT_LOSE_CONTEXT_ON_RESET on aux_context explicitly 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
a7e6d5bad1 radeonsi: rewrite how occlusion query precision is determined for performance 
The precision of occlusion queries is determined from active queries.
Then the register programming is determined from the precision and other
states.

This has the effect that we no longer set PERFECT_ZPASS_COUNTS
for PIPE_QUERY_OCCLUSION_PREDICATE in some cases, resulting in higher
performance.

This also disables conservative occlusion queries for gfx11 because it's
not recommended with late Z, but detecting late Z vs early Z would be
more complicated, so just never use it, which results in better performance
with late Z.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
5d50e77207 radeonsi: enable shader culling by default because it helps Viewperf 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
652593ee23 radeonsi: use num_patches_per_workgroup directly in si_get_ia_multi_vgt_param 
We don't need to pass it via parameters.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
eb90fffa58 radeonsi: move GE_CNTL emission from si_draw into si_emit_vgt_pipeline_state 
It doesn't depend on pipe_draw_info since pipe_context::set_patch_vertices
was added.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
0b2d1fe9cf radeonsi/ci: update gfx11 failures 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
bf579559ed radeonsi: convert si_gfx_resources_add_all_to_bo_list to a state atom 
We can do this as part of the state emit loop instead of having a separate
call in si_draw.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
0125e8d334 radeonsi: merge si_upload_*_descriptors into si_emit_*_shader_pointers 
This removes calling si_upload_graphics_shader_descriptors from si_draw
by moving the uploading into si_emit_graphics_shader_pointers.

Similar for compute.

si_upload_shader_descriptors used to set sctx->shader_pointers_dirty to
pass the mask to the emit function. Now, shader_pointers_dirty is both set
and consumed in si_emit_graphics_shader_pointers and si_emit_compute_-
shader_pointers, so the mask is passed via a local variable.

All places that set descriptors_dirty must now also dirty
the gfx_shader_pointers state for the descriptors to be uploaded.

All places that set bindless_descriptors_dirty must do the same and also
make the cache_flush state dirty because si_emit_graphics_shader_pointers
can now set cache flush flags (through si_upload_bindless_descriptors).

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
2783f4d98e radeonsi: rename shader_pointers state -> gfx_shader_pointers 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
43c8502db1 radeonsi: abort when failing to upload descriptors instead of skipping draws 
This removes a jump from si_draw, and it's a prerequisite for the next
change, which will move uploading descriptors into a state emit function.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
28089e0a66 radeonsi: remove render condition logic from si_draw by reordering atoms 
If we reorder state atoms to emit the render condition after cache flushes,
it will automatically give us the behavior we want in si_draw.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
1e4b539042 radeonsi: handle deferred cache flushes as a state (si_atom) 
This allows us to remove a little bit of code from si_draw, and enable
removing more code in the future.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
c3129b2b83 radeonsi: add a simple version of si_pm4_emit_state for non-shader states 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
3986f27396 radeonsi: merge pm4 state and atom emit loops into one 
This merges both loops in si_draw by tracking which pm4 states are dirty
using the state atom mechanism used for other states. pm4 states now have
to set their own emit function.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
c21ce04014 radeonsi: move code around si_pm4_emit_state into si_pm4_emit_state 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
9ab2a92f27 radeonsi: split direct pm4 emission from si_pm4_emit 
si_pm4_emit_state will be changed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
95cbdcee83 radeonsi: add index parameter into si_atom::emit 
si_pm4_state will use si_atom, and both loops in si_emit_all_states will
be merged. This is a preparation for that because si_pm4_emit needs to know
the state index.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
cd7e20f513 radeonsi: specialize si_draw_rectangle using a C++ template 
We have only 1 variant per gfx version except gfx10+, which have 2.
The motivation is to remove instructions from si_draw_vbo.

Code size before this commit:
    si_draw_vbo<GFX11, no tess, no GS, has NGG, has pairs>: 8616 bytes
    si_draw_rectangle: 272 bytes

Code size after this commit:
    si_draw_vbo<GFX11, no tess, no GS, has NGG, has pairs>: 8534 bytes
    si_draw_rectangle<GFX11, has NGG, has pairs>: 2295 bytes

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
eeb384193c radeonsi: always inline si_prefetch_shaders 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
79e33b8b40 radeonsi: remove the draw counter with primitive restart from the HUD 
not used

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
d7f6985dd4 radeonsi: remove unused check_mem parameter from si_sampler_view_add_buffer 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
1744a8b89c radeonsi: add padding to si_resource to fix Viewperf2020/catiav5test1 perf 
This is needed after the previous commit.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
7d67e10b02 radeonsi: remove splitting IBs that use too much memory 
It was needed for r300, not so much for GCN/RDNA.
This reduces draw overhead.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
a59d387bc2 radeonsi: move si_emit_rasterizer_prim_state out of si_emit_all_states 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
3a9de499b8 radeonsi: move si_emit_spi_map into si_state_shaders.cpp 
to reduce the amount of code in si_state_draw.cpp.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
e234c9fc21 radeonsi: move si_update/emit_tess_io_layout_state into si_state_shaders.cpp 
to reduce the amount of code in si_state_draw.cpp.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
9999660386 radeonsi: remove si_compute.h, move the contents into si_pipe.h 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
a10c46d8a6 radeonsi: update obsolete comments about compiler queues 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
cb7dcdcea0 radeonsi: handle draw user SGPRs as tracked registers 
instead of this custom code doing the same thing. This tracks changes to LS,
ES, and VS user SGPRs separately, so that we can skip more redundant register
changes when enabling/disabling GS and tess. The perf impact should be neutral.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:06 +00:00
Marek Olšák
3f34bd5f3f radeonsi: cosmetic changes to radeon_opt_* macros 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24732>
 2023-08-17 15:34:05 +00:00