Commit Graph

69628 Commits

Author SHA1 Message Date
Matt Turner
9b577d5702 glsl: Transform pow(x, 4) into (x*x)*(x*x).
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-04-24 11:39:01 -07:00
Tapani Pälli
18f44d3030 mesa: fix glGetActiveUniformsiv regression
Commit 7519ddb caused regression to glGetActiveUniformsiv.
Patch adds back validation loop of all given uniforms before
writing any values, not touching params in case of errors
is tested by the conformance suite.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90149
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-24 13:42:24 +03:00
Tapani Pälli
a563689a40 mesa: refactor active attrib queries for glGetProgramiv
Main motivation here is to get rid of iterating IR and
encapsulate queries within program resources.
No functional changes.

Piglit tests calling the modified functionality:

   - gl-get-active-attrib-returns-all-inputs
   - glsl-1.50-get-active-attrib-array
   - getactiveattrib

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Martin Peres <martin.peres@linux.intel.com>
2015-04-24 13:41:54 +03:00
Jason Ekstrand
d5a15a89f0 i965: Add an INTEL_DEBUG=spill option to test spilling
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-23 18:08:21 -07:00
Jason Ekstrand
bf55096207 i965/debug: Use the ull specifier for DEBUG enum defines
The INTEL_DEBUG variable is a uint64_t and if we want a enum value higer
than 32 bits, you need to use ull.  We might as well use it for all of them.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-23 18:08:20 -07:00
Kenneth Graunke
5957da1edb i965: Disallow linear blits that are not cacheline aligned.
The BLT engine on Gen8+ requires linear surfaces to be cacheline
aligned.  This restriction was added as part of converting the BLT to
use 48-bit addressing.

The main user, intel_emit_linear_blit, now handles this properly.
But we might also have linear miptrees; just refuse to blit those.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-04-23 14:16:57 -07:00
Kenneth Graunke
8c17d53823 i965: Make intel_emit_linear_blit handle Gen8+ alignment restrictions.
The BLT engine on Gen8+ requires linear surfaces to be cacheline
aligned.  This restriction was added as part of converting the BLT to
use 48-bit addressing.

intel_emit_linear_blit needs to handle blits that are not cacheline
aligned, as we use it for arbitrary glBufferSubData calls and subrange
mappings.

Since intel_emit_linear_blit uses 1 byte per pixel, we can use the src/dst
pixel X offset field to represent the unaligned portion, and subtract
that from the address so it's cacheline aligned.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88521
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Cc: mesa-stable@lists.freedesktop.org
2015-04-23 14:05:41 -07:00
Pali Rohár
29f0f976bd mapi: Adding missing string.h include.
File glapi_entrypoint.c calls memcpy() function, but does not include
string.h header. So compilation can fail at error: implicit declaration
of function 'memcpy'.

Signed-off-by: Jose Fonseca <jfonseca@vmware.com>
2015-04-23 22:02:07 +01:00
Jose Fonseca
525be9c079 os/os_memory_aligned.h: Handle integer overflow.
This code is only used when our memory debugging wrappers are enabled,
as we use the C runtime functions directly elsewhere.

Tested llvmpipe on Windows w/ memory debugging enabled.

VMware PR894263.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2015-04-23 21:59:43 +01:00
Roland Scheidegger
f2a7fd9943 draw: fix prim ids when there's no gs
We were resetting the prim id count for each run of the prim assembler,
hence this only worked when the draw calls were very small (the exact limit
depending on the vertex size), since larger draw calls get split up.
So, do the same as we do already if there's a gs, reset it to zero explicitly
for every new instance (this possibly could use the same variable but that
isn't doable without some heavy refactoring and I'm not sure it makes sense).

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90130.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>

CC: <mesa-stable@lists.freedesktop.org>
2015-04-23 18:14:22 +02:00
Marek Olšák
ecc7f2ed91 gallium/radeon: don't crash when getting out-of-bounds TEMP references
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2015-04-23 16:14:39 +02:00
Jason Ekstrand
125574d1ef nir/lower_source_mods: Don't propagate register sources
The nir_lower_source_mods pass does a weak form of copy propagation to
clean up all of the mov-with-negate's that get generated.  However, we
weren't properly checking that the sources were SSA and so we could end up
moving a register read which is not, in general, valid.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
296131f467 nir: Rewrite instr_rewrite_src
The old code wasn't correctly handling the case where the new value of the
source contains an indirect.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
d61bd972d8 nir/locals_to_regs: Hanadle indirect accesses of length-1 arrays
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
06f3c98b9d nir/locals_to_regs: Initialize registers with constant initializers
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
4e9b376594 nir/locals_to_regs: Pass around the nir_shader rather than a void * mem_ctx
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
f50f59d3d9 nir: Add a simple growing array data structure
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:41 -07:00
Jason Ekstrand
8b900e7405 nir/types: Make glsl_get_length smarter
Previously, this function returned the number of elements for structures
and arrays and 0 for everything else.  In NIR, this is almost never what
you want because we also treat matricies as arrays so you have to
special-case constantly.  This commit  glsl_get_length treat matrices
as an array of columns by returning the number of columns instead of 0

This also fixes a bug in locals_to_regs caused by not checking for the
matrix case in one place.

v2: Only special-case for matrices and return a length of 0 for vectors as
    we did before.  This was needed to not break the TGSI-based drivers and
    doesn't really affect NIR at the moment.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Tested-by: Rob Clark <robclark@freedesktop.org>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
7e1d21edbf nir: Move get_const_initializer_load from vars_to_ssa to NIR core
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
ba88760202 nir/lower_vars_to_ssa: Pass around the nir_shader instead of a void mem_ctx
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
c68364ac34 i965/nir: Use the correct offsets when handling register indirects
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
e79120afdc nir/print: Print the closing paren on load_const instructions
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
02f03fc0f1 nir/tex: Use the correct return size for query_levels and lod
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
94669cb534 nir: Refactor tex_instr_dest_size to use a switch statement
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:40 -07:00
Jason Ekstrand
73cc76362d nir/lower_vars_to_ssa: Actually look for indirects when determining aliasing
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
2015-04-22 18:10:39 -07:00
Dave Airlie
734bceed86 docs: mark off texture_stencil8 (v2.1)
copy drivers from the stencil_texturing list,
softpipe is definitely broken for stencil texturing
since it uses float, but I'll look at that later.

v2.1: update relnotes

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-23 10:11:27 +10:00
Dave Airlie
6cc49c4ce1 st/mesa: add ARB_texture_stencil8 support (v4)
if we support stencil texturing, enable texture_stencil8
there is no requirement to support native S8 for this,
the texture can be converted to x24s8 fine.

v2: fold fixes from Marek in:
   a) put S8 last in the list
   b) fix renderable to always test for d/s renderable
    fixup the texture case to use a stencil only format
    for picking the format for the texture view.
v3: hit fallback for getteximage
v4: put s8 back in front, it shouldn't get picked now (Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-23 10:11:27 +10:00
Dave Airlie
782e71cc07 mesa: finish implementing ARB_texture_stencil8 (v5)
Parts of this were implemented previously, so finish it off.

v2: fix getteximage falling into the integer check
    add fixes for the FBO paths, (fbo-stencil8 test).

v3: fix getteximage path harder.
v4: remove swapbytes from getteximage path (Ilia)
v5: brown paper bag the swapbytes removal. (Ilia)

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-23 10:11:26 +10:00
Jason Ekstrand
1948880720 mesa: remove the gl_sl_pragmas structure
This code was added by Brian Paul in 2009 but, as far as Matt and I can
tell, it's been dead ever since the new GLSL compiler was added.

Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-22 16:00:35 -07:00
Jason Ekstrand
ae3870df70 i965: Add a brw_compiler structure and store the register sets in it
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
a85c4c9b3f i965: Rename brw_compile to brw_codegen
This name better matches what it's actually used for.  The patch was
generated with the following command:

for file in *; do
sed -i -e s/brw_compile/brw_codegen/g $file
done

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
cfc56fcee3 i965: Use device_info instead of the context for computing vue maps
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
02ccb19495 i965: Use device_info instead of the context in instruction scheduling
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
28e9601d0e i965: Add a devinfo field to backend_visitor and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:34 -07:00
Jason Ekstrand
73bf8f3d6b i965: Remove remaining uses of ctx->Const.UniformBooleanTrue in visitors
Since commit 2881b123, we have used 0/~0 for representing booleans on all
gens.  However, we still had a bunch of places in the visitor code where we
were still referring to ctx->Const.UniformBooleanTrue.  Since this is
always ~0, we can just remove them.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
2bf207b473 i965/vec4: Add a devinfo field to the generator and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
5bda1ff1be i965/fs: Add a devinfo field to the generator and use it for gen checks
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
38dc2ddab4 i965/device_info: Add a supports_simd16_3src flag
This also involves moving revision checking to screen creation time and
passing that into brw_get_device_info so that we can get the right
device_info for early versions of SKL.  Since the only place we used
revision was to check for SIMD16 3-src instruction support, it's safe to
remove the revision field from brw_context.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
85db2aca52 i965/device_info: Add a HSW_FEATURES macro
It's basically just a copy of GEN7_FEATURES only with is_haswell set

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
9c89e47806 i965: Make the annotation code take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
5cb91db619 i965/fs: Remove the GL context from the generator
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:33 -07:00
Jason Ekstrand
61c4702489 i965: Remove the context field from brw_compiler
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
639314d40e i965: Make the disassembler take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
c3e5f32840 i965: Make instruction compaction take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
4e9c79c847 i965: Make the brw_inst helpers take a device_info instead of a context
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
6219a8f098 i965/eu: Add a devinfo parameter to brw_compile
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
a921475c22 i965: Do better fake context setup in unit tests
In future tests, we will start relying on devinfo and not just brw in the
compiler.  Changing this now keeps these tests from failing in the future.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:32 -07:00
Jason Ekstrand
ceb6e5eebe i965: Remove the context parameter from brw_texture_offset
It wasn't really being used anyway.  We used it to assert that gpu_shader5
is supported in the back-end but that should be caught by the front-end.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-04-22 16:00:31 -07:00
Dave Airlie
8a41cd2407 softpipe: fix stencil write to use an integer value
This fixes a number of regressions since
61393bdcdc
u_tile: fix stencil texturing tests under softpipe

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89960
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-04-23 08:32:30 +10:00
Anuj Phogat
2c08e3b8ea mesa: Fix typo in a comment
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2015-04-22 15:24:43 -07:00