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Author SHA1 Message Date
Gert Wollny
95cea62a9b virgl: Report CONSTANT_BUFFER_SIZE according to GL_MAX_UNIFORM_BLOCK_SIZE 
GL_MAX_FRAGMENT_UNIFORM_COMPONENTS may not report a size that
is useful to calculate the supported UBO size. Use the value
GL_MAX_UNIFORM_BLOCK_SIZE instead when the host supports this.

Related: https://gitlab.freedesktop.org/virgl/virglrenderer/-/issues/286
Fixes: 5b683ba19a
  virgl: Only progagate the uniform numbers if the numbers are actually right

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18512>
 2022-09-10 15:23:57 +00:00
Gert Wollny
d5394296be r600: set nir option lower_cs_local_index_to_id 
Fixes:  7662a5e9d3
  mesa: Remove PIPE_CAP_CS_DERIVED_SYSTEM_VALUES_SUPPORTED/lower_cs_derived.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18518>
 2022-09-10 07:40:37 +00:00
Isaac Bosompem
36d050210e virgl: Set use_staging in resource_from_handle 
This flag controls virgl's behavior when buffers
are accessed on the guest through Mesa's GBM interface.

As such, this flag needs to be consistent in both the
resource creation and fd import case. Previously, the
fd import resource's flag value would be inconsistent
with the original resource's value.

This patch fixes this by inferring the value of this flag
based on the resource's size.

Signed-Off By: Isaac Bosompem <mrisaacb@google.com>

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18477>
 2022-09-10 06:29:00 +00:00
Alyssa Rosenzweig
e6cdffa0fc docs/envvars: Document Asahi variables 
There aren't too many.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18508>
 2022-09-09 21:25:55 +00:00
Mike Blumenkrantz
43a8a92430 zink: add a ci skip for anv 
taking too long

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18523>
 2022-09-09 18:42:56 +00:00
Roman Stratiienko
b8c026a365 lima: Ensure jobs initialized before calling lima_job_fini() 
To avoid crash during cleanup if lima_context_create fails.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7196
Signed-off-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Vasily Khoruzhick <anarsoul@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18407>
 2022-09-09 18:25:17 +00:00
Caio Oliveira
027b8b4249 intel/compiler: Add helper for barrier message payload setup for gfx >= 125 
CS-like and TCS control barriers converged in gfx >= 125, so use a
common helper for the message payload setup.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18362>
 2022-09-09 09:35:08 -07:00
Caio Oliveira
55db3aaa3a intel/compiler: Create fs_visitor::emit_tcs_barrier() 
Allow us to implement this in brw_fs_visitor.cpp, which then will
let us deduplicate code between the CS-like barrier and the TCS
barrier in a later patch.

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18362>
 2022-09-09 09:35:08 -07:00
Danilo Krummrich
b97590371a nv50/ir: handle U8/U16 integers converting to U64 
We can't directly convert from unsigned integers smaller than 64 bit to
unsigned 64 bit integers. Hence, converting from 32 bit to 64 bit is
handled by just merging with 0. To support U8/U16 integers handle them
just the same way.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:32:30 +02:00
Danilo Krummrich
caba679e56 nv50/ir: handle S8/S16 integers converting to S64 
We can't convert directly from signed integers smaller 64 bit to signed
64 bit integers. For 32 bit integers this is handled with SHR and MERGE.
In order to also support 8/16 bit singed integers convert them to 32 bit
first.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:32:27 +02:00
Danilo Krummrich
2aaa315eee nv50/ir: split and cvt 64bit integers for {i,u}2{i,u}{8,16} 
We can't convert from a 64 bit integer to any integer smaller than
64 bit directly, hence split the value first and then cvt / mov to the
target type.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:32:24 +02:00
Danilo Krummrich
8ccba4ea5c nv50/ir: add intermediate conversion for f2{i,u}{8,16} 
Directly converting from a float to an 8 bit integer and from a 64 bit
float to an integer smaller than 32 bit is not supported, therefore add
an intermediate conversion to an 32 bit integer.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:32:22 +02:00
Danilo Krummrich
6a9825bc1b nv50/ir/nir: always round towards zero for f2i/f2u 
Conversions to integers must be rounded towards zero, hence, actually
do this for all integers including 8/16 bit sources.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:32:18 +02:00
Danilo Krummrich
109d56f612 nv50/ir/nir: convert 8/16 bit src to 32 bit for {i,u}2f64 
Converting signed and unsigned integers from 8/16 bit sources to a 64 bit
floating point destination (i2f64 / u2f64) isn't possible, hence convert
the source to 32 bit first.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:32:16 +02:00
Danilo Krummrich
78fc5e3773 nv50/ir: add isUnsignedIntType() and isIntType() helpers 
Add helper functions to check whether a DataType is an unsigned integer
type and whether a DataType is either an unsigned or signed integer
type.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:32:13 +02:00
Danilo Krummrich
ec60dcd870 nv50/ir/nir: avoid 8/16 bit dest regs for OP_MOV 
Instructions like

  mov u16 %r78s 0x00ff (0)

are dropped, since they're not supported by the HW, hence avoid using
8/16 bit destination registers for OP_MOV and use the full width of the
register instead.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:32:10 +02:00
Danilo Krummrich
6e2fda15f1 nv50/ir/nir: convert to 32 bit for all OP_SET opcodes 
The 'set' instruction does distinguish between signed and unsigned, but
always treats values as 32 bit. For singed values < 0 with a bit width
smaller than 32 bit this falsely results in treating it as a positive
value.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:32:05 +02:00
Danilo Krummrich
cd53bcd325 nv50/ir/nir: add conversion ops for bit width < 32 
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Signed-off-by: Danilo Krummrich <dakr@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18109>
 2022-09-09 17:31:57 +02:00
Tomeu Vizoso
79b92af9da gallium: Add PIPE_CAP_QUERY_TIMESTAMP_BITS 
For those drivers that don't make full use of the 64 bits in
pipe_query_result.u64.

Applications will make use of it via GL_QUERY_COUNTER_BITS to handle
when the value rolls over.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10770>
 2022-09-09 14:49:12 +02:00
Iago Toral Quiroga
ca330f7f04 v3dv: implement VK_EXT_memory_budget 
This is mostly based on Turnip's implementation.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18483>
 2022-09-09 11:14:03 +00:00
Iago Toral Quiroga
a1e723cace broadcom/simulator: add a helper to get the amount of free heap memory 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18483>
 2022-09-09 11:14:03 +00:00
Iago Toral Quiroga
861fff6339 v3dv: limit heap size to 4GB 
GPU addresses are 32-bit, so we can't address more than 4GB.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18483>
 2022-09-09 11:14:03 +00:00
Iago Toral Quiroga
b5b3a1634f v3dv: fix variable type 
The heap size is a 64-bit value.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18483>
 2022-09-09 11:14:03 +00:00
Iago Toral Quiroga
f27d3a08c6 v3dv: expose VK_EXT_attachment_feeback_loop_layout 
We don't have any special requirements for this, so we can just expose
the extension.

The tests in CTS have an issue where they only check if a format is
supported for sampling but don't check if an image with that format
can be created for sampling. In our case, since we can't sample
1D depth/stencil images, this causes affected tests to crash in the
simulator (they pass on the device though). There is an issue with
a fix here:

https://gitlab.khronos.org/Tracker/vk-gl-cts/-/issues/3923

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18489>
 2022-09-09 12:31:02 +02:00
Iago Toral Quiroga
bcc37775f1 v3dv: implement VK_EXT_depth_clip_control 
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18387>
 2022-09-09 10:03:58 +00:00
Karmjit Mahil
c6a9897b76 pvr: Add depth_bias_array handling on dbenable. 
On dbenable depth bias is enabled so we need to write the depth
bias data into the depth_bias_array (which gets uploaded to the
device) and also setup the depth bias index (used in the control
stream).

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18438>
 2022-09-09 09:46:27 +00:00
Jason Ekstrand
441598eca6 radv: Switch to dynamic rendering only 
Also, update list of expected failures.

dEQP-VK.image.sample_texture.*_bit_compressed_format_two_samplers_*
now reliably pass on Polaris10 (GFX8) and Pitcairn (GFX6).

Stoney has new failures but given there is already a lot of
depth/stencil resolve failures, we shouldn't worry about them.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15587>
 2022-09-09 09:24:59 +00:00
Jason Ekstrand
08e1af52ee radv: Leave image layouts alone when doing HW MSAA resolves 
If the current layout supports DCC, we initialize it.  There's no reason
why we can't leave it in that layout and need to stomp it to
COLOR_ATTACHMENT_OPTIMAL.  If the layout supports DCC, it's effectively
identical to COLOR_ATTACHMENT_OPTIMAL anyway.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15587>
 2022-09-09 09:24:59 +00:00
Jason Ekstrand
0461d59098 radv: Only copy the render area from VRS to HTILE 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15587>
 2022-09-09 09:24:59 +00:00
Jason Ekstrand
c7d0d328d5 radv: Set the window scissor to the render area, not framebuffer 
With dynamic rendering, the concept of framebuffer dimensions goes away
so this won't make sense.  Even with render passes, the render area is
guaranteed to be inside the framebuffer so we may as well clip to the
potentially smaller render area.  This commit also moves window scissor
setup to CmdBeginRenderPass2() time.  This should be fine, even for meta
ops, as the only meta ops which happen inside a render pass need the
same render area as the render pass itself.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15587>
 2022-09-09 09:24:59 +00:00
Martin Roukala (né Peres)
bbb3749077 radv/ci: document an unstable test 
The test seem to fail when run in conjunction with other tests. This
got revealed after I introduced parrallelism in the VKCTS execution on
VanGogh.

This was caught by pre-merge CI, but idiot me thought this was a
flake... and did not try re-running the job to verify...</BrownBag>

Reference: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7220
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18480>
 2022-09-09 08:38:10 +00:00
Mark Collins
21aec585c1 tu: Retain allocated CSes in tu_autotune_on_submit 
It was determined that a significant part of queue submission
overhead was from allocation/freeing of CSes constantly inside
`tu_autotune_on_submit`. This has been reduced by retaining
instances of `tu_submission_data` with their corresponding
CSes, this results in entirely eliminating that overhead as
resetting a CS is a very cheap operation compared to allocation
or even freeing it wholly.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18461>
 2022-09-09 07:57:54 +00:00
Gert Wollny
762d377292 mesa/glsl: Add support for NV_shader_noperspective_interpolation 
With EXT_gpu_shader4 the support is already in place, we just
have to allow it in glsl and expose the extension name.

v2: Check whether the extension is enabled in the shader (Adam Jackson)
v3: Don't check GLES version in lexer (mareko)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18460>
 2022-09-09 07:22:20 +00:00
Samuel Pitoiset
c26e0e5070 radv: fix hw remapping of MRT holes with color attachments without export 
If a color attachment is used in a render pass but not exported by the
FS, cb_shader_mask would be non-zero for this MRT. Though, to make sure
the hw remapping of SPI_SHADER_COL_FORMAT<->CB_SHADER_MASK works as
expected, we should also clear the unused color attachment in
CB_SHADER_MASK. Otherwise, the hw will remap to the wrong MRT.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7221
Fixes: 8fcb4aa0eb ("radv: compact MRTs to save PS export memory space")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18491>
 2022-09-09 07:03:00 +00:00
Samuel Pitoiset
f8209ddc5b radv: import PS epilog from libraries if present 
This enables using PS epilogs with GPL.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>
 2022-09-09 06:26:27 +00:00
Samuel Pitoiset
dcff89994c radv: add support for emitting and prefetching PS epilogs 
Long jumps seem to be slow and prefetching might help.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>
 2022-09-09 06:26:27 +00:00
Samuel Pitoiset
4ba84b4d64 radv: create a PS epilog from a library without the main FS 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>
 2022-09-09 06:26:27 +00:00
Samuel Pitoiset
3f5d31ae69 radv: keep track of the code size for VS prologs and PS epilogs 
This will be used to prefetch PS epilogs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>
 2022-09-09 06:26:27 +00:00
Samuel Pitoiset
8c4e33cdab radv: do not try to remove color exports for FS that need an epilog 
The color format would be zero and all exports would be removed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>
 2022-09-09 06:26:27 +00:00
Samuel Pitoiset
b5e25e3a30 radv: add radv_remove_color_exports() helper 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>
 2022-09-09 06:26:27 +00:00
Samuel Pitoiset
baf3924631 radv: do not lower color exports for FS that need an epilog 
When building the main FS with GPL we don't know the color export
formats.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18255>
 2022-09-09 06:26:27 +00:00
Samuel Pitoiset
a14354cf21 radv: fix reporting RT shaders in RGP 
RGP expects a compute bind point. This allows it to show ISA of RT
shaders and also enables instruction timing.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7213
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18496>
 2022-09-09 05:51:23 +00:00
Samuel Pitoiset
2e04aeb1e5 radv: capture RT pipelines from the SQTT layer 
They were just not recorded.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18496>
 2022-09-09 05:51:23 +00:00
Samuel Pitoiset
8866e6582d radv: emit SQTT markers for RT related commands 
This reports RT commands like vkCmdTraceRaysKHR and
vkCmdBuildAccelerationStructuresKHR in RGP.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18496>
 2022-09-09 05:51:23 +00:00
Adam Jackson
057c58b39b glx: Use XSaveContext, delete glxhash.c 
libX11 has a perfectly good XID-based hash table we can be using, let's.

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18474>
 2022-09-08 23:43:42 +00:00
Yiwei Zhang
63703de443 venus: force synchronous submission for external signal semaphore 
This is to ensure semaphore export under globalFencing represents the
correct submission.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18475>
 2022-09-08 21:46:40 +00:00
Yiwei Zhang
0a3647fb88 venus: clean up vn_QueueSubmit 
and ensure all submissions are synchronous upon NO_ASYNC_QUEUE_SUBMIT

No other intended change in behavior.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18475>
 2022-09-08 21:46:40 +00:00
Emma Anholt
f46064d40f Revert "ci: disable the freedreno farm." 
It's been moved back to the lab network, which hopefully has been
stabilized.  This reverts commit 13f36d66ad.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18505>
 2022-09-08 21:08:15 +00:00
Timur Kristóf
e58a5cca02 nir/gather_info: Clear cross-invocation output mask. 
Similar to how other I/O info is cleared at the beginning
of gather_info we should also clear the cross-invocation
mesh shader output mask.

Fixes: 112a856813
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18464>
 2022-09-08 20:26:03 +00:00
Timur Kristóf
c80d811403 nir/lower_system_values: Add shortcut for 1D workgroups. 
When the workgroup is 1 dimensional, simply use	a vec3
filled with zeroes and the local invocation index.
This is is better than lower_id_to_index + constant folding,
because this way we don't leave behind extra ALU instrs.

Note, this is relevant to mesh shaders on RDNA2 because
it enables us to better detect cross-invocation output
access.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18464>
 2022-09-08 20:26:03 +00:00