Commit Graph

197263 Commits

Author SHA1 Message Date
David Rosca
93d434362b frontends/va: Move encode fence to coded buffer
Instead of using the surface fence, store the fence in buffer.
This way the fence won't be overwritten when encoding multiple frames
using the same source surface and SyncBuffer will sync the correct job.
Also fixes possible crash when destroying coded buffer before calling
SyncSurface and possible leak when destroying or reusing coded buffer
with pending encode job without calling SyncSurface/SyncBuffer.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31959>
2024-11-05 09:42:55 +00:00
Samuel Pitoiset
9bcf17ef5a aco: add support for the trap handler shader on GFX11
This has been verified on navi31.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31960>
2024-11-05 07:58:38 +00:00
Samuel Pitoiset
6d5a2ae928 aco: clear the current wave exception in the trap handler
This is required to re-enable VALU instructions in this wave, only
float exception seem to be affected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31960>
2024-11-05 07:58:38 +00:00
Samuel Pitoiset
e85fc0f869 aco: fix validation for VOP1 instructions without any dest/src
Like v_clrexcp.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31960>
2024-11-05 07:58:38 +00:00
Samuel Pitoiset
81f4670ed6 radv,aco: dump all SGPRS from the trap handler
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31960>
2024-11-05 07:58:38 +00:00
Samuel Pitoiset
45d56d9395 radv: set missing shader info values for the trap handler
This fixes an assert in radv_precompute_registers_pgm() on GFX11
because it was considered a vertex shader.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31962>
2024-11-05 07:11:30 +00:00
itycodes
10c92cbd39 intel: Fix a typo in intel_device_info.c:has_get_tiling
The structs are of equal size and both ioctls were added at the same
time, so the functionality is equivalent, but it's nonetheless the
incorrect type being passed.

Signed-off-by: tranquillitycodes@proton.me
Fixes: 762e601f77
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31974>
2024-11-05 04:31:50 +01:00
Chia-I Wu
07ca1bbb05 panvk: expand meta stage and access flags
VK_PIPELINE_STAGE_2_VERTEX_INPUT_BIT is equivalent to the logical OR of:

 - VK_PIPELINE_STAGE_2_INDEX_INPUT_BIT
 - VK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT

VK_ACCESS_2_SHADER_READ_BIT is equivalent to the logical OR of:

 - VK_ACCESS_2_SHADER_SAMPLED_READ_BIT
 - VK_ACCESS_2_SHADER_STORAGE_READ_BIT

VK_ACCESS_2_SHADER_WRITE_BIT is equivalent to
VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31898>
2024-11-04 22:22:13 +00:00
Chia-I Wu
c61116a2a6 panvk: fix truncated access flags in collect_cs_deps
Use 64-bit VkAccessFlags2 instead of 32-bit VkAccessFlags.

Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31898>
2024-11-04 22:22:12 +00:00
Deborah Brouwer
a02dd9b36f freedreno/ci: convert a630-gles-asan to toml suite
Currently a630-gles-asan is running deqp-runner directly rather than
through a toml suite configuration

Convert a630-gles-asan to use a toml suite. This makes it similar to other
freedreno jobs. The two substantive consequences are:
* it runs tests in default groups of 500 instead of 5000
* it skips tests listed in `freedreno-a6xx-skips.txt`

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31916>
2024-11-04 13:14:23 -08:00
Deborah Brouwer
37602ad653 ci: simplify .baremetal-arm64-asan-test
The `.baremetal-arm64-asan-test` job extends `.baremetal-test` and
`.use-debian/baremetal_arm64_test` but doing this is unnecessary because
all of the arm64-asan jobs also inherit the `.baremetal-test-arm64` job
which does the same thing.

Furthermore when `.baremetal-arm64-asan-test` appears last in the list of
extended jobs, as in the case of the `a630-gles-asan`, the general rules
inherited by `.baremetal-arm64-asan-test` override the more specific
driver rules and prevent the driver job from appearing in the merge
pipeline.

Simply bumping the `.baremetal-arm64-asan-test` job back earlier in the
list of extended jobs would allow the driver rules to take precedence but
then the S3_ARTIFACT_NAME, provided by `.baremetal-arm64-asan-test`, which
is specific for asan builds, is overridden.

By removing the inherited jobs from the `.baremetal-arm64-asan-test`,
this job can continue to provide the asan artifact without interfering
with the driver jobs appearing in the merge pipeline.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31916>
2024-11-04 13:14:22 -08:00
Deborah Brouwer
14f929035f ci: simplify .baremetal-arm32-asan-test
The `.baremetal-arm32-asan-test` job extends `.baremetal-test` and
`.use-debian/baremetal_arm32_test` but doing this is unnecessary because
the only job that extends `.baremetal-arm32-asan-test`, i.e.
`gc2000-gles2-asan`, also indirectly inherits `.baremetal-test-arm32`
which does the same thing.

Duplicating the extended jobs in `.baremetal-arm32-asan-test` can
unnecessarily cause rule overrides and unexpectedly remove jobs from
pipelines.

Remove the inherited jobs from the `.baremetal-arm32-asan-test` job so
that (when the necessary farm is enabled) `gc2000-gles2-asan` will appear
in pipelines as expected.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31916>
2024-11-04 13:14:22 -08:00
Felix DeGrood
99e8502013 intel/measure: defer file open until first write
Fixes abort on steam.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31938>
2024-11-04 20:25:14 +00:00
Felix DeGrood
f345019830 intel/measure: add nogl feature
Do not trigger INTEL_MEASURE for ogl apps with INTEL_MEASURE=nogl

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31938>
2024-11-04 20:25:14 +00:00
Marek Olšák
5d09374ffe radeonsi/gfx12: fix AMD_DEBUG=nodcc not working
surface->modifier is always 0 here. We should use the parameter instead.

Fixes: 3d05d86d88 (radeonsi/gfx12: add DCC)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31910>
2024-11-04 19:45:54 +00:00
Marek Olšák
755fb7a262 amd: move Tonga and Iceland TC-compat HTILE workarounds to ac_gpu_info.c
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31910>
2024-11-04 19:45:54 +00:00
Marek Olšák
047532b1e1 radeonsi/gfx11: fix Z corruption for Blender
The corruption only happens with non-TC-compatible HTILE, so always use
TC-compatible HTILE.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11891
Cc: mesa-stable

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31910>
2024-11-04 19:45:54 +00:00
Benjamin Lee
7ca01506c9 panvk: hack to improve depth clipping with small viewport depth range
Fixes 'dEQP-VK.draw.renderpass.inverted_depth_ranges.nodepthclamp_deltazero'.
This is an unfortunate fix, but it's not a situation that's likely to
come up in practice. The proprietary driver does something similar.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Co-authored-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Lars-Ivar Hesselberg Simonsen <lars-ivar.simonsen@arm.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31879>
2024-11-04 14:02:36 +00:00
Danylo Piliaiev
fd5c94b8c7 ir3: Fix cat5 parsing with a1.x src present
Such instructions were failing to be parsed:

 sam.s2en.uniform.base1 (f32)(xyz)r1.w, r0.z, r1.y, a1.x
 saml.s2en.uniform.base1 (f32)(xyzw)r13.x, r0.w, r13.w, r11.w, a1.x
 isam.v.s2en.uniform.base0 (u32)(xyzw)r1.y, r0.x+3, r2.y

Also fix fixup_cat5_s2en which incorrectly rotated instruction sources.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31952>
2024-11-04 13:26:54 +00:00
Martin Krastev
cfbe30745a svga/ci: disable vmware farm
Disable farm for investigating an intermittent kernel
driver crash under piglit and linux v6.8.0-ga49175f6ce23

Signed-off-by: Martin Krastev <martin.krastev@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31956>
2024-11-04 13:19:10 +00:00
Georg Lehmann
a7f6294f90 radv: use nir_opt_frag_coord_to_pixel_coord
Foz-DB Navi21:
Totals from 1648 (2.08% of 79395) affected shaders:
MaxWaves: 44918 -> 44950 (+0.07%); split: +0.09%, -0.02%
Instrs: 1004193 -> 1001179 (-0.30%); split: -0.33%, +0.03%
CodeSize: 5486412 -> 5486592 (+0.00%); split: -0.08%, +0.09%
VGPRs: 56664 -> 56552 (-0.20%); split: -0.93%, +0.73%
Latency: 15430894 -> 15435320 (+0.03%); split: -0.12%, +0.15%
InvThroughput: 3097789 -> 3092861 (-0.16%); split: -0.20%, +0.04%
VClause: 18757 -> 18793 (+0.19%); split: -0.13%, +0.32%
SClause: 34475 -> 34495 (+0.06%); split: -0.11%, +0.17%
Copies: 66195 -> 66150 (-0.07%); split: -0.88%, +0.81%
Branches: 23035 -> 23033 (-0.01%)
PreVGPRs: 42235 -> 41724 (-1.21%); split: -1.32%, +0.11%
VALU: 709730 -> 706662 (-0.43%); split: -0.47%, +0.04%
SALU: 111731 -> 111722 (-0.01%); split: -0.02%, +0.01%
VMEM: 25988 -> 25987 (-0.00%)

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31864>
2024-11-04 12:34:31 +00:00
Georg Lehmann
bedd6310dc nir: add nir_opt_frag_coord_to_pixel_coord
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31864>
2024-11-04 12:34:31 +00:00
Georg Lehmann
a58d2b59e9 aco: implement load_pixel_coord
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31864>
2024-11-04 12:34:30 +00:00
Georg Lehmann
42d5cb62bb ac/llvm: implement load_pixel_coord
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31864>
2024-11-04 12:34:30 +00:00
Georg Lehmann
a2a9e93e72 radv: add support for load_pixel_coord
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31864>
2024-11-04 12:34:30 +00:00
Georg Lehmann
2f830f9b94 nir: add SYSTEM_VALUE_PIXEL_COORD
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31864>
2024-11-04 12:34:30 +00:00
Vignesh Raman
1c36699b8d Revert "ci: disable Collabora's farm due to maintenance"
This reverts commit 3637570725.

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31949>
2024-11-04 11:35:19 +00:00
Samuel Pitoiset
1fa0fe1e0c aco: add support for the trap handler shader on GFX9-GFX10.3
This has been tested on navi21.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31926>
2024-11-04 10:48:52 +00:00
Samuel Pitoiset
281eb14df8 aco: fix reading registers from the trap handler shader
It should read 32-bit values, otherwise some MSB are 0 and it's missing
some information.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31926>
2024-11-04 10:48:52 +00:00
Erik Faye-Lund
94cf47e43f docs/features: mark off missing panvk feature
This was recenctly wired up, but we forgot to expose it in features.txt.
Let's add it!

Fixes: e474d4ebee ("panvk: add support for VK_KHR_timeline_semaphore")
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31932>
2024-11-04 10:13:00 +01:00
Valentine Burley
d205d7ed58 lavapipe: Block YCbCr formats from getting blit feature flags
Block all YCbCr formats from getting blit feature flags by using
vk_format_ycbcr_info.

Fixes dEQP-VK.api.info.format_properties.g10x6_b10x6r10x6_2plane_420_unorm_3pack16
and dEQP-VK.api.info.format_properties.g12x4_b12x4r12x4_2plane_420_unorm_3pack16.

Fixes: ab298b9c3a ("lavapipe: Remap 10 and 12 bit formats to 16 bit formats")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31863>
2024-11-04 08:18:23 +00:00
Sergi Blanch Torne
3637570725 ci: disable Collabora's farm due to maintenance
Planned downtime in the farm:
* Start: 2024-11-04 08:00 UTC
* End: 2024-11-04 14:00 UTC

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31816>
2024-11-04 06:35:50 +00:00
Lucas Fryzek
159fb9691d lp: Only close udmabuf handle if its valid
Also change ifdef's from just `HAVE_LIBDRM` to check for both LIBDRM
and for UDMABUF HEADER. preventing unbalanced guards preventing part of
the code from being included if you just have LIBDRM or just have the
udmabuf headers.

Fixes: 4cfaf10c ("llvmpipe: Only use udmabuf with libdrm")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31877>
2024-11-03 19:27:28 +00:00
Sviatoslav Peleshko
3a962a28e7 intel/elk_asm: Add BranchCtrl support
We emit it for gfx8, so the assembler should support it too.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31747>
2024-11-02 18:01:20 +00:00
Sviatoslav Peleshko
cd4c328408 intel/elk: List all instructions that have BranchCtrl bit
Previously this bit was not clearly documented in PRMs, but gfx12 PRMs
finally list all the instructions where it is present.

Although it's unclear if it's functional for anything other than "if",
"else", and "goto", we probably still should acknowledge its existence
in other instructions.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31747>
2024-11-02 18:01:20 +00:00
Sviatoslav Peleshko
445df8d611 intel/brw_asm: Add BranchCtrl support
We emit it for gfx9, so the assembler should support it too.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31747>
2024-11-02 18:01:19 +00:00
Sviatoslav Peleshko
aea7366613 intel/brw: List all instructions that have BranchCtrl bit
Previously this bit was not clearly documented in PRMs, but gfx12 PRMs
finally list all the instructions where it is present.

Although it's unclear if it's functional for anything other than "if",
"else", and "goto", we probably still should acknowledge its existence
in other instructions.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31747>
2024-11-02 18:01:19 +00:00
David Rosca
ab1479ae6a pipe: Remove PIPE_VIDEO_CAP_ENC_SUPPORTS_ASYNC_OPERATION
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31933>
2024-11-02 07:02:55 +00:00
David Rosca
baa96bce45 frontends/va: Stop using PIPE_VIDEO_CAP_ENC_SUPPORTS_ASYNC_OPERATION
The gallium interface always expected the driver to support multiple
in-flight feedbacks, so this shouldn't have been needed in the first
place.
Even if the driver wouldn't support it, we still can't force
applications to sync after each frame. In fact, the old VCE dual
instance feature relied on the vaSyncSurface not being called every
frame.

Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31933>
2024-11-02 07:02:55 +00:00
David Rosca
fa65224c86 frontends/va: Remove H264 encode delayed flush
This was added for the VCE dual instance feature and it tries
to delay flush such as the flush is done only every second frame.
For this it requires applications not to call vaSyncSurface after
each vaEndPicture, otherwise every frame will be flushed.
When this was implemented in 2016, libva and applications were
different. Now applications will always sync surface after each
end frame, making this feature completely non-functional.

Another issue is that this is incorrect, the flush cannot be delayed
and every vaEndPicture needs to flush. This is needed to ensure
interop with other APIs (eg. sharing dmabufs with GL) works correctly.
Delaying the flush would also mean submitting the same surface
every frame for encoding (and changing the surface contents before
encoding each frame) will not work.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31933>
2024-11-02 07:02:55 +00:00
David Rosca
d6c08a4345 radeonsi/vce: Remove dual instance support
This feature requires only flushing every second frame (submit two
encode jobs together), but that's not possible with VAAPI where
vaEndPicture is required to flush.
Current implementation in va frontend needs application to not call
vaSyncSurface after each vaEndPicture, but all applications actually
sync surface after each end picture so it will always flush after each
frame.

Remove this feature as the frontend implementation is wrong and it's not
even used currently because applications don't behave the way this expects.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Boyuan Zhang <Boyuan.Zhang@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31933>
2024-11-02 07:02:55 +00:00
Patrick Lerda
5c63d7a916 r600: fix sfn_nir_legalize_image_load_store cubearray behavior
This change fixes the calculation of the number of cubemap
images which requires a 6x multiplier.

This commit is inspired from nir_lower_robust_access and fixes
at least the following tests on cayman:
spec/arb_shader_image_load_store/layer/imagecubearray/layered binding test: fail pass
spec/arb_shader_image_load_store/max-size/imagecubearray max size test/8x8x2046x1: fail pass

Fixes: 27f5157777 ("r600/sfn: Add lowering pass to legalize image access")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31626>
2024-11-01 22:35:25 +00:00
Alyssa Rosenzweig
4a931ec9eb asahi/clc: ingest spir-v
use mesa_clc for the spir-v part, this improves incremental build granularity.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31923>
2024-11-01 13:25:37 -07:00
Alyssa Rosenzweig
f31b451916 clc: add mesa_clc tool
This is a generic tool to convert OpenCL C to SPIR-V.

In the future, this will be replaced by `clang` directly using the LLVM SPIR-V
backend, but for now we need a tool in Mesa to provide this functionality with
older LLVM versions.

The important parts are that:

1. It does not depend on NIR or any real platform details. An older mesa_clc
   from a previous Mesa version can generally be used to build a newer Mesa to
   ease cross-OS builds.

2. Its output can be consumed without any LLVM dependence, which will untangle
   the LLVM mess we have now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31923>
2024-11-01 13:25:37 -07:00
Casey Bowman
478b5aa050 vulkan/screenshot-layer: Remove extraneous malloc operations
Reduced the looping copy structure of a 2D array down to a single malloc
& memcpy operation to copy the entirety of the image buffer to a local
1D array copy.

With this setup, we can write the image row by row using the associated
libpng API call.

Local testing with vkcube showed ths as a large perf gain, reducing the
time it took to copy images by more than half:

Previous method:
mesa-screenshot: DEBUG: Time to copy: 251907 nanoseconds

Current method:
mesa-screenshot: DEBUG: Time to copy: 112904 nanoseconds

Also reduced swapchain image list malloc operations to one use. This
doesn't have much perf impact, but it's good to reduce the number of malloc
operations overall.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31793>
2024-11-01 17:11:29 +00:00
Casey Bowman
0b60969ec2 vulkan/screenshot-layer: Fix memory leaks
This frees a fairly large amount of memory from the 2D matrix by
iterating over the rows to free them individually.

Liuqiang spotted some areas that we return early in the threaded
function and don't free some pointers.

To remedy this, we'll reorder the checks so that we don't have to
return early and can instead use an if/else flow to take care of
these problematic areas in a more elegant way.

Co-authored-by: Casey Bowman <casey.g.bowman@intel.com>
Co-authored-by: liuqiang <liuqiang@kylinos.cn>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31793>
2024-11-01 17:11:29 +00:00
Casey Bowman
1438cb5c25 vulkan/screenshot-layer: Increase buffer sizes
This allows larger buffer sizes when using the env config as well
as filepath for the output directory.

This will allow, for example, using a large number of singular frames:
frames=1/2/3/4/5/6/7/8/.../300

Also fixed an issue with filepaths sometimes being appended with garbage
characters due to not being initialized.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31793>
2024-11-01 17:11:29 +00:00
Casey Bowman
461e1f985f vulkan/screenshot-layer: Fix image index selection
Previously, only the first image in the swapchain was chosen at all times
to be copied to a file.

This meant that if a list of consecutive images were selected, multiple
duplicate images would be saved, instead of the proper frames actually
used in the workload.

Now, the index is properly obtained from AcquireNextImageKHR(), leading
to the same image being used for the workload to be copied and saved to
a file.

Signed-off-by: Casey Bowman <casey.g.bowman@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31793>
2024-11-01 17:11:29 +00:00
Mike Blumenkrantz
5fd0b634d4 zink: add VVL for RADV jobs
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27705>
2024-11-01 16:49:50 +00:00
Mike Blumenkrantz
01608a4067 zink: stop leaking precompiled generated tcs
this may have been created during precompile when using shader objects

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27705>
2024-11-01 16:49:50 +00:00