Commit Graph

183660 Commits

Author SHA1 Message Date
Karol Herbst
459b522251 rusticl/program: add debug option to validate internal spirvs
Sometimes it's useful to validate SPIR-Vs we generate just to make sure
they are valid.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27204>
2024-01-23 00:19:33 +00:00
Karol Herbst
6e70699e24 rusticl/program: add clc_validator_options helper function
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27204>
2024-01-23 00:19:33 +00:00
Karol Herbst
421b73207c rusticl/spirv: use bool::then_Some inside SPIRVBin::link
This makes the code way easier to read :)

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27204>
2024-01-23 00:19:33 +00:00
Karol Herbst
93c1eb112f rusticl/spirv: do not attempt to parse spirv after failed link
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27204>
2024-01-23 00:19:33 +00:00
Karol Herbst
eb2afbc0e5 rusticl/program: rework debug logging option
the changes:
1. log also in clLinkProgram
2. log also if the operation succeeded to print warnings

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27204>
2024-01-23 00:19:33 +00:00
Sagar Ghuge
6fcec87090 intel/fs: Track instance id in gs_thread_payload
This change moves the instance id gs_thread_payload constructor and
lowering code will simply use that.

Also, this change takes the Xe2 register width in consideration that
fixes a couple of tests involving geometry shaders with gl_InvocationID
on Xe2.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26960>
2024-01-22 22:15:38 +00:00
Juan A. Suarez Romero
0384e96aee v3dv/ci: increase timeout for full jobs in 30min
Reached the maximum execution time in a couple of jobs.

Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27190>
2024-01-22 21:27:48 +00:00
Konstantin Seurer
7ebf7f49a0 llvmpipe: Compile sample functioins on demand
The way this was implemented wasn't optimal. Compiling a functrion for
each lp_static_texture_state/lp_static_sampler_state/sample_key
combination is not great. This patch tries to contain the combinatory
explosion by compiling sample functions on demand inside the shader,
caching them and moving them to their intended locations when no chader
is running.

Improves CTS runtime by a lot.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27182>
2024-01-22 20:29:40 +00:00
Konstantin Seurer
533d17ec71 llvmpipe: Stop refcounting sample functions
This would just make on-demand compilation more complicated.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27182>
2024-01-22 20:29:40 +00:00
Eric Engestrom
c4d950ce37 rpi4/ci: skip more of the dEQP-VK.ssbo.phys.layout.* tests that timeout occasionally
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27202>
2024-01-22 20:07:30 +00:00
Eric Engestrom
959819c458 rpi3/ci: update piglit & deqp expectations
Results from these jobs:
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/53885235
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/53941874
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/53941948
- https://gitlab.freedesktop.org/mesa/mesa/-/jobs/53941863

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27150>
2024-01-22 19:46:25 +00:00
Sil Vilerino
a3c91624f4 d3d12: Implement cap for PIPE_VIDEO_CAP_ENC_INTRA_REFRESH
Fixes: c81967fa89 ("d3d12: Implement Intra Refresh for H264, HEVC, AV1")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27201>
2024-01-22 13:47:25 -05:00
Hans-Kristian Arntzen
57cd0a0a28 wsi/x11: Make chain->status atomic.
Avoids having to take extra locks in acquire/present.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26954>
2024-01-22 16:45:14 +00:00
Hans-Kristian Arntzen
b634537b8b wsi/x11: Keep track of multiple presentation requests.
With present ID and IMMEDIATE/MAILBOX, waiting for completion
before submitting a new frame will limit frame rate to a multiple
of refresh rate, which is not ideal. We should be able to pump frames as
fast as IDLE callback, not limited by COMPLETE.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26954>
2024-01-22 16:45:14 +00:00
Hans-Kristian Arntzen
b90b6a395d wsi/x11: Implement VK_EXT_swapchain_maintenance1.
Allow toggling between all presentation modes.
After the rewrite, this is now trivial to support.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26954>
2024-01-22 16:45:14 +00:00
Hans-Kristian Arntzen
19dba854be wsi/x11: Rewrite implementation to always use threads.
The current implementation has many different code paths which get very
messy to reason about and maintain.

- FIFO mode worked well enough.
- IMMEDIATE did not need a thread at all, but present wait
  implementation complicated a lot of things since we had to handle
  concurrent special event reads.
- MAILBOX (and Xwayland) adds even more jank on top of this where
  have present thread, but no acquire thread, so there are tons of
  forward progress issues to consider.

In the new model, we have two threads:

- Queue thread is only responsible for receiving presents, waiting for
  them if necessary, and submitting them to X.
- Event thread pumps the special event queue and notifies
  other threads about frame completions.
- Application thread does not interact with X directly, only through
  acquire/present queues and present wait condvar.

Two threads are required to implement IMMEDIATE and MAILBOX well.
IDLE events can come back at any time and the queue thread might be
waiting for a new presentation request to come through.

This new model has the advantage that we will be able to implement
VK_EXT_swapchain_maintenance1 in a more reasonable way, since we can
just toggle the present mode per present request as all presentation
go through the same system.

Some cleanups were done as well:

- We no longer need the busy bool. Since everything goes through thread,
  we just rely on acquire/present queues.
- SW/non-MITSHM path is also moved to thread. Move acquire-specific
  logic to the thread as well.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26954>
2024-01-22 16:45:14 +00:00
Alejandro Piñeiro
0a3784ae33 v3dv/bo: use mtx_lock/unlock on cache_init too
To handle coverity warning:
   4. thread2_modifies_field: Thread2 sets cache_size to a new value. Note that this write can be reordered at runtime to occur before instructions that do not access this field within this locked region. After Thread2 leaves the critical section, control is switched back to Thread1.
   CID 1559509 (#1 of 1): Check of thread-shared field evades lock acquisition (LOCK_EVASION)6. thread1_overwrites_value_in_field: Thread1 sets cache_size to a new value. Now the two threads have an inconsistent view of cache_size and updates to fields correlated with cache_size may be lost.
521   cache->cache_size += bo->size;

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26951>
2024-01-22 16:47:08 +01:00
Alejandro Piñeiro
ffd0e3a7fe broadcom/compiler: fix coverity warning (unitialized pointer read)
Full coverity warning:

   CID 1558604: Uninitialized pointer read (UNINIT)12. uninit_use_in_call: Using uninitialized value *results when calling nir_vec.
236        return nir_vec(b, results, DIV_ROUND_UP(num_components, 2));

To fix it we initialize the variables, provide a unreachable on the
switch that sets the results values. As we are here we also move a
comment to make things more clear.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26951>
2024-01-22 16:46:57 +01:00
Karol Herbst
f2b7c4ce29 nir: rework and fix rotate lowering
No driver supports urol/uror on all bit sizes. Intel gen11+ only for 16
and 32 bit, Nvidia GV100+ only for 32 bit. Etnaviv can support it on 8,
16 and 32 bit.

Also turn the `lower` into a `has` option as only two drivers actually
support `uror` and `urol` at this momemt.

Fixes crashes with CL integer_rotate on iris and nouveau since we emit
urol for `rotate`.

v2: always lower 64 bit

Fixes: fe0965afa6 ("spirv: Don't use libclc for rotate")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by (Intel and nir): Ian Romanick <ian.d.romanick@intel.com>

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27090>
2024-01-22 10:27:44 +00:00
Eric R. Smith
a50b2f8f25 panfrost: fix panfrost drm-shim
The panfrost driver now makes an ioctl to retrieve some new memory
parameters, and DRM_PANFROST_PARAM_MEM_FEATURES is required (does not
default in the caller). This caused drm-shim to stop working. This
patch adds some defaults to get drm-shim working again.

Signed-off-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Fixes: 91fe8a0d28 ("panfrost: Back panfrost_device with pan_kmod_dev object")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27162>
2024-01-22 09:36:47 +00:00
Lionel Landwerlin
59b652f10f anv: using a single struct for kernel upload
A bit nicer than adding more and more arguments to the upload
function.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27188>
2024-01-22 08:42:37 +00:00
Samuel Pitoiset
783e3c096f radv: fix indirect draws with NULL index buffer on GFX10
GFX10 has a hw bug and it can't handle 0-sized index buffer. The
non-indirect draw path was fine but not the indirect path where RADV
emits the index buffer.

This fixes flakes with dEQP-VK.*maintenance6* on NAVI14, and possibly
GPU hangs if there is an indirect draw with a valid index buffer right
before because it would re-use the same index buffer.

Fixes: db9816fd66 ("radv: add support for NULL index buffer")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27142>
2024-01-22 08:14:23 +00:00
Samuel Pitoiset
5c03cdbd02 radv: fix indirect dispatches on the compute queue on GFX7
GFX7 CP requires the indirect dispatch VA to be aligned to 32-bytes.

This fixes dEQP-VK.api.command_buffers.many_indirect_disps_on_secondary,
but it's unexpected that it uncovered this bug.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27148>
2024-01-22 07:41:05 +00:00
Francisco Jerez
c3a64f8dd1 intel/fs/xe2+: Allow SIMD16 MULH instructions.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27165>
2024-01-20 19:55:31 +00:00
Francisco Jerez
54f3d5a00c intel/fs: Emit QUAD_SWIZZLE instructions with WE_all for derivative lowering.
Otherwise the code generator will attempt to emit SIMD-lowered
QUAD_SWIZZLE instructions with an execution group not multiple of 8,
which is invalid on Xe2+.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27165>
2024-01-20 19:55:31 +00:00
Francisco Jerez
3e710a84ad intel/fs: Set the default execution group to 0 when not representable by the platform.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27165>
2024-01-20 19:55:31 +00:00
Francisco Jerez
43c9620dbf intel/eu/xe2+: Translate brw_reg fields in REG_SIZE units to physical 512b GRF units during codegen.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27165>
2024-01-20 19:55:31 +00:00
Francisco Jerez
8bc3821520 intel/fs/xe2+: Disable bank conflict mitigation pass for now.
Reworks:
* Added a TODO comment.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27165>
2024-01-20 19:55:31 +00:00
Francisco Jerez
6efcba9e36 intel/ir/xe2+: Add support for 32 SBID tokens to performance model.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27165>
2024-01-20 19:55:31 +00:00
Konstantin Seurer
a9c057d5a3 radv: Implement NIR debug printf
Adds radv_build_printf which can print nir_defs. The arguments are written
to a buffer and printed after the submit.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25753>
2024-01-20 16:11:55 +01:00
Konstantin
03379d74ba util/printf: Expose util_printf_prev_tok
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25753>
2024-01-20 16:11:55 +01:00
Konstantin
d05f8f6146 util/printf: Include stdio.h
Needed for FILE.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25753>
2024-01-20 16:11:55 +01:00
Yonggang Luo
87417012f3 zink: Update zink-anv-tgl flakes
It's from https://gitlab.freedesktop.org/mesa/mesa/-/jobs/53978300
and https://gitlab.freedesktop.org/mesa/mesa/-/jobs/53985604

and appeared multiple times

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27179>
2024-01-20 09:50:09 +00:00
Eric Engestrom
908f444ec1 ci/deqp: backport fix for zlib.net not allowing tarball download anymore
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27175>
2024-01-20 08:20:12 +00:00
Jesse Natalie
ebcab145cf dzn: Add a debug option to enable experimental shader models
This allows us to run with unsigned shaders

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27160>
2024-01-20 00:07:15 +00:00
Jesse Natalie
90bf4b630b microsoft/compiler: Handle comparison bias/gradient sampling
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27160>
2024-01-20 00:07:15 +00:00
Jesse Natalie
733b7fe831 microsoft/compiler: Declare shader model 6.8 / validator 1.8
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27160>
2024-01-20 00:07:15 +00:00
Helen Koike
bf461d856f ci/ci_post_gantt: add script that post gantt to Marge's messages
Generate Gantt chart and post an in thread reply to Marge's messages
with it in html format.

html format is used for being interactive.

Signed-off-by: Helen Koike <helen.koike@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26796>
2024-01-20 00:02:56 +00:00
Rob Clark
1a9a71e2d9 freedreno/registers: A couple newline changes
Mostly to avoid massive diffstat consisting of inserted newlines
compared to headergen2.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27124>
2024-01-19 23:26:58 +00:00
Rob Clark
2e733e94d8 freedreno/registers: Add basic kernel header support
This doesn't yet add support for everything the mdp5/mdp4 reg builders
need, but at least gets us to the point where we can use it for GPU
registers, avoiding the need to add reg variant support to headergen2.

See: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7978
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27124>
2024-01-19 23:26:58 +00:00
Rob Clark
ab64afc109 freedreno/registers: Generate copyright comment blurb
Similar to headergen2, the output matches as closely as is reasonable.
The time format and file listing ends up being slightly different but
those would be part of the diffstat when we next update kernel headers
regardless.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27124>
2024-01-19 23:26:58 +00:00
Rob Clark
8eca68d2de freedreno/registers: Don't re-parse files
Track the files we've parsed, and skip ones we have already seen, if
(for example) we see the same paths imported from imported files.

Additionally having the list of files we have parsed will be useful to
generate a headergen-like top-of-file license comment.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27124>
2024-01-19 23:26:58 +00:00
Rob Clark
d1567249e9 freedreno/registers: De-duplicate xml_reg_files
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27124>
2024-01-19 23:26:58 +00:00
Rob Clark
15f94505ba freedreno/registers: Pass full args to dump_c()
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27124>
2024-01-19 23:26:58 +00:00
Rob Clark
670e93bfb5 freedreno/a6xx: fix comment
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27124>
2024-01-19 23:26:57 +00:00
Caio Oliveira
5552ffd0f3 intel: Use an intel enum for cmat scope
While convenient, it was not necessary to use the mesa_scope in
intel_device_info.

Having a Intel specific enum here will help later the efforts
of serialization of intel_device_info.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27164>
2024-01-19 22:09:25 +00:00
Georg Lehmann
0a03cf5b3c aco: remove boolean shuffle isel
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27116>
2024-01-19 20:13:34 +00:00
Georg Lehmann
b4180ebbb9 radeonsi: lower boolean shuffle
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27116>
2024-01-19 20:13:34 +00:00
Georg Lehmann
2571580b2b radv: lower boolean shuffle
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27116>
2024-01-19 20:13:34 +00:00
Georg Lehmann
d641750573 nir: add lowering for boolean shuffle
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27116>
2024-01-19 20:13:34 +00:00