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Author SHA1 Message Date
Samuel Pitoiset
8076c7596d aco: fix wrong source position for constant with nir_op_cube_face_coord 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6480>
 2020-08-28 08:03:55 +02:00
Samuel Pitoiset
f4d861696d radv: set BIG_PAGE to improve performance on GFX10.3 
It reduces traffic between CB, DB and TCP blocks if buffers
respect a certain alignment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
 2020-08-28 05:53:41 +00:00
Samuel Pitoiset
d6bc0f26c9 radv: emit {CB,DB}_RMI_L2_CACHE_CONTROL at framebuffer time 
The upcoming patch will set BIG_PAGE if needed.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6482>
 2020-08-28 05:53:41 +00:00
Eric Anholt
31f75aaeef nir/lower_discard_to_demote: Use nir_shader_instructions_pass(). 
Cleans up indentation, and clears the metadata tracking flag that would
break if this pass was used in in NIR_PASS().

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
 2020-08-27 23:01:52 +00:00
Eric Anholt
265dcb3836 nir/nir_lower_wrmasks: Use the nir_lower_instructions_pass() helper. 
This fixes the invalidation of metadata when we didn't modify the shader
and unindents a bunch of code.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
 2020-08-27 23:01:52 +00:00
Eric Anholt
c5e64c041f nir/lower_io_to_scalar: Convert to use nir_shader_instructions_pass(). 
This unindents a whole bunch of code, and fixes the lack of metadata
tracking in the pass (which wasn't called in an opt loop so it hadn't been
caught before).

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
 2020-08-27 23:01:52 +00:00
Eric Anholt
dfb8465341 nir/opt_undef: Convert to use nir_shader_instructions_pass(). 
We can't use nir_lower_instructions because we operate on stores which
don't have an SSA def.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
 2020-08-27 23:01:52 +00:00
Eric Anholt
e5d4bbd840 nir/lower_vec_to_movs: Convert to use nir_shader_instructions_pass(). 
Less pass code, less indenting, should be the same perf.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
 2020-08-27 23:01:52 +00:00
Eric Anholt
a62098fff2 nir: Add a helper for general instruction-modifying passes. 
The nir_shader_lower_instructions() is really nice, but it's only for SSA
operations, and sometimes you want something more general.  I've put it in
nir_builder.h so it can be inlined and retain the same performance
characteristics we're used to in our lowering passes even in the absence
of LTO.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6412>
 2020-08-27 23:01:52 +00:00
Eric Anholt
a82f664d0a nir/opt_copy_prop_vars: Quiet valgrind warning about overlapping memcpy. 
The warning is kind of silly:

Test case 'dEQP-GLES2.functional.shaders.indexing.tmp_array.vec3_const_write_static_read_vertex'..
==1874780== Source and destination overlap in memcpy(0xa261690, 0xa261690, 160)
==1874780==    at 0x484D498: __GI_memcpy (vg_replace_strmem.c:1037)
==1874780==    by 0x596FC07: copy_entry_remove (nir_opt_copy_prop_vars.c:296)

The "memcpy is undefined if they overlap" thing is surely meant to be
"memcpy with *partial* overlap is undefined", but let's keep anyone else
from having to debug this.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6178>
 2020-08-27 21:39:50 +00:00
Eric Engestrom
98222db0da egl: document which driver hooks are only required by extensions 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
 2020-08-27 23:06:55 +02:00
Eric Engestrom
cf663d0d11 egl: move extension driver functions after core functions 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
 2020-08-27 23:06:47 +02:00
Eric Engestrom
12c941808f docs/egl: correct/update DRI2 mention with the shiny new DRI3 
That initial sentence must have been written ages ago ^^'

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
 2020-08-27 23:06:36 +02:00
Eric Engestrom
ab2e59750f docs/egl: add some more documentation 
Inspired by `src/egl/main/README.txt`, which was severely outdated, but
still contained valid information.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
 2020-08-27 23:06:28 +02:00
Eric Engestrom
7897c315d4 docs/egl: add haiku driver 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
 2020-08-27 20:41:04 +02:00
Eric Engestrom
c84d3049b0 docs/egl: complete list of dri2 platforms 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
 2020-08-27 20:41:04 +02:00
Eric Engestrom
3909e9d1ac docs/egl: move section around 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
 2020-08-27 20:41:04 +02:00
Eric Engestrom
3704b0250c docs/egl: fix typo 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6130>
 2020-08-27 20:41:04 +02:00
Jesse Natalie
608c87afdd nir/vtn: SPIR-V bit count opcodes (core and extension) dest size mismatches nir 
SPIR-V dest sizes match the input, while nir is always int32. Insert
casts from the nir op to the expected SPIR-V dest.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
 2020-08-27 16:57:42 +00:00
Jesse Natalie
a54695ddcb nir: Add bit_count to lower_int64 pass 
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
 2020-08-27 16:57:42 +00:00
Jesse Natalie
d91f85f16e nir: Remove 32bit restriction for uadd_carry optimization 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
 2020-08-27 16:57:42 +00:00
Jesse Natalie
9232887c69 nir: Implement mul_high lowering for bit sizes other than 32 
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
 2020-08-27 16:57:42 +00:00
Jesse Natalie
ea715741b5 nir_lower_bit_size: Support lowering ops with differing source/dest sizes 
Specifically the bit-finding routines always return int32. Don't complain
about the dest already being 32 bits when lowering to 32 bits, and
don't bother casting the dest if it's already right.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
 2020-08-27 16:57:42 +00:00
Jesse Natalie
0d595f72b2 nir: Relax opt_if logic to prevent re-merging 64bit phis for loop headers 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
 2020-08-27 16:57:42 +00:00
Jesse Natalie
43d22c8f20 nir: Add a lowering pass to split 64bit phis 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6313>
 2020-08-27 16:57:41 +00:00
Kenneth Graunke
6b1a56b908 iris: Drop stale syncobj references in fence_server_sync 
When calling glWaitSync (fence_server_sync), we added dependencies
in all batches (render and compute) on existing work.  Even if
applications don't use compute at all, they theoretically could,
so we record that the compute batch depends on the render batch.

But if the application truly doesn't use compute, or rarely uses
it, we ended up recording dependencies on _all_ previous render
batches, racking up a massive list of syncobjs.  Not only is this
pointless, it also meant that we never allowed the kernel to free
the underlying i915_request objects.

There are a number of solutions to this problem, but for now, we
take a simple one: when recording a new syncobj dependency, we
walk the list and see if any of them have already passed.  If so,
that dependency has been fulfilled.  We no longer need to track it,
and can simply drop it from the list, unreferencing the syncobj.

Android's SurfaceFlinger in particular was hitting this issue,
as it uses glWaitSync, doesn't typically use compute shaders,
and runs for long durations.

Thanks to Yang A Shi <yang.a.shi@intel.com> and
Kefei Yao <kefei.yao@intel.com> for their excellent work in
tracking down this issue!

Fixes: f459c56be6 ("iris: Add fence support using drm_syncobj")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Yang A Shi <yang.a.shi@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6463>
 2020-08-27 16:40:22 +00:00
Kenneth Graunke
e98c7a6634 iris: Reorder the loops in iris_fence_await() for clarity. 
Swapping the order of the loops makes the logic much easier to follow:
for each point in our fence, if it hasn't gone by, make future work in
all batches depend on it.  Both loops are necessary, and now it's
clearer why.

(This doesn't actually fix a bug but needs to be cherry-picked for
the next patch to apply, which does fix a bug.)

Fixes: f459c56be6 ("iris: Add fence support using drm_syncobj")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Yang A Shi <yang.a.shi@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6463>
 2020-08-27 16:40:22 +00:00
Michel Dänzer
45793c00d2 ci: Fix up rules for post-merge / main project branch pipelines 
Pre-merge pipelines for MRs appear to run in the target project
namespace now, so we have to explicitly rule those out.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6481>
 2020-08-27 10:36:07 +00:00
Samuel Pitoiset
502b9daa7a aco: add ACO_DEBUG=novn,noopt,nosched for debugging purposes 
To disable value numbering, optimizations and scheduling.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6470>
 2020-08-27 10:23:51 +00:00
Bas Nieuwenhuizen
4d40a719b0 radv: Fix 3d blits. 
- the offsets are inclusive-exclusive so the +1 was wrong
- Since the GPU doesn't do the interpolation on depth (as we render
  per layer), we have to add an offset for the pixel center.

CC: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3073
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6458>
 2020-08-27 09:58:59 +00:00
Marek Olšák
003ea78b77 st/mesa: remove useless code for lowered IO in st_nir_assign_vs_in_locations 
It's not needed.

Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6465>
 2020-08-26 20:35:58 +00:00
Eric Anholt
8684061975 ci: Test the KHR-GL* CTS cases with softpipe. 
I've been hacking on softpipe in the process of trying to delete a bunch
of core Mesa code, and want to make sure I don't regress desktop GL
either.  The run takes under a minute and a half.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6466>
 2020-08-26 17:29:36 +00:00
Rhys Perry
d2cf6a8399 aco: sink get_alu_src() in bfe lowering 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6424>
 2020-08-26 13:46:23 +00:00
Rhys Perry
14d748eb28 aco: fix sgpr ubfe/ibfe if the offset is too large 
If the offset is large enough, it could affect the width. I'm also not
sure if the hardware masks the offset by 0x1f.

Found by inspection. No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6424>
 2020-08-26 13:46:23 +00:00
Rhys Perry
454bc595d1 aco: remove 64-bit SGPR ubfe/ibfe 
ubfe/ibfe is always 32-bit.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6424>
 2020-08-26 13:46:23 +00:00
Rhys Perry
eb3c16e1f8 aco/tests: add tests for long jumps 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
192b9f4303 aco: shorten disassembly for repeated instructions 
Future tests will do this.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
ae6330d955 aco/tests: add test for GFX10 0x3f bug 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
fe2dc41258 aco: create long jumps 
When the branch offset can't be encoded, we have to use s_setpc_b64.

Fixes hang in RPCS3 vertex ubershader.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3231
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
156fd58cda aco: reserve 2 sgprs for each branch 
We'll need two sgprs for the possibility of a long jump.

fossil-db (Navi):
Totals from 10197 (7.50% of 135946) affected shaders:
SGPRs: 946268 -> 946468 (+0.02%)
VGPRs: 705884 -> 707956 (+0.29%); split: -0.00%, +0.30%
SpillSGPRs: 31485 -> 36212 (+15.01%); split: -0.04%, +15.05%
CodeSize: 88296484 -> 88384604 (+0.10%); split: -0.01%, +0.11%
MaxWaves: 81379 -> 81171 (-0.26%)
Instrs: 17219111 -> 17231682 (+0.07%); split: -0.03%, +0.10%
Cycles: 1594875900 -> 1596450136 (+0.10%); split: -0.05%, +0.15%
VMEM: 1687263 -> 1689080 (+0.11%); split: +0.14%, -0.03%
SMEM: 657726 -> 660262 (+0.39%); split: +0.61%, -0.22%
VClause: 294806 -> 294638 (-0.06%); split: -0.08%, +0.02%
SClause: 556702 -> 556210 (-0.09%); split: -0.12%, +0.03%
Copies: 1466323 -> 1469349 (+0.21%); split: -0.57%, +0.78%
Branches: 619793 -> 618556 (-0.20%); split: -0.28%, +0.08%
PreSGPRs: 806364 -> 811477 (+0.63%); split: -0.14%, +0.77%
PreVGPRs: 655845 -> 657174 (+0.20%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
e8ac14527a aco: keep loop live-through variables spilled 
fossil-db (Navi):
Totals from 3149 (2.32% of 135946) affected shaders:
VGPRs: 280928 -> 280932 (+0.00%)
SpillSGPRs: 51133 -> 30042 (-41.25%)
CodeSize: 43063076 -> 41377252 (-3.91%); split: -3.92%, +0.00%
Instrs: 8278435 -> 8037133 (-2.91%); split: -2.92%, +0.00%
Cycles: 709575456 -> 683366172 (-3.69%); split: -3.69%, +0.00%
VMEM: 542887 -> 542937 (+0.01%); split: +0.05%, -0.04%
SMEM: 210255 -> 206368 (-1.85%); split: +0.12%, -1.97%
SClause: 258847 -> 258019 (-0.32%); split: -0.52%, +0.20%
Copies: 731836 -> 684784 (-6.43%); split: -6.44%, +0.01%
Branches: 305422 -> 292844 (-4.12%); split: -4.12%, +0.00%
PreSGPRs: 333103 -> 332701 (-0.12%)
PreVGPRs: 280086 -> 280089 (+0.00%)

Helps mostly Detroit: Become Human and the single spilling Doom Eternal
shader.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
75d6c30572 aco: fix spills_entry heuristic for branch blocks in init_live_in_vars() 
fossil-db (Navi):
Totals from 222 (0.16% of 135946) affected shaders:
SpillSGPRs: 9121 -> 9117 (-0.04%)
SpillVGPRs: 2820 -> 1821 (-35.43%)
CodeSize: 5134264 -> 5053336 (-1.58%); split: -1.63%, +0.05%
Instrs: 953435 -> 938761 (-1.54%); split: -1.59%, +0.05%
Cycles: 100567688 -> 97252432 (-3.30%); split: -3.34%, +0.04%
VMEM: 40752 -> 39219 (-3.76%); split: +0.04%, -3.80%
SMEM: 15416 -> 15509 (+0.60%); split: +0.64%, -0.03%
VClause: 20120 -> 19091 (-5.11%)
SClause: 23540 -> 23544 (+0.02%); split: -0.11%, +0.12%
Copies: 125912 -> 122017 (-3.09%); split: -3.36%, +0.26%
Branches: 31131 -> 30009 (-3.60%)

Mostly affects parallel-rdp ubershaders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
fc9f502a5b aco: fix regclass checks when fixing to vcc/exec with Builder 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
a537c9e73f aco: don't fix break condition for break+discard to exec 
This would move the old exec mask back into exec. This also fixes the
live_out_exec.

Issue found in dEQP-VK.graphicsfuzz.cosh-return-inf-unused

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
1a5444b900 aco: don't consider the first partial spill if it's the wrong type 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Rhys Perry
8f6a900d5e aco: consider branch definitions in spiller 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Cc: 20.2 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6212>
 2020-08-26 13:26:58 +00:00
Samuel Pitoiset
cacb388b3b radv: print a warning when RADV_TRAP_HANDLER is used 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6468>
 2020-08-26 11:27:38 +00:00
Marek Vasut
60975ebe58 etnaviv: Add lock around pending_ctx 
The content of rsc->pending_ctx could be changed from multiple contexts
and thus from multiple threads. The per-context lock is not sufficient
to protect this list. Add per-resource lock to protect this list.

Fixes: e5cc66dfad ("etnaviv: Rework locking")
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6454>
 2020-08-26 09:58:10 +00:00
Marek Vasut
da660c90bf etnaviv: Remove etna_resource_get_status() 
This function is not used, remove it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6454>
 2020-08-26 09:58:10 +00:00
Lukas F. Hartmann
785e2707b0 etnaviv: Fix disabling early-z rejection on GC7000L (HALTI5) 
The VIVS_PE_DEPTH_CONFIG_DISABLE_ZS in PE_DEPTH_CONFIG caused depth
write hangs on HALTI5.
This is because the 0x11000000 bits in RA have to be toggled on
when setting this bit to zero. This combination will disable
early-z rejection on GC7000L, which was previously done through
a different bit.
Tested only on GC7000L so far.

Signed-off-by: Lukas F. Hartmann <lukas@mntre.com>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5456>
 2020-08-26 08:23:31 +00:00