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Author SHA1 Message Date
Rob Clark
f80092dad2 freedreno/ir3: remove RA "q-values" optimization 
This is mainly the "piglit optimization" (ie, since piglit launches an
separate process for for each test).  It was never wired up for a6xx,
and makes register class setup unnecessarily complicated.  Remove it to
simplify the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
 2020-06-11 21:59:54 +00:00
Rob Clark
562aaea07c freedreno/ir3: respect tex prefetch limits 
Refactor a bit the limit checking in the bindless case, and add tex/samp
limit checking for the non-bindless case, to ensure we do not try to
prefetch textures which cannot be encoded in the # of bits available.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
 2020-06-11 21:59:54 +00:00
Rob Clark
4cabc25fa4 freedreno/ir3: add debug code to print conflicting half-regs 
I keep re-typing this from time to time when debugging various things.
Which is dumb.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
 2020-06-11 21:59:54 +00:00
Rob Clark
399114329b nir/print: print tex dest type 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
 2020-06-11 21:59:54 +00:00
Francisco Jerez
479249bce6 iris/icl+: Report same caching domain as main surface for clear color BO. 
Even though the clear color BO is bound as a read-only buffer, report
the same caching domain as the main BO in use_surface() (typically
IRIS_DOMAIN_RENDER_WRITE) in order to avoid ping-ponging back and
forth between IRIS_DOMAIN_RENDER_WRITE and IRIS_DOMAIN_OTHER_READ,
which leads to increased stall-at-pixel-scoreboard synchronization
between draw calls.

Fixes a 5%-10% FPS regression in some benchmarks spotted on ICL.

Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Fixes: eb5d1c2722 "iris: Annotate all BO uses with domain and sequence number information."
Closes: #3097
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5411>
 2020-06-11 14:00:49 -07:00
Mauro Rossi
7afdc549f4 android: aco: add aco_ir.cpp to Makefile.sources 
Fixes the following building errors:

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/vulkan.radv_intermediates/LINKED/vulkan.radv.so
...
ld.lld: error: undefined symbol: aco::can_use_SDWA(chip_class, std::__1::unique_ptr<aco::Instruction, aco::instr_deleter_functor> const&)
...
ld.lld: error: undefined symbol: aco::can_use_opsel(chip_class, aco_opcode, int, bool)
...
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)

Fixes: d9cfb8ad ("aco: validate instructions reading/writing upper halves/bytes")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5425>
 2020-06-11 20:00:16 +02:00
Eric Engestrom
19b18e7219 docs: update calendar, add news item, and link releases notes for 20.1.1 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5421>
 2020-06-11 10:31:31 +00:00
Eric Engestrom
f94190e8b0 docs: Add release notes for 20.1.1 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5421>
 2020-06-11 10:31:31 +00:00
Marek Olšák
0b3e344212 ac/surface: don't free dcc_retile_map on failure 
because the hash table now owns it.

Fixes: bd553f0546 - ac/surface: cache DCC retile maps (v2)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
 2020-06-11 10:01:57 +00:00
Marek Olšák
56f2a77a41 ac/surface: enable DCC for the first level in the mip tail on gfx10 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
 2020-06-11 10:01:57 +00:00
Marek Olšák
7406ea37e6 ac/surface: require that gfx8 doesn't have DCC in order to be displayable 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
 2020-06-11 10:01:57 +00:00
Marek Olšák
374f6d568f ac/surface: don't set is_displayable if displayable DCC is missing 
If flags.display isn't set, then displayable DCC will not be computed, so
is_displayable will always be false.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
 2020-06-11 10:01:57 +00:00
Marek Olšák
0fcf55329b amd/addrlib: fix the C++ one definition rule violation 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1854

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5414>
 2020-06-11 05:11:50 -04:00
Jason Ekstrand
27b7b89922 iris: Better handle metadata in NIR passes 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
 2020-06-11 05:08:12 +00:00
Jason Ekstrand
92cfbb7d0c intel/nir: Call nir_metadata_preserve on !progress 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
 2020-06-11 05:08:12 +00:00
Jason Ekstrand
2b676b2ce8 nir: Properly preserve metadata in more cases 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
 2020-06-11 05:08:12 +00:00
Jason Ekstrand
5e1c42d85f nir: Call nir_metadata_preserve on !progress 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
 2020-06-11 05:08:12 +00:00
Jason Ekstrand
b0d1f9a72f nir: Add a nir_shader_preserve_all_metadata helper 
There are some passes which really work on the shader level and it's
easier if we have a helper which preserves metadata on the whole shader.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
 2020-06-11 05:08:12 +00:00
Jason Ekstrand
e017ee95c1 nir: Add a nir_metadata_all enum value 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
 2020-06-11 05:08:12 +00:00
Dave Airlie
30f94b3e7d gallivm/sample: fix texel type for stencil 8-bit 
This has to be unsigned, so clamping works properly for border
colors.

Fixes dEQP-GLES31.functional.texture.border_clamp.range_clamp.nearest_uint_stencil

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
 2020-06-11 14:41:23 +10:00
Dave Airlie
47c2318063 gallivm/conv: enable conversion min code. (v2) 
I'm not sure why this code was if (0), but if (1) for it fixes
dEQP-GLES31.functional.texture.border_clamp.range_clamp.nearest_float_color
This test expects +inf to get mapped to 255 and -inf to 0, both values
were ending up at 0.

v2: also enable in the SSE paths

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
 2020-06-11 14:41:19 +10:00
Dave Airlie
45606ee804 gallivm/format: convert unsigned values to float properly. 
This fixes:
dEQP-GLES31.functional.draw_indirect.random.2

which ends up with 3x32-bit USCALED values going down this path
some of which have the top bit set, and end up converted to signed
float instead of unsigned float values.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
 2020-06-11 14:41:14 +10:00
Dave Airlie
a2c16ecb2e llvmpipe: fix subpixel bits reporting. 
This fixes some vulkan tests later.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
 2020-06-11 14:41:09 +10:00
Dave Airlie
f6ce962f00 gallivm/nir: add group barrier support 
Fixes crash in
dEQP-GLES31.functional.synchronization.inter_invocation.image_write_read

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
 2020-06-11 14:41:05 +10:00
Dave Airlie
069aee7cc5 draw/gs: add more info to debugging. 
adds invocations and vertex streams to default off debug,
fixes compile as well due to missing ,

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
 2020-06-11 14:41:02 +10:00
Dave Airlie
092f6226ea draw/gs: fix emitting inactive primitives crash 
Fixes dEQP-GLES31.functional.geometry_shading.emit.line_strip_emit_1_end_1

This test only emits 1 primitive, but the stores don't respect
the current mask, which might only have one lane active, for that single
primitive. Also fix the final emit path to use the emitted_mask
rather than the current execution mask.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5379>
 2020-06-11 14:40:57 +10:00
Eric Anholt
cc13ffffba ci: Leave a note as to what might be going on with a test. 
dEQP-GLES2.functional.clipping.triangle_vertex.clip_three.clip_neg_x_neg_z_and_pos_x_pos_z_and_neg_x_neg_y_pos_z
fails pretty strangely (given that we're passing everything else) and
there's an old VK-GL-CTS bug open about this test, and it's suspicious
that all the ARM drivers seem to have trouble with it.  I tried dropping
to -O0 on guilding that file in the CTS and it didn't help, though.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5419>
 2020-06-10 23:37:32 +00:00
Eric Anholt
d5e993af47 freedreno/a6xx: Fix clip_halfz support. 
Same bit as on other gens, apparently it just got missed on this one.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5419>
 2020-06-10 23:37:32 +00:00
Ben Skeggs
af3c2f3cfd nvc0: initial support for tu1xx 
v2:
- add proper method definitions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
268dc60d3a nvc0: initial support for gv100 
v2:
- remove unnecessary MAX2()
- add proper method definitions

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
839aeffb49 nvc0: remove hardcoded blitter vertprog 
I don't really feel like writing SM70 SASS by hand...

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
4f3fbfb82e nvc0: move setting of entrypoint for a shader stage to a function 
GV100 requires something different, cleaner to move this to a single place.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
550f1c6d33 nvc0: use NVIDIA headers for GP100- compute QMD 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
443d369bd5 nvc0: use NVIDIA headers for GK104->GM2xx compute QMD 
v2:
- add header debug_printf(), and indent the output
v3:
- rename one of the helper macros

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
7458e21e2b nvir/gv100: enable support for tu1xx 
SM75 has a bunch more stuff, but is otherwise backwards-compatible
with SM70 SASS.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
78103abe87 nvir/gv100: initial support 
v2:
- add TargetGV100::isBarrierRequired() for OP_BREV
- use NV50_IR_SUBOP_LOP3_LUT() convenience macro where it makes sense
- separated out nir_lower_idiv into its own commit
- make use of the shared function to generate compiler options
- disable lower_fpow, nir's lowering is broken
v3:
- use replaceCvt() instead of custom NEG/ABS/SAT lowering
v4:
- remove WAR from peephole, not needed now we're using replaceCvt()

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
cacf296109 nvir/nir/gm107: switch off lower_extract_word 
We can use PRMT here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
57259fa802 nvir/nir/gm107: switch off lower_extract_byte 
We can use PRMT here.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
d58290270a nvir/nir/gm107: turn on nir_lower_extract64 
About to disable lowering for extract_byte/word in favour of a better
local implementation, but still need lowering for 64-bit versions.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
f29e6a9e7e nvir/nir/gm107: split nir shader compiler options from gf100 
We can enable some more things here vs earlier GPUs.

v2:
- make use of the shared function to generate compiler options

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
5f8ddbd069 nvir/gm107: separate out header for sched data calculator 
SM70 code emitter will want to reuse this.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:42 +00:00
Ben Skeggs
e0379e4549 nvir/gm107: replace SHR+AND+AND with PRMT+PRMT in PFETCH lowering 
This is more SM70-friendly.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:41 +00:00
Ben Skeggs
4f7798be9f nvir/gm107: implement OP_PERMT 
PFETCH lowering will be changed to use this as it's more SM70-friendly,
and this will also allow us to implement extract_byte/word opcodes.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:41 +00:00
Ben Skeggs
9670c087a7 nvir/nir: use nir_lower_idiv 
NIR provides a common implementation of this so we don't need to use a
hand-written built-in library.

v2:
- use idiv_precise instead

Especially important on SM70 where we don't have an assembler.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:41 +00:00
Ben Skeggs
59b44f90aa nvir/nir: nir expects the shift amount to wrap, rather than clamp 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:41 +00:00
Ben Skeggs
126954aade nvir/nir: implement nir_op_uror 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:41 +00:00
Ben Skeggs
23d56c842d nvir/nir: implement nir_op_urol 
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:41 +00:00
Ben Skeggs
4af791c3bd nvir/nir: implement nir_op_extract_i16 
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:41 +00:00
Ben Skeggs
bfdef484f5 nvir/nir: implement nir_op_extract_u16 
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:41 +00:00
Ben Skeggs
37bef78c79 nvir/nir: implement nir_op_extract_i8 
v2:
- use getSSA() instead of getScratch()
v3:
- fix whitespace

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5377>
 2020-06-10 22:52:41 +00:00