Commit Graph

164870 Commits

Author SHA1 Message Date
Michel Dänzer
888f5e5aa1 radeonsi: Fix amdgpu-color-export with prologues
Polygon stippling is handled in the prologue, amdgpu-color-export needs
to be set for that.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8010
Fixes: 1825ad134b ("radeonsi,radv/llvm: fix amdgpu-color/depth-export with epilogs")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20531>
2023-01-06 08:56:31 +00:00
Samuel Pitoiset
988c871ca9 radv: stop dirtying INDEX_BUFFER for non-indexed draws
radv_emit_index_buffer() used to emit VGT_INDEX_TYPE but since I
implemented the DISABLE_INSTANCE_PACKING workaround, it's emitted
in radv_emit_draw_registers().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20522>
2023-01-06 08:32:01 +00:00
Samuel Pitoiset
509ba67aeb radv: flush push descriptors at bind time
This doesn't need to be flushed at draw time.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20522>
2023-01-06 08:32:01 +00:00
Samuel Pitoiset
f288acb50f radv: remove set but unused radv_cmd_state::index_{buffer,offset}
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20522>
2023-01-06 08:32:01 +00:00
Samuel Pitoiset
ddb21e86a4 radv: remove unused pipeline parameter from radv_emit_binning_state()
It's no longer needed because everything is dynamic.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20522>
2023-01-06 08:32:01 +00:00
Samuel Pitoiset
21e52a612d radv: remove enabling out-of-order rasterization internally
This was added ~4 years ago for very little performance improvements
(likely < 1%) and this is only supported on GFX8 and GFX9.

Since, the number of dynamic states increased and this is likely
disabled most of the time, and given the maintainability cost, it looks
like it's time to remove it completely.

Applications can still enable it with VK_AMD_rasterization_order.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20514>
2023-01-06 08:11:17 +00:00
Jason Ekstrand
39c6f6454c isaspec: Give decode.c/h more descriptive names
Because these are being included across subdir boundaries, the name
"decode" is potentially pretty overloaded.  Instead, prefix them with
"isaspec_".  Also, since they're both weird includes now and not really
complete files in their own right, give them a descriptive suffix.

Acked-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20525>
2023-01-05 18:21:02 +00:00
Jason Ekstrand
e8945a8ce6 isaspec: Stop depending on glue headers and out-of-folder C files
The way the isaspec decoder used to work was that it would generate a
header and a C file, each with ISA-specific stuff in it. Then that would
get built together with a stand-alone decode.c file which lives in the
isaspec folder, not the driver's folder.  In order for decode.c to find
the ISA-specific headers, it would also generate a glue header which had
to be named isaspec-isa.h.  This effectively meant that you can't have
multiple isaspec definitions in the same folder.

To solve this, we make do it the other way around and make the generated
header and C files include the stand-alone files.  This is a bit awkward
because it means including a C file from another C file but it's better
for the build system.

Acked-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20525>
2023-01-05 18:21:02 +00:00
Jason Ekstrand
4953a8db25 isaspec: Use argparse
This also cleans up some of our python script execution conventions and
handles mako errors better. Copied a bit from vk_entrypoints_gen.py.

Acked-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20525>
2023-01-05 18:21:02 +00:00
Jason Ekstrand
e83ad77ef5 isaspec: Stop using s and xml from the global namespace
We really shouldn't rely on these being global variables.  Pass them
along instead.

Acked-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20525>
2023-01-05 18:21:02 +00:00
Alyssa Rosenzweig
05c17eae2b asahi: Advertise MRT and fbfetch
These should both work now.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:23 -05:00
Alyssa Rosenzweig
fa96dfb2d7 agx: Lower discard to zs_emit when zs_emit used
It is invalid to use both sample_mask and zs_emit in the same shader. We'll need
to do something similar for sample mask writes.

Fixes Dolphin ubershaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:23 -05:00
Alyssa Rosenzweig
ebe40b15ea agx: Fix discard with MRT
The exact semantics of sample_mask aren't quite clear to me yet, but executing
multiple sample_mask instructions seems to raise a fault :|

Fixes SuperTuxKart's advanced renderer.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:23 -05:00
Alyssa Rosenzweig
2b5519e865 agx: Introduce "no_varyings" instruction
Must be used at the end of a vertex shader that does NOT write any varyings, has
rasterizer discard enabled, and is run only for its side effects.

The encoding looks like st_var, but I don't know what this actually *does*. I
just know that the GPU faults if this is omitted.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:23 -05:00
Alyssa Rosenzweig
33e3418cfe agx: Consider "stop" a control flow instruction
...and therefore it needs to be after a "logical end". This means that
"after_block_logical" will do the right thing for the last block.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
f6aa43cf42 agx: Optimize waits locally
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
a01680b979 agx: Remove logical_end later
So we can use after_block_logical in the wait insertion pass.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
73ac73308b agx: Validate widths of vectors
Check the invariant that the widths of vectors in the IR are consistent, by
checking that write registers and read registers match up between the writers
and readers respectively.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
6685dba75e agx: Add agx_read_registers helper
To be used for inserting waits post-RA.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
e6631ba5af agx: Compact st_tile argument per mask
Otherwise the number of read registers won't match the vector we input, which
will trigger validation errors.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
545a3eb601 agx: Insert waits post-RA
This is the first step towards reducing stalling.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
463744e4f9 agx: Pack texture scoreboard slots
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
01f948ee13 agx: Pack wait instructions
For different scoreboard slots.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
640afb33b9 agx: Remove unused idiv const func
This was used for instancing, but has been unused since 8dcf7648f1 ("agx: Lower VBOs in NIR")

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
44925a142e agx: Use metadata for VS varying linking
Rather than variables. This gets rid of all backend nir_variable use.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
617f2f7a02 agx: Don't use nir_variable when gathering flat varyings
Walk the IR instead. This happens when preprocessing so it doesn't really
matter, but it complicates the nir_variable audit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
d00a43f682 agx: Hash agx_instr faster
Prior to this change, agx_opt_cse is our most expensive backend pass, due to the
time spent hashing instructions. hash_instr was calling into XXH32 a massive
number of times, often to hash only a single bit. It's much faster to hash
entire blocks of memory at a time. Optimize to do just that.

With this change, agx_opt_cse is now cheaper than instruction selection as
it should be.

No shader-db changes (except CPU time decrease).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
f44afe766f agx: Use texture write mask
We do need to use undefs instead of zeroes in this internal collect. While this
vector gets copypropped out, it'd cause us to fail compilation if noopt is on.
Fix that.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
7284e4967c agx: Note that textures clobber even masked
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
ddbec45b6f agx: Plumb in store instruction
This will be used for compute kernels (and transform feedback) in the (near)
future. For now, let's get the opcode plumbed in the backend to reduce some of
the rebase pain.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
6b645f12ad asahi/lower_tilebuffer: Avoid loading sample mask
If a render target isn't written to, we don't use the sample mask. Avoid
generating the intermediate instructions, common with gl_FragColor. It will get
DCE'd, but this means less work for DCE, which should help for shader jank since
this pass gets called per-variant.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
bb677c7fc8 asahi: Remove outdated comment
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
b612690e38 asahi: Implement linear 2D array textures
These are useful for layered staging resources. Tested by forcing linear
textures and running dEQP-GLES3.functional.texture.format.sized.2d_array.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
0bc70a0074 asahi: Correct acceleration_buffer for layered images
The old calculation was wrong if layer != 0.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:49:22 -05:00
Alyssa Rosenzweig
17d4486c6a asahi: Add XML for linear 2D arrays
These look a bit like compressed images, and elucidate one of the common fields.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:48:13 -05:00
Alyssa Rosenzweig
48c9a9676c asahi: Add XML required for vertex shader side effects
Basically for rasterizer discard. We'll use these in a moment to implement
transform feedback.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:48:13 -05:00
Alyssa Rosenzweig
6bda0f2a70 asahi: Dump uniforms when decoding
These often have addresses in them.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:48:13 -05:00
Alyssa Rosenzweig
d31a9cf3ae asahi: Check box implement NV_conditional_render
Use the freedreno lowering. It'll be slow but I don't know of any apps that
actually use this and it's required for GL 3.0.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:48:13 -05:00
Alyssa Rosenzweig
21a35b58ba ail: Add compression_layer_stride_B field
So we can index into the compression buffer of layered images.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:48:13 -05:00
Alyssa Rosenzweig
d703c2887d ail: Support linear 2D arrays
These are straightforward.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:48:13 -05:00
Alyssa Rosenzweig
35494ea83e docs/features: Add more missed asahi
Should already be there.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20446>
2023-01-05 11:48:13 -05:00
Rob Clark
03beb32478 freedreno/decode: Deal with suballocated buffers
We can end up logging both the buffer that the toplevel cmdstream is
allocated, as well as the sub-allocated part of that buffer.  Possibly
the kernel could do better about this, but to avoid undecodeable
cmdstream dumps and devcores, detect this case and deal with it.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>
2023-01-05 15:44:39 +00:00
Rob Clark
8e437a2203 freedreno: Limit max draws per batch
Mostly so that piglit drawoverhead doesn't OoM itself with absurd # of
draws.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>
2023-01-05 15:44:39 +00:00
Rob Clark
8d44525feb freedreno/drm: Add nr_suballoc_bos size check
We also want to ensure we don't hit the limit of max suballoc BOs.
Piglit drawoverhead would manage to hit this.

Fixes: 4861067689 ("freedreno/drm: Add sub-allocator")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>
2023-01-05 15:44:39 +00:00
Rob Clark
912c91e383 freedreno: Fix FD_MESA_DEBUG=nohw
We need to construct a dummy fence in this case.

Fixes: 48b5164356 ("freedreno/drm: Return fence from submit flush")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>
2023-01-05 15:44:39 +00:00
Rob Clark
5c3d5f14ac freedreno/drm: Mark ring heap buffers for dumping
Ensure that these get FD_RELOC_DUMP flag set so cmdstream dumps and
devcore's capture them.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20496>
2023-01-05 15:44:39 +00:00
Bas Nieuwenhuizen
0d5570bb47 radv: Always compile accel structure shaders on demand.
Some CTS tests enable all extensions ... , which combined with having
no shader cache on some platforms results in some CTS tests timing
out (in particular tests recreating the device all the time).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20422>
2023-01-05 14:45:47 +00:00
Bas Nieuwenhuizen
ef37407971 radv: Support on demand compilation of fmask shaders.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20422>
2023-01-05 14:45:47 +00:00
Pavel Ondračka
32925bf708 r300: lower fsign in nir
Nothing significant in shader-db on RV530:
total instructions in shared programs: 134963 -> 134957 (<.01%)
instructions in affected programs: 1108 -> 1102 (-0.54%)
helped: 7
HURT: 1
total temps in shared programs: 17153 -> 17154 (<.01%)
temps in affected programs: 38 -> 39 (2.63%)
helped: 2
HURT: 3

Just some fluctuations from pair scheduling due to different code order.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20208>
2023-01-05 12:01:32 +00:00
Pavel Ondračka
9af7f7d156 r300: move some ftrunc lowering to nir
There are still some ftruncs left as most of them originates in
nir_lower_int_to_float and that is currently called after nir_opt_algebraic
in ntt.

No change in shader-db.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20208>
2023-01-05 12:01:32 +00:00