Commit Graph

11 Commits

Author SHA1 Message Date
Eric Anholt
c0e026c809 [965] Bug 14314: assertion failure with with !AIGLX and depth=24 visual. 2008-02-05 11:01:14 -08:00
Eric Anholt
fd776e10b3 Replace usage of DRM_BO_FLAG_MEM_TT in intel_regions.c with local/cached.
In addition to potentially binding when it was about to be mapped anyway,
failure to use CACHED_MAPPED means eating a full wbinvd on validate.  Thanks to
airlied for catching this.
2008-02-04 18:24:16 -08:00
Zou Nan hai
a9a483b43e [intel] use _mesa_copy_rect for upload compressed texture,
this fix bad texture issue in some games(UT and quake).
2008-02-01 17:36:56 +08:00
Kristian Høgsberg
46eb02b609 [intel] Clean up references to screen buffer metrics.
The screen wide info such as pitch and cpp are obsoleted by the FBO
changes, so clean up the last few references to those, except for
setting up the legacy screen regions.
2008-01-22 12:14:59 -05:00
Eric Anholt
3fe9d5cbb7 [intel] Merge intel_buffer_objects to shared.
965 gains fixed TTM typing of the buffer object buffers and unused PBO
functions, and 915 gains buffer size == 0 fixes from 965.
2007-12-15 12:47:23 -08:00
Eric Anholt
f5b3cd4620 [965] Use shared intel_regions.c.
This adds (so far) unused PBO functions, and holding the lock while writing
to regions (which may be shared static screen regions).
2007-12-15 12:45:52 -08:00
Eric Anholt
c5456a6b24 [intel] Remove useless intel_region_idle.
The idling it was trying to ensure was covered by the
intel_miptree_image_map()->intel_region_map() that immediately followed it.
2007-12-14 14:40:03 -08:00
Eric Anholt
7c71ef3a3d [intel] Move bufmgr back to context instead of screen, fixing glthreads.
Putting the bufmgr in the screen is not thread-safe since the emit_reloc
changes.  It also led to a significant performance hit from pthread usage
for the attempted thread-safety (up to 12% of a cpu spent on refcounting
protection in single-threaded 965).  The motivation had been to allow
multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
2007-12-12 11:52:10 -08:00
Eric Anholt
f00a64999c [intel] Add 965 support to shared intel_blit.c
This requires that regions grow a marker of whether they are tiled or not,
because fence (surface) registers are ignored by the 965 2D engine.
2007-11-16 17:29:30 -08:00
Eric Anholt
9b461d4d02 [i915] Pass static region names in so debugging says more than "static region". 2007-11-16 16:18:30 -08:00
Eric Anholt
77a5bcaff4 [intel] Move over files that will be shared with 965-fbo work. 2007-11-09 14:27:33 -08:00