Commit Graph

59437 Commits

Author SHA1 Message Date
Anuj Phogat
81f5fb352a i965: Don't do vector splitting for ir_var_system_value
This is required while adding builtin system value vec{2, 3, 4}
variables. For example:
(declare (sys) vec2 gl_SamplePosition)

Without this patch above glsl ir splits in to:
(declare (temporary) float gl_SamplePosition_x)
(declare (temporary) float gl_SamplePosition_y)

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-11-01 16:01:48 -07:00
Anuj Phogat
627b2692e9 mesa: Add a helper function _mesa_get_min_invocations_per_fragment()
This function is used to test if we need to do per sample shading or
per fragment shading.

V2: Use MAX2() to make sure the function returns a number >= 1.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-11-01 16:01:48 -07:00
Anuj Phogat
e849511c78 glsl: Add new builtins required by GL_ARB_sample_shading
New builtins added by GL_ARB_sample_shading:
in vec2 gl_SamplePosition
in int gl_SampleID
in int gl_NumSamples
out int gl_SampleMask[]

V2: - Use SWIZZLE_XXXX for STATE_NUM_SAMPLES.
    - Use "result.samplemask" in arb_output_attrib_string.
    - Add comment to explain the size of gl_SampleMask[] array.
    - Make gl_SampleID and gl_SamplePosition system values.
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-11-01 16:01:48 -07:00
Anuj Phogat
0d69e8c813 mesa: Pass number of samples as a program state variable
Number of samples will be required in fragment shader program by new
GLSL builtin uniform "gl_NumSamples".

V2: Use "state.numsamples" in place of "state.num.samples"
    Use _NEW_BUFFERS flag in place of _NEW_MULTISAMPLE

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <idr@freedesktop.org>
Reviewed-by: Ken Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-11-01 16:01:47 -07:00
Anuj Phogat
77b440e42d mesa: Add new functions and enums required by GL_ARB_sample_shading
New functions added by GL_ARB_sample_shading:
glMinSampleShadingARB()

New enums:
GL_SAMPLE_SHADING_ARB
GL_MIN_SAMPLE_SHADING_VALUE_ARB

V2: Update comments.
    Create new GL4x.xml.
    Remove redundant code in get.c.
    Update the API_XML list in Makefile.am.
    Add extra_gl40_ARB_sample_shading predicate to get.c.

V3:
   Fix make check failure.
   Add checks for desktop GL.
   Use GLfloat in place of GLclampf in glMinSampleShading().
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ken Graunke <kenneth@whitecape.org>
2013-11-01 16:01:47 -07:00
Anuj Phogat
e919e5ee4e mesa: Add infrastructure for GL_ARB_sample_shading
This patch implements the common support code required for the
GL_ARB_sample_shading extension.

V2: Move GL_ARB_sample_shading to ARB extension list.

Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <idr@freedesktop.org>
Reviewed-by: Ken Graunke <kenneth@whitecape.org>
2013-11-01 16:01:47 -07:00
Matt Turner
3c28b2c09f i965/fs: Optimize saturating SEL.G(E) with imm val <= 0.0f.
Only one program's instruction count is changed, but a shader in Tropics
is also affected.

instructions in affected programs:     326 -> 320 (-1.84%)

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-11-01 15:21:07 -07:00
Matt Turner
ca675b73d3 i965/fs: Optimize saturating SEL.L(E) with imm val >= 1.0.
total instructions in shared programs: 1409124 -> 1406971 (-0.15%)
instructions in affected programs:     158376 -> 156223 (-1.36%)

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-11-01 15:21:07 -07:00
Matt Turner
a8f76d829b i965/fs: Optimize OR with identical sources into a MOV.
Helps a lot of Steam games.

total instructions in shared programs: 1409360 -> 1409124 (-0.02%)
instructions in affected programs:     20842 -> 20606 (-1.13%)

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-11-01 15:21:07 -07:00
Eric Anholt
fd05ede0d0 glsl: Add a CSE pass.
This only operates on constant/uniform values for now, because otherwise I'd
have to deal with killing my available CSE entries when assignments happen,
and getting even this working in the tree ir was painful enough.

As is, it has the following effect in shader-db:

total instructions in shared programs: 1524077 -> 1521964 (-0.14%)
instructions in affected programs:     50629 -> 48516 (-4.17%)
GAINED:                                0
LOST:                                  0

And, for tropics, that accounts for most of the effect, the FPS
improvement is 11.67% +/- 0.72% (n=3).

v2: Use read_only field of the variable, manually check the lod_info union
    members, use get_num_operands(), rename cse_operands_visitor to
    is_cse_candidate_visitor, move all is-a-candidate logic to that
    function, and call it before checking for CSE on a given rvalue, more
    comments, use private keyword.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-11-01 10:25:33 -07:00
Eric Anholt
3641b97bdc i965/vec4: Don't overwrite op[1] when doing a UBO load.
Prior to the GLSL CSE pass, all of our testing happened to have a freshly
computed temporary in op[1], from the multiply by 16 to get a byte offset.
As of CSE you'll get var_refs of a reused value when you've got multiple
loads from the same offset.

Make a proper temporary for computing our temporary value, to avoid
shifting the value farther and farther down.  Avoids a regression in
gs-float-array-variable-index

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-11-01 10:25:33 -07:00
Brian Paul
2197967cd4 st/mesa: fix _mesa_init_transform_feedback_object() argument
Need to pass a pointer of the base type, not the st type.
Fixes a compiler warning.
2013-11-01 08:43:25 -06:00
Kenneth Graunke
723f047a3b i965: Fix brw_store_register_mem64 to stay within a single batch.
Previously, the write of each 32-bit half might land in separate batch
buffers, which is insane.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
2013-10-31 12:11:52 -07:00
Kenneth Graunke
5eb0835b91 docs: List transfom_feedback{2,3,instanced} for i965 in release notes. 2013-10-31 11:11:01 -07:00
Kenneth Graunke
0eeaf11edf i965: Enable the ARB_transform_feedback_instanced extension on Gen7+.
This depends on ARB_transform_feedback2, so I've predicated it on the
ability to do register writes.

It also depends on ARB_transform_feedback3, which is the only reason we
couldn't expose it previously.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
c4ec0ad8a9 i965: Enable the ARB_transform_feedback3 extension on Gen7+.
This extension is written a bit strangely.  Although it introduces the
concept of multiple transform feedback streams, it doesn't actually
provide more than a single stream.

The ARB_gpu_shader5 extension is what introduces the ability to write to
streams other than stream #0 and increases the required number of streams.

Since we don't yet support ARB_gpu_shader5, we can safely enable
ARB_transform_feedback3 even though we only support a single stream.
This does provide some useful functionality: applications can now use
more than one interleaved transform feedback buffer.

v2: Only expose the extension if ARB_transform_feedback2 is also
    available, to avoid confusing applications (suggested by Ian).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
066fb237e6 i965: Add support for gl_SkipComponents[1234].
ARB_transform_feedback3 allows applications to insert blank space
between interleaved varyings by adding fake 1, 2, 3, or 4-component
varyings named gl_SkipComponents[1234].

Mesa's core data structures don't explicitly track these, instead simply
tracking the buffer offset for each real varying.  If there is padding
due to gl_SkipComponents, these will not be contiguous.

Our hardware takes the specification quite literally.  Instead of
specifying offsets for each varying, it assumes they're all contiguous
and requires you to program fake varyings for each "hole".

This patch adds support for emitting SO_DECL structures for these holes.
Although we've lost the information about exactly how the application
specified their padding (i.e. gl_SkipComponents2, gl_SkipComponents2
vs. a single gl_SkipComponents4), it shouldn't matter.  We just need to
emit the right amount of space.  This patch emits the minimal number of
hole SO_DECL structures.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
7232e8bea7 i965: Explicitly maintain a count of SO_DECL structures emitted.
Currently, we emit one SO_DECL structure per output, so we use the index
in the Outputs[] array as the index into the so_decl[] array as well.

In order to support the fake "gl_SkipComponents[1234]" varyings from
ARB_transform_feedback3, we'll need to emit SO_DECLs to fill in the
holes between successive outputs.  This means we'll likely emit more
SO_DECLs than there are outputs, so we need to count it explicitly.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
e095434e52 i965: Create a temporary for transform feedback output components.
This is a bit shorter.

v2: Mark the temporary const (requested by Ian).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
129da5b1c8 i965: Enable ARB_transform_feedback2 on Gen7+ if register writes work.
With Linux 3.12, register writes work on Ivybridge and Baytrail, but not
Haswell.  That will be fixed in a future kernel revision, at which point
this extension will automatically be enabled.

v2: Use I915_GEM_DOMAIN_INSTRUCTION for the register read, and also
    correctly set the writeable flag when mapping (caught by Eric).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
46d3c2bf4d i965: Initialize batchbuffer and state modules before extensions.
We only want to enable ARB_transform_feedback2 if we can write to
registers from batchbuffers.  In order to test that, we need to be able
to submit batches.  And for batches to work, we need to program the
initial pipeline state (like PIPELINE_SELECT), which is done from
brw_state_init().

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
82a5ee6be4 i965: Implement glDrawTransformFeedback().
Implementing the GetTransformFeedbackVertexCount() driver hook allows
the VBO module to call us with the right number of vertices.

The hardware doesn't directly count the number of vertices written by
SOL, so we instead use the SO_NUM_PRIMS_WRITTEN(n) counters and multiply
by the number of vertices per primitive.

Unfortunately, counting the number of primitives generated is tricky:
a program might pause a transform feedback operation, start a second one
with a different object, then switch back and resume.  Both transform
feedback operations share the SO_NUM_PRIMS_WRITTEN counters.

To work around this, we save the counter values at Begin, Pause, Resume,
and End.  This "bookends" each section where transform feedback is
active for the current object.  Adding up differences of pairs gives
us the number of primitives generated.  (This is similar to what we
do for occlusion queries on platforms without hardware contexts.)

v2: Fix missing parenthesis in assertion (caught by Eric Anholt).
v3: Reuse prim_count_bo rather than freeing it and immediately
    allocating a new one (suggested by Topi Pohjolainen).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
b2ff11618f i965: Mark brw_draw_prims tfb_vertcount parameter as unused.
Renaming it makes it obvious that it isn't used, and the assertion
verifies that the VBO module never passes us such an object.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
ded34f65ad mesa: Add a new GetTransformFeedbackVertexCount() driver hook.
DrawTransformFeedback() needs to obtain the number of vertices written
to a particular stream during the last Begin/EndTransformFeedback block.
The new driver hook returns exactly that information.

Gallium drivers already implement this by passing the transform feedback
object to the drawing function, counting the number of vertices written
on the GPU, and using draw indirect.  This is efficient, but doesn't
always work:

If vertex data comes from user arrays, then the VBO module needs to
know how many vertices to upload, so we need to synchronously count.
Gallium drivers are currently broken in this case.

It also doesn't work if primitive restart is done in software.  For
normal drawing, vbo_draw_arrays() performs software primitive restart,
splitting the draw call in two.  vbo_draw_transform_feedback() currently
doesn't because it has no idea how many vertices need to be drawn.

The new driver hook gives it that information, allowing us to reuse
the existing vbo_draw_arrays() code to do everything right.

On Intel hardware (at least Ivybridge), using the draw indirect approach
is difficult since the hardware counts primitives, rather than vertices,
which requires doing some simple math.  So we always use this hook.

Gallium drivers will likely want to use this hook in some cases, but
want to use the existing draw indirect approach where possible.  Hence,
I've added a flag to allow drivers to opt-in to this call.

v2: Make it possible to implement this hook but only use this path
    when necessary (suggested by Marek).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
684958d1e7 i965: Implement Pause/ResumeTransformfeedback driver hooks on Gen7+.
The ARB_transform_feedback2 extension introduces the ability to pause
and resume transform feedback sessions.  Although only one can be active
at a time, it's possible to switch between multiple transform feedback
objects while paused.

In order to facilitate this, we need to save/restore the SO_WRITE_OFFSET
registers so that after resuming, the GPU continues writing where it
left off.

This functionality also exists in ES 3.0, but somehow we completely
forgot to implement it.

v2: Reduce alignment from 4096 to 64 (it seemed excessive).
v3: Use I915_GEM_DOMAIN_INSTRUCTION instead of RENDER, for consistency
    with other writes.  It shouldn't matter on IVB+.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
0d7033c394 i965: Create a new brw_transform_feedback_object subclass.
This adds the basic driver hooks to allocate/free the brw variant.
It doesn't contain any additional information yet, but it will soon.

v2: Use the new _mesa_init_transform_feedback_object helper function
    (requested by Eric and Ian).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
be6227d29d st/mesa: Use the new _mesa_init_transform_feedback_object() helper.
This picks up a missing obj->EverBound = GL_FALSE line, and will catch
any new fields that get added in the future.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-10-31 11:04:37 -07:00
Kenneth Graunke
f02ee3044f mesa: Separate transform feedback object initialization from allocation.
Both Gallium and i965 subclass gl_transform_feedback_object, which
requires implementing a custom NewTransformFeedback hook.  Creating a
helper function to initialize the fields avoids code duplication and
divergence.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-10-31 11:04:36 -07:00
Brian Paul
0e2f0baa43 vbo: fix MSVC double->float conversion warnings 2013-10-31 08:21:58 -06:00
Brian Paul
83f276ab05 swrast: fix MSVC double->float conversion warnings 2013-10-31 08:21:58 -06:00
Brian Paul
717621acff mesa: fix some MSVC signed/unsigned compiler warnings 2013-10-31 08:21:58 -06:00
Brian Paul
010f8762e8 meta: fix assorted MSVC int/float conversion warnings 2013-10-31 08:21:58 -06:00
Brian Paul
e4d4ec9ddf glsl: fix MSVC int->bool conversion warning 2013-10-31 08:21:58 -06:00
Brian Paul
3c11bc6a5a st/draw: silence Mingw warning in pointer_to_offset()
Fixes "warning: cast from pointer to integer of different size" for
64-bit builds.
2013-10-31 08:21:58 -06:00
Matt Turner
b16b3c8703 i965/fs: Perform CSE on CMP(N) instructions.
Optimizes

      cmp.ge.f0(8)  null     g45<8,8,1>F  0F
(+f0) sel(8)        g50<1>F  g40<8,8,1>F  g10<8,8,1>F
      cmp.ge.f0(8)  null     g45<8,8,1>F  0F
(+f0) sel(8)        g51<1>F  g41<8,8,1>F  g11<8,8,1>F
      cmp.ge.f0(8)  null     g45<8,8,1>F  0F
(+f0) sel(8)        g52<1>F  g42<8,8,1>F  g12<8,8,1>F
      cmp.ge.f0(8)  null     g45<8,8,1>F  0F
(+f0) sel(8)        g53<1>F  g43<8,8,1>F  g13<8,8,1>F

into

      cmp.ge.f0(8)  null     g45<8,8,1>F  0F
(+f0) sel(8)        g50<1>F  g40<8,8,1>F  g10<8,8,1>F
(+f0) sel(8)        g51<1>F  g41<8,8,1>F  g11<8,8,1>F
(+f0) sel(8)        g52<1>F  g42<8,8,1>F  g12<8,8,1>F
(+f0) sel(8)        g53<1>F  g43<8,8,1>F  g13<8,8,1>F

total instructions in shared programs: 1644938 -> 1638181 (-0.41%)
instructions in affected programs:     574955 -> 568198 (-1.18%)

Two more 16-wide programs (in L4D2). Some large (-9%) decreases in
instruction count in some of Valve's Source Engine games. No
regressions.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 19:49:27 -07:00
Matt Turner
219b43c612 i965/fs: Don't emit null MOVs in CSE.
We'd like to CSE some instructions, like CMP, that often have null
destinations. Instead of replacing them with MOVs to null, just don't
emit the MOV.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 19:49:27 -07:00
Matt Turner
a93d54eb68 i965/fs: Use reads_flag and writes_flag methods in the scheduler.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 19:49:27 -07:00
Matt Turner
20d0297ff2 i965/fs: Add reads_flag() and writes_flag() to fs_inst.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 19:49:27 -07:00
Matt Turner
f768f998e0 i965/fs: Add is_null() method to fs_reg.
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 19:49:27 -07:00
Eric Anholt
8dfc9f038e i965/fs: Use the gen7 scratch read opcode when possible.
This avoids a lot of message setup we had to do otherwise.  Improves
GLB2.7 performance with register spilling force enabled by 1.6442% +/-
0.553218% (n=4).

v2: Use BRW_PREDICATE_NONE, improve a comment (by Paul).

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 17:51:19 -07:00
Eric Anholt
6032261682 i965: Merge together opcodes for SHADER_OPCODE_GEN4_SCRATCH_READ/WRITE
I'm going to be introducing gen7 variants, and the previous naming was
going to get confusing.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 17:51:17 -07:00
Eric Anholt
32182bb004 i965/fs: Fix register unspills from a reg_offset.
We were clearing the reg_offset before trying to use it.  Oops.  Fixes
glsl-fs-texture2drect with the reg spilling debug enabled.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 17:51:15 -07:00
Eric Anholt
0e20051f54 i965/fs: Fix register spilling for 16-wide.
Things blew up when I enabled the debug register spill code without
disabling 16-wide, so I decided to just fix 16-wide spilling.

We still don't generate 16-wide when register spilling happens as part of
allocation (since we expect it to be slower), but now we can experiment
with allowing it in some cases in the future.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 17:51:10 -07:00
Eric Anholt
537f183fe6 i965/fs: Exit the compile if spilling would overwrite in-use MRFs.
I believe this will never happen in SIMD8 mode, but it could for SIMD16
when we fix it.

v2: Fix off-by-one in my register counting comment (caught by Paul).

Reviewed-by: Paul Berry <stereotype441@gmail.com> (v1)
2013-10-30 17:51:02 -07:00
Eric Anholt
44ec2f1751 i965/fs: Fix broken register spilling debug code.
Now that reg spilling generates new vgrfs, we were looping forever if you
ever turned it on.

Instead, move the debug code into the register allocator right near where
we'd be doing spilling anyway, which should more accurately reflect how
register spilling occurs in the wild.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 17:50:59 -07:00
Eric Anholt
b3f6690406 i965/fs: Split "find what MRFs were used" to a helper function.
I'm going to need to reuse this for fixing register spilling on SIMD16.
Note that BRW_MAX_MRF is 16, which is the same as BRW_MAX_GRF -
GEN7_MRF_HACK_START.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 17:50:56 -07:00
Eric Anholt
32ac5634d6 i965/fs: Update an ancient, wrong comment about reg_offset.
This hasn't been true since SIMD16 mode was added.

Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-10-30 17:50:51 -07:00
Kai Wasserbäch
bbb77fc2f1 radeonsi: Allow longer intrinsic names
Fixes a boat load of Piglit tests for me, which crashed like fdo#70913
before.

Thanks to Michel Dänzer for the tip.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70913
Signed-off-by: Kai Wasserbäch <kai@dev.carbon-project.org>
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
2013-10-30 16:40:06 -07:00
Tom Stellard
193594a1b8 clover: Don't install headers when using the icd
The ICD loader should be responsible for installing headers.

Reviewed and Tested-by: Aaron Watry <awatry@gmail.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2013-10-30 16:40:06 -07:00
Tom Stellard
6f3465f340 radeon/llvm: Specify the DataLayout when running optimizations
Without DataLayout, a lot of optimization passes aren't run and the ones
that are don't work as well.
2013-10-30 16:40:06 -07:00