Commit Graph

158954 Commits

Author SHA1 Message Date
Adrián Larumbe
6a4532cbab panfrost: Sync panfrost_drm.h from drm-misc-next
Updated from changes in commit 730c2bf4ad39 ("drm/panfrost: Add support for
devcoredump").

From drm-misc/drm-misc-next.

Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14034>
2022-08-31 23:54:55 +00:00
Adrián Larumbe
6f4f11cf70 panfrost: Add compiler args option for building usermode tools
Binaries built under src/panfrost weren't passed this compiler switch,
so it would trigger pointer arithmetic errors when using
the inlined definitions in the pandecode library.

Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14034>
2022-08-31 23:54:55 +00:00
Adrián Larumbe
8aa2e86bc3 panfrost: Remove documentation reference to deprecated parameter
'bifrost' parameter is no longer used by pandecode.

Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14034>
2022-08-31 23:54:55 +00:00
Adrián Larumbe
3da8c9193c panfrost: Handle Job VA cycles when decoding a dump file
When a job loop is submitted to the GPU, as in IGT
panfrost_submit@pan-reset, this will trigger a DRM scheduler timeout and
eventually a devcoredump. However, when pandecode traverses the list of
jobs in a submit BO, it will iterate forever.

Fix it by adding already-visited CPU VA's into a mesa pointer set and
checking that the current job's CPU VA hasn't already been handled.

Signed-off-by: Adrián Larumbe <adrian.larumbe@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14034>
2022-08-31 23:54:55 +00:00
Thomas H.P. Andersen
d3642a0e02 nvc0: fix a warning -Wconstant-conversion
I do not understand the code here well enough to tell what the correct
behavior is. prog->num_gprs is a unit8_t, so my guess is that the MIN
is there to make sure we stay within the limit of that. However the
current logic is a bit strange. If info_out.bin.maxGPR + 5 is bellow
256 we use that. If not then we write 256 which converts to 0 in a
uint8_t...

The patch changes the upper value to 255.

Fixes a warning with clang

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14304>
2022-08-31 23:44:44 +00:00
Emma Anholt
5f66a927ec gallium,glsl: Delete PIPE_CAP_VERTEXID_NOBASE and lower_vertex_id.
Every driver uses the nir_lower_system_values path now.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18327>
2022-08-31 22:57:03 +00:00
Emma Anholt
4bdd226ab6 freedreno/ir3: Switch to NIR for a3xx/a4xx's vertex id lowering.
We already have the compiler pass, just need to set the flag.  We were the
last consumer of glsl's lower_vertex_id.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18327>
2022-08-31 22:57:03 +00:00
Emma Anholt
78fce4d9e3 freedreno/ir3: Move chip-specific nir compiler options to C code.
We had a mix of common-macro-and-chip-overrides in static decls and plus
more overrides later in C code.  It's way cleaner to just have a static
decl for the base options and chip overrides in C code.

This moves a few things (lower_cs_local_index_to_id, lower_wpos_pntc,
lower_int64_options) to the common static decl that had been pasted into
both a3xx-a5xx and a6xx.

Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18327>
2022-08-31 22:57:03 +00:00
Emma Anholt
b4aa46ff89 turnip: Make sure bandwidth config per pixel starts from 0.
We'd keep incrementing the costs in a cmd buffer's dynamic_pass on each
BeginRendering.  This fixes the main renderpass of aztec ruins on zink to
use gmem, taking fps from ~8 to ~10.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18352>
2022-08-31 22:38:04 +00:00
Yiwei Zhang
2c84690349 venus/ci: mark a test as flake
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18355>
2022-08-31 22:21:58 +00:00
Yonggang Luo
2d811fdbec meson/panfrost: Add dep_valgrind for libpanfrost_pixel_format to fixes the compiling error:
In file included from src/panfrost/lib/genxml/v9_pack.h:15,
                 from ../../src/panfrost/lib/genxml/gen_macros.h:95,
                 from ../../src/panfrost/lib/pan_format.c:27:
../../src/util/bitpack_helpers.h:34:10: fatal error: valgrind.h: No such file or directory

Fixes: c52d5acf15 ("util,intel: Pull the bit packing helpers from genxml to a common header")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7169

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18350>
2022-08-31 20:22:41 +00:00
Emma Anholt
46f2c4bf25 nir_to_tgsi: Add support for bindless textures and images.
Tested on nouveau with the piglit tests.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15932>
2022-08-31 18:26:19 +00:00
Emma Anholt
1c4b64f016 nir_to_tgsi: Use nir_lower_discard_if for demote_if.
TGSI doesn't have a DEMOTE_IF, so we want to lower it back to IF DEMOTE
ENDIF.  Fixes a regression with nvc0 on nir-to-tgsi.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15932>
2022-08-31 18:26:19 +00:00
Emma Anholt
28b2252d0a nir: Make nir_lower_discard_if() handle demotes and terminates, too.
AGX and zink both want all of these lowered, but nir_to_tgsi will want
only demote (and terminate if it was possible from GLSL but it's not)

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15932>
2022-08-31 18:26:19 +00:00
Emma Anholt
d3b1579a1f nir_to_tgsi: Add support for demote, is_helper_invocation, and subgroup ops.
Found to be missing when testing on nvc0.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15932>
2022-08-31 18:26:19 +00:00
Emma Anholt
44217b7760 nir_to_tgsi: Add support for 64-bit fsign/isign.
Found missing on nouveau.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15932>
2022-08-31 18:26:19 +00:00
Emma Anholt
e616d1cade nir_to_tgsi: Add support for TG4 with explicit offsets.
Needed for nvidia.

Acked-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15932>
2022-08-31 18:26:19 +00:00
Georg Lehmann
31df102f4d ac/llvm: Fix image instructions with lod for 2d on GFX9.
If there's a lod parameter it matter if the image is 3d or 2d because
the hw reads either the fourth or third component as lod. So detect
3d images and place the lod at the third component otherwise.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18114>
2022-08-31 17:44:38 +00:00
Georg Lehmann
a82b9d6001 aco: Fix image instructions with lod when 2d_view_of_3d is enabled on GFX9.
If there's a lod parameter it matter if the image is 3d or 2d because
the hw reads either the fourth or third component as lod. So detect
3d images and place the lod at the third component otherwise.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18114>
2022-08-31 17:44:38 +00:00
Georg Lehmann
6eb4dfca23 nir/opt_algebraic: Optimize d3d9 pow with fmulz.
Foz-DB Navi21:
Totals from 69 (0.05% of 134913) affected shaders:
CodeSize: 255684 -> 253788 (-0.74%); split: -0.74%, +0.00%
Instrs: 46307 -> 46052 (-0.55%); split: -0.55%, +0.00%
Latency: 533255 -> 530742 (-0.47%); split: -0.48%, +0.01%
InvThroughput: 110001 -> 109156 (-0.77%)
VClause: 839 -> 844 (+0.60%); split: -1.19%, +1.79%
SClause: 1411 -> 1395 (-1.13%)
Copies: 1828 -> 1816 (-0.66%); split: -1.09%, +0.44%
PreSGPRs: 2243 -> 2232 (-0.49%)
PreVGPRs: 2213 -> 2192 (-0.95%)

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18145>
2022-08-31 17:07:24 +00:00
Georg Lehmann
9c2c47884d nir/opt_algebraic: Optimize check for single bit.
Foz-DB Navi21:
Totals from 3239 (2.40% of 134913) affected shaders:
SpillSGPRs: 110 -> 102 (-7.27%)
CodeSize: 17426512 -> 17344808 (-0.47%); split: -0.48%, +0.01%
Instrs: 3194264 -> 3179366 (-0.47%)
Latency: 20498012 -> 20481419 (-0.08%); split: -0.08%, +0.00%
InvThroughput: 3311738 -> 3311282 (-0.01%); split: -0.02%, +0.00%
SClause: 145810 -> 145690 (-0.08%)
Copies: 171748 -> 169009 (-1.59%); split: -1.63%, +0.03%
Branches: 86610 -> 86370 (-0.28%)
PreSGPRs: 138036 -> 137104 (-0.68%)
PreVGPRs: 138540 -> 138545 (+0.00%)

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17429>
2022-08-31 18:36:33 +02:00
Yonggang Luo
296eb2918c util: Remove the need of _MTX_INITIALIZER_NP in simple_mtx.h
The usage of _MTX_INITIALIZER_NP is a problem. Sure, the code builds on
Linux and Windows, and it even usually works, but is problematic.
It means that Windows lock debugging tools cannot be used with that code.
So we remove _MTX_INITIALIZER_NP to gain the following benefit:
  Aligning to the C11 standard threads.h definitions.
  Improving portability of the threading code to better support Windows.
This change removes one of the most prolific uses of _MTX_INITIALIZER_NP by
slightly increasing the cost of simple_mtx_lock when targeting platforms that
don't support futex, but it's cost are far less than the cost of syscall,
so the affect are negligible.

The futex code path are not affected. And Windows 8 and upper also
supports the futex codepath, so it's only affect the Windows version < 8, MacOS
or other platforms that doesn't support for futex.

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17122>
2022-08-31 15:40:20 +00:00
Yonggang Luo
064ec944c1 util: Add extern "C" guard in simple_mtx.h
This is a header that can be accessed both in C/C++,
And when remove the usage of _MTX_INITIALIZER_NP in latter commits, it's need
implement simple_mtx_init in .c file, so for ABI consistence
Add the extern "C" for cpp files

Also add comment for #endif guard for code readability

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17122>
2022-08-31 15:40:20 +00:00
Yonggang Luo
67cd0c44d2 util: Add api util_call_once_with_context
This is used to remove the need of _MTX_INITIALIZER_NP in simple_mtx.h

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17122>
2022-08-31 15:40:20 +00:00
Jason Ekstrand
201e1ba9db pvr: Only destroy the physcial device if it exists
Without this, it segfaults on instance destruction which brings down the
Vulkan app if you have the driver installed on your system, even if you
have no PowerVR hardware.

Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18330>
2022-08-31 15:30:49 +00:00
Alyssa Rosenzweig
6fed616187 pan/mdg: Print 3 sources for CSEL
The third source exists logically but not architecturally. We still need to
print it. Caught by the assertion.

Fixes: 0ee24c46e0 ("pan/mdg: Only print 2 sources for ALU")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18338>
2022-08-31 14:07:53 +00:00
Alyssa Rosenzweig
4fe755e803 pan/mdg: Always write return address to r1.w
This might not be optimal but it matches our current behaviour and is much more
justified than the "accidental" code before. Caught by the gcc warning:

../src/panfrost/midgard/midgard_schedule.c:1227:48: warning: the comparison will
always evaluate as ‘true’ for the address of ‘writeout_branch’ will never be
NULL [-Waddress]

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18338>
2022-08-31 14:07:53 +00:00
Pierre-Eric Pelloux-Prayer
d05a2243d4 radeonsi/sqtt: set stable pstate if possible
This avoids the need to manually change the power profile.

Reviewed-by: Mihai Preda <mhpreda@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18009>
2022-08-31 13:29:48 +00:00
Eric Engestrom
33426a328b wayland: avoid writing interface names as free-form strings
Signed-off-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18335>
2022-08-31 11:17:51 +01:00
Karmjit Mahil
6d34925967 pvr: Change indentation from tab to spaces for xml files.
This is done to match other drivers and to use spaces for
indentation throughout the whole of the powervr driver.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18319>
2022-08-31 08:26:17 +00:00
Frank Binns
7d614fa9b9 pvr: Implement vkResetCommandBuffer
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18317>
2022-08-31 08:13:05 +00:00
Frank Binns
88bed3babc pvr: reset all command buffer state in pvr_cmd_buffer_reset()
Command buffers were only being partially reset. Fix this by factoring out the
common parts of pvr_cmd_buffer_reset() and pvr_cmd_buffer_reset() into a common
function, so there's now only a single place to free command buffer state, and
zeroing out parts of the command buffer that were missed.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Reviewed-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18317>
2022-08-31 08:13:04 +00:00
Gert Wollny
492ec311f7 virgl/ci: remove some flakes
With the better synchronization we can now remove some flakes.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18243>
2022-08-31 08:01:22 +00:00
Gert Wollny
6e2b01e5b8 virgl: when reading back wait first, then do the transfer
Otherwise the transfer from the host might not be finished
when we try to read the data.

v2: always wait before readback, but also keep the wait after
  a possible readback, Itherwise TF fails in the CI.

Fixes: e87186fc67
    virgl: add virgl_resource_transfer_prepare

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18243>
2022-08-31 08:01:22 +00:00
Iago Toral Quiroga
1614364281 v3dv: expose VK_KHR_synchronization2
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18290>
2022-08-31 07:36:18 +00:00
Iago Toral Quiroga
378be25016 v3dv: use VkPipelineStageFlagBits2 when checking semaphore wait stage
This adds extra stages, some of which involve geometry stages that are
relevant to the check we do to check for binning sync.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18290>
2022-08-31 07:36:18 +00:00
Iago Toral Quiroga
4b50431c3e v3dv: port remaining entry points to KHR_synchronization2
The common code in Mesa will rewrite the old entry points to these
if available.

Since we implement events and timestamps queries in the driver the
API changes don't quite affect us.

vkQueueSubmit2 is already implemented in the common synchronization
framework and the driver works in terms of a submit hook that is
independent of the actual entry point used by the application.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18290>
2022-08-31 07:36:18 +00:00
Iago Toral Quiroga
9cd81fb910 v3dv: implement vkCmdPipelineBarrier2
Added with KHR_synchronization2. The common code in Mesa will
rewrite vkCmdPipelineBarrier to vkCmdPipelineBarrier2.

With synchronization2 barriers now have a per-barrier stage
and access flags (previously these were shared by all the barriers
in a vkCmdPipelineBarrier commands), so we need to rewrite a bit
the logic to account for this.

Also, stage and access flag bits have been expanded and renamed.
Particularly, some new flags have been added that we need to account
for.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18290>
2022-08-31 07:36:18 +00:00
Iago Toral Quiroga
a27111cdbd v3dv: also check GS stage on image access for binning barriers
For some reason we were only checking the binning VS stage, but we
should also check the GS, like we do for other access types.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18290>
2022-08-31 07:36:18 +00:00
Erik Faye-Lund
f5e867712f zink: request forcing of fp32-samplers to nearest when needed
Setting a linear filtering mode when not supported isn't legal, and can
lead to bad things in the VK driver. Let's ask the state-tracker to fix
this for us!

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18292>
2022-08-31 07:02:51 +00:00
Erik Faye-Lund
8abb5c8b41 mesa/st: force nearest-filtering for fp32 textures
OpenGL 3.0 requires ARB_texture_float, which technically speaking
requires linear-filtering support for FP32 textures. However, because a
lot of early implementations just ignore this and does nearest filtering
instead due to lack of hardware features for this, this functionality
was never added to the OpenGL CTS.

The result is that FP32 is a feature that is required on paper, but
is unreliable to be used by applications in practice. This is mostly
fine; for most filterable use-cases (e.g colors), FP16 is fine and saves
a bunch of bandwidth, and for cases where you really need the extra bits
(depth-reads etc), filtering is usually not what's wanted.

To save drivers that doesn't support filtering of FP32 filtering from
having to manually whack the state, and get needless CSOs in the CSO
caches, let's force this in early, where we already do the same for
integer textures.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18292>
2022-08-31 07:02:51 +00:00
Erik Faye-Lund
ec222a20da mesa/st: always force integer filtering to nearest
There's no need to re-check the DRI-config setting here; we either
already got nearest filtering already, or the we applied a work-around
to avoid incomplete textures. In either case, these should be nearest,
no need to check for it again.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18292>
2022-08-31 07:02:51 +00:00
Erik Faye-Lund
70c71c4200 mesa/st: also override mip filter for integer textures
If not, drivers may attempt interpolating these values, which isn't
going to do anything good.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18292>
2022-08-31 07:02:51 +00:00
Samuel Pitoiset
d2de931c16 radv: determine if the topology uses adjacency from the shaders on GFX9+
From the Vulkan spec says:
    "VUID-VkGraphicsPipelineCreateInfo-pStages-00738
     If the pipeline is being created with pre-rasterization shader
     state and pStages includes a geometry shader stage, and does not
     include any tessellation shader stages, its shader code must
     contain an OpExecutionMode instruction specifying an input
     primitive type that is compatible with the primitive topology
     specified in pInputAssembly"

In other words, the GS input primitive and the topology must match, so
it's possible to get this information directly from the GS instead of
from the pipeline key. Main benefit is that the driver can compile all
pre-rasterization stages without knowing the primitive topology.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18282>
2022-08-31 06:31:48 +00:00
Samuel Pitoiset
4406905600 radv: allow null descriptor set layouts in pipeline layouts
This is allowed by the Vulkan spec when GPL is used.

Fixes dEQP-VK.pipeline.pipeline_library.graphics_library.misc.other.null_descriptor_set_in_monolithic_pipeline

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18313>
2022-08-31 06:13:14 +00:00
Iago Toral Quiroga
ca33c319e5 v3dv: implement VK_KHR_zero_initialize_workgroup_memory
This only requires that we call the relevant lowering pass in NIR.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18312>
2022-08-31 07:33:19 +02:00
Iago Toral Quiroga
a68a2805bf nir/lower_variable_initializers: implement non-scoped barrier path
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18312>
2022-08-31 07:25:00 +02:00
Bas Nieuwenhuizen
40ad12126f radv: Remove redundant radv_QueuePresentKHR.
Does the same thing as the wsi function.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18293>
2022-08-31 03:25:52 +00:00
Yiwei Zhang
0e0e5d1f20 venus: allow no external memory handle when renderers lacks support
This is to make vtest happy.

Fixes: 9c5a7ffbd8 ("venus: fix external memory ext filtering")

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18331>
2022-08-31 03:13:39 +00:00
Emma Anholt
80b35fbefe nir/lower_mediump: Lower FS outputs to 16-bit when the value was upconverted.
Take this real-world (trimmed) shader:

precision highp float;
in lowp vec4 var_varVertexColor;
layout(location = 0) out vec4 out_FragColor0;
void main() {
    vec4 textureColor0 = vec4(1.000000e+00, 0.000000e+00, 0.000000e+00, 1.000000e+00);
    vec3 color = vec3(1.000000e+00, 1.000000e+00, 1.000000e+00);
    vec4 outColor = vec4(vec3((color).rgb), 1.000000e+00);
    (outColor *= vec4(var_varVertexColor));
    (out_FragColor0 = outColor);
}

After opts, it's just a store from input to output.  If we decide to lower
the input to 16-bit, then as long as the driver can handle 16-bit outputs,
it would be a good idea to demote the output and save the conversions.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18003>
2022-08-31 02:43:45 +00:00