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1169 Commits

Author SHA1 Message Date
Lionel Landwerlin
67a8b70c57 anv: hide exec_flags selection inside the i915 backend 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24073>
 2023-07-13 17:12:26 +00:00
José Roberto de Souza
2fa4fe2c85 anv: Fix some mismatches of canonical and regular addresses around anv_bo_vma_alloc_or_close() 
anv_vma_alloc() returns a canonical address, but explicit_address is a
regular address. This mismatch can potentially cause issues.

So here making bo->offset as always canonical address by converting it
in the explicit case and fixing the only caller that was caling
anv_bo_vma_alloc_or_close() with a canonical address.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23977>
 2023-07-04 15:24:04 +00:00
Lionel Landwerlin
2e8c0a33e7 anv: implement storage image depth query using descriptor buffer read 
The HW not returning the depth value we would like for
VK_EXT_sliced_view_of_3d, we can pull that value by reading the
RENDER_SURFACE_STATE struct directly.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23868>
 2023-06-29 10:32:20 +00:00
Sagar Ghuge
0b42a6c3b5 anv: Add CCS cache flush bits to anv_pipe_bits 
This will help us to flush the entries out of the CCS cache.

v2:
- Move enum value close to HW bits section (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
 2023-06-26 15:57:39 -07:00
Matt Turner
727335045d anv: Pipe anv_physical_device to anv_get_image_format_features2 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23776>
 2023-06-24 02:54:37 +00:00
Lionel Landwerlin
61496915c2 anv: tracking query buffer writes & query clears separately 
Clears should be flushed only on :
  - vkCmdBeginQuery*
  - vkCmdWriteTimestamp*
  - vkCmdWriteAccelerationStructuresPropertiesKHR
  - vkCmdCopyQueryPoolResults

Buffer writes should be flush only on :
  - vkCmdCopyQueryPoolResults

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
 2023-06-20 02:34:51 +00:00
Lionel Landwerlin
8c548700b6 anv: change the way we clear pending query bits 
Instead of having genX(emit_apply_pipe_flushes) doing the clearing,
ask genX(emit_apply_pipe_flushes) for the emitted bits and do the
clearing using a helper.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
 2023-06-20 02:34:51 +00:00
Lionel Landwerlin
0e728ea7b0 anv: avoid private buffer allocations in vkGetDeviceImageMemoryRequirementsKHR 
The whole point of vkGetDeviceImageMemoryRequirementsKHR is to avoid
creating an image so we should completely avoid any allocation like
the private binding.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4075dd16ab ("anv: implement vkGetDeviceImageMemoryRequirementsKHR")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23720>
 2023-06-19 18:35:30 +03:00
Lionel Landwerlin
b3b12c2c27 anv: enable CmdCopyQueryPoolResults to use shader for copies 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:57 +03:00
Lionel Landwerlin
930e862af7 anv: add shaders for copying query results 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:57 +03:00
Lionel Landwerlin
4cee8ce7a5 anv: generalize internal kernel concept 
We'll add more of those kernels for other purposes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:57 +03:00
Lionel Landwerlin
dbbcd5c32c anv: factor out generation kernel dispatch into helper 
We would like to reuse this mechanism to dispatch different types of
internal shader. Those would replace some of the command streamer
commands we currently use.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:57 +03:00
Lionel Landwerlin
455a13fb7f anv: limit ANV_PIPE_RENDER_TARGET_BUFFER_WRITES to blorp operations using 3D 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:56 +03:00
Rohan Garg
d0e0ba897f anv: split ANV_PIPE_RENDER_TARGET_BUFFER_WRITES for finer grained flushing 
split ANV_PIPE_RENDER_TARGET_BUFFER_WRITES into separate CS_STALL,
RT_FLUSH & TILE_FLUSH flags in order to have finer control over cache
coherency.

Tigerlake CS has it's own cache fetching directly from the memory controller,
so we need to do a tile flush to ensure the query data is visible.

This fixes test_resolve_non_issued_query_data in vkd3d on TGL.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Fixes: 3c4c18341a ("anv: narrow flushing of the render target to buffer writes")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23500>
 2023-06-12 14:46:44 +00:00
Emma Anholt
0be83bf1c4 anv: Drop unused ALL_GRAPHICS_LIB_FLAGS. 
copy and paste from radv.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22865>
 2023-06-06 09:03:09 +00:00
Felix DeGrood
5731ebac40 anv: override vendorID for Cyberpunk 2077 
A recent update to Cyberpunk 2077 enables XeSS code for Intel GPUs
which is causing the game to crash in the XeSS libraries.  As a
temporary work around, stop identifying as Intel for Cyberpunk so
XeSS falls back to the cross-vendor path.

References: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8860
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23271>
 2023-05-30 01:05:36 -07:00
Lionel Landwerlin
a8ef34bd31 anv: bring back the max number of sets to 8 
Not sure we bumped it to 32 for the right reasons. This generates more
push constant data and because we're not tighly packing our push
constant data this can generate more register pressure.

We could tightly pack things at the cost of some CPU cycles but only
for some stages. RT stages would have to retain the current "sparse"
version of push constants.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
1d24d0bdcc anv: track descriptor data size 
descriptor_stride includes multiple plane size, this new field tracks
just the data of one plane.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
739981e0ac anv: implement binding table emission for direct descriptors 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
5676d51c1c anv: handle null surface in the binding table with direct descriptors 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
688968e888 anv: add support for direct descriptor in allocation/writes 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
64f20cec28 anv: prepare image/buffer views for non indirect descriptors 
When in direct descriptor mode, the descriptor pool buffers will hold
surface states directly. We won't allocate surface states in image &
buffer views.

Instead views will hold a packed RENDER_SURFACE_STATE ready to copied
into the descriptor buffers.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
77c0146747 anv: new structure to hold surface states 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
3f1ff326e0 anv: reduce push constant size for descriptor sets 
Now that descriptor sets are located a in a 1Gb area, we can avoid
storing the whole address to the descriptor and add the base address
of the area to a 32bit offset.

Replay a bunch of fossils with this and changes not really significant
one way or another :

Totals:
Instrs: 9278246 -> 9277148 (-0.01%); split: -0.01%, +0.00%
Cycles: 3547598421 -> 3547579435 (-0.00%); split: -0.00%, +0.00%

Totals from 353 (1.14% of 31021) affected shaders:
Instrs: 581546 -> 580448 (-0.19%); split: -0.23%, +0.04%
Cycles: 25885422 -> 25866436 (-0.07%); split: -0.31%, +0.24%

No difference on send messages or spills/fills.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
d2c0147228 anv: create a pool for indirect descriptors 
We'll use the fact that the pool is aligned to 4Gb to limit the amount
of address computations to build the address in the shaders.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
6367691b58 anv: introduce a new descriptor set layout type 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
7b9d27e613 anv: add an option for using indirect descriptors 
This is the default for now. It needs to be part the pipeline hashing
as we will allow this to be tweaked per application.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:37 +00:00
Lionel Landwerlin
257bf9b6c3 anv: toggle extended bindless surface state on Gfx12.5+ 
We bump the max surfaces to ~16 million instead of ~1 million on
Gfx9-12. We could do more but that'll come later.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:37 +00:00
Lionel Landwerlin
1f8ede792e anv: move pipeline active_stages to common structure 
And fill it out for all types of pipelines.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:37 +00:00
Lionel Landwerlin
7eb8e71182 anv: track pipeline in anv_cmd_pipeline_state 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:37 +00:00
Lionel Landwerlin
efcda1c530 anv: fix null descriptor handling with A64 messages 
global load/store (or A64 messages) need the NIR bound checking which
is enabled by "robust" behavior even when robust behavior is disabled.

Many thanks to Christopher Snowhill for pointing out the pushed
constant related issue with the initial version of this patch.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:37 +00:00
Lionel Landwerlin
944004dc8a anv: remove unused define 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:37 +00:00
Rohan Garg
3debf2af0c anv: set aux usage to GFX12_CCS_E if a platform needs WA 14010672564 
Account for the aux usage in various places now that we set the aux
usage correctly.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22076>
 2023-05-29 16:48:47 +00:00
Lionel Landwerlin
e9fa840eed anv: implement EDS2.extendedDynamicState2PatchControlPoints 
We make the compiler assume the worst possible case (it's not great
because we have to burn 32 GRFs of potential input data) and then we
push the actual value through push constants.

This enables VK_EXT_gpl usage on zink, which causes two traces to change
their results.  Raven is an imperceptible change, blender has missing
original pngs but looks plausible.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22378>
 2023-05-24 18:32:07 +00:00
Lionel Landwerlin
521c216efc anv: use COMPUTE_WALKER post sync field to track compute work 
This is more accurate than PIPE_CONTROL as it won't introduce stalls
between the compute dispatches.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23131>
 2023-05-24 09:09:01 +03:00
José Roberto de Souza
fd99b671ff anv: Nuke ANV_BO_ALLOC_WRITE_COMBINE 
In i915 if the device has local memory it can only mmap bo with
I915_MMAP_OFFSET_FIXED, so all this set of ANV_BO_ALLOC_WRITE_COMBINE
were useless.

In Xe KMD there is no way to change mmap mode for all GPUs types.

So we can nuke bo->map_wc, ANV_BO_ALLOC_WRITE_COMBINE and related
dead code.

No changes in behavior expected here.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22483>
 2023-05-19 21:34:35 +00:00
Hyunjun Ko
50374b1f9a anv: support P010 format for video 10-bit hevc decoding 
Only for video 10-bit hevc decoding, so shouldn't enable such as YCbCr
conversion.

v1. Fix to avoid YCbCr CTS tests for this format.
( Lionel Landwerlin <lionel.g.landwerlin@intel.com> )

v2. Add a flag can_video so we could handle supported video formats
neatly.
( Lionel Landwerlin <lionel.g.landwerlin@intel.com> )

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
 2023-05-19 06:15:02 +00:00
Hyunjun Ko
8d519eb5f5 anv: add initial video decode support for h265 
Tested on CometLake(gen9) and AlderLake(gen12)

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22202>
 2023-05-19 06:15:02 +00:00
Lionel Landwerlin
1a89b1a301 anv: mark images compressed for untracked layout/access 
Most of the compressed writes are tracked by the driver, for
instances :
   - blorp writes
   - render target writes

But we don't have any tracking for storage images (which have gained
compression support on DG2+). So inspect the layout transition and
when we see a layout/access that can do writes outside of our driver
tracking, update the image state tracking.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8946
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22988>
 2023-05-17 22:01:31 +00:00
Lionel Landwerlin
7f7b2fc53a anv: put private binding BOs into execlists 
Not doing so all the reads/writes go to the scratch page on i915.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: f9fa09ec92 ("anv/image: Add ANV_IMAGE_MEMORY_BINDING_PRIVATE")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22957>
 2023-05-17 14:59:14 +00:00
Iván Briano
fbc0e74bda anv: enable graphics pipeline libraries by default 
Since we are disabling mesh, which has issues with gpl, enable gpl by
default now, leaving the renamed environment variable as a way to
disable it for debug purposes.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22910>
 2023-05-10 01:23:16 +00:00
Rohan Garg
1896b48f4e anv: use the workaround framework for WA 14013111325 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22830>
 2023-05-09 10:22:02 +02:00
Lionel Landwerlin
c60e94d61f anv: make internal address space allocation more dynamic 
We're about to manipulate these pools and dealing with the fix address
ranges is painful.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22847>
 2023-05-05 14:48:15 +03:00
Lionel Landwerlin
843afd4c63 anv: link anv_bo to its VMA heap 
We want to add more heaps in the future and so not having to do
address checks to find out in what heap to release a BO is convinient.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22847>
 2023-05-05 14:48:15 +03:00
Lionel Landwerlin
53b77a8102 anv: remove 48bit address space checks 
All the supported platforms should have 36+ bits of virtual address
space.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22847>
 2023-05-05 14:48:15 +03:00
Iván Briano
5faf75dd74 anv: expose some helper functions 
v2: (Rohan Garg)
- Make set_fast_clear_state take an image and format instead of an iview

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
 2023-04-24 21:33:49 +00:00
Iván Briano
2a67a1f0c2 anv: make anv_can_fast_clear_color_view more generally available 
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
 2023-04-24 21:33:49 +00:00
Sagar Ghuge
ee03b30e45 anv: Move and make anv_can_hiz_clear_ds_view non-static 
v2:
- Pass const image view param. (Nanley)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20175>
 2023-04-24 21:33:49 +00:00
Lionel Landwerlin
56840e4c89 anv: rework Wa_14017076903 to only apply with occlusion queries 
Fixes KHR-GL46.transform_feedback.* tests with zink+anv on DG2

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: c34916f841 ("anv: implement occlusion query related Wa_14017076903")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22586>
 2023-04-21 12:48:52 +00:00
Lionel Landwerlin
3beaaa9ae8 anv: drop lowered storage images code 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22302>
 2023-04-18 08:38:55 +00:00