Commit Graph

189722 Commits

Author SHA1 Message Date
Eric Engestrom
6789d4c0b2 zink+nvk/ci: more KHR-GL46.packed_pixels.varied_rectangle.* flakes, so mark the group as flaky
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29371>
2024-05-24 08:45:39 +02:00
Eric Engestrom
6843a7951b ci/b2c: make B2C_JOB_WARN_REGEX optional
Fixes: bfd4db0476 ("radv/ci: move amdgpu-specific kernel message warning to src/amd/ci/")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29368>
2024-05-24 05:58:26 +00:00
Iago Toral Quiroga
865e682ad7 broadcom/compiler: apply payload conflict to spill setup before RA
We can emit spill setup before RA if we use scratch. In that case
we have the same situation as during spilling, with the caveat that
we have already emitted the instructions so we need to find them
(they should be the only instructions ones before the instructions
accessing payload registers) and flag them as such.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343>
2024-05-24 05:25:22 +00:00
Iago Toral Quiroga
cb83f25b39 broadcom/compiler: don't assign payload registers to spilling setup temps
We read our payload registers first in the shader so we generally don't have
to care about temps being allocated to them and stomping their value before
we can read them. Hoewer, spilling setup instructions are an exception since
these will be inserted first when there is any spilling in the program.
To fix this, we flag RA nodes involved with these instructions so we can
then try to avoid assiging these registers to them.

Fixes CTS failures with V3D_DEBUG=opt_compile_time, particularly:
dEQP-VK.binding_model.buffer_device_address.set0.depth2.basessbo.convertcheckuv2.nostore.single.std140.comp_offset_nonzero

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343>
2024-05-24 05:25:22 +00:00
Iago Toral Quiroga
901c485997 broadcom/compiler: make add_node return the node index
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29343>
2024-05-24 05:25:21 +00:00
David Heidelberg
33492dd9e8 ci/radv: dEQP-GLES3.functional.polygon_offset.fixed16_render_with_units passes now
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29367>
2024-05-24 03:45:44 +00:00
David Heidelberg
c39cf7bcab docs: correct svga3d redirected URLs
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29366>
2024-05-24 03:19:21 +00:00
David Heidelberg
fca045f02f ci/freedreno: a3xx will never have Vulkan support
Do not spam CI logs.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29365>
2024-05-24 02:56:47 +00:00
Yiwei Zhang
c71f650c2d ci/venus: skip a timeout test
There're already a few similar ones being skipped.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29362>
2024-05-24 02:34:45 +00:00
Yiwei Zhang
60488962db venus: allow non-wsi image alias path to passthrough upon bind memory
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29362>
2024-05-24 02:34:45 +00:00
Yiwei Zhang
c97f9193ef venus: drop internal memory pools
This exists due to historical limitations which have long gone obsolete.
This persists longer due to hostorical perf issues that have recently
gone obsolete on the platforms shipping Venus. Meanwhile, clients like
skiavk and ANGLE nowadays do a better job managing suballocations. The
tiny perf win from having this giant internal pool has been beaten by
the memory waste, longer one-shot jank due to largier alloc, allocations
no need to be mapped but only because host-visible is advertised across
mem types and varies workarounds and markups needed to make alignment
work and make VVL happy. Dropping it also reduces the maintenance cost.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29362>
2024-05-24 02:34:45 +00:00
David Heidelberg
db62ec3370 ci/nouveau: adjust and add DEVICE_TYPE
Rather than string made from farm-device, use DTB as we use for most of
the DEVICE_TYPE entries.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26758>
2024-05-23 22:50:20 +00:00
David Heidelberg
18eb91da59 ci/nouveau: separate HW definition from SW
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26758>
2024-05-23 22:50:20 +00:00
David Heidelberg
6bc660a542 ci/nouveau: move disabled jobs back from include into main gitlab-ci.yml
Fixes: 9442571664 ("ci: separate hiden jobs to -inc.yml files")

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26758>
2024-05-23 22:50:20 +00:00
David Heidelberg
d315585d89 ci/r300: update flake list from nightly reports
Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29255>
2024-05-23 21:32:35 +00:00
Rob Clark
450c9460c6 freedreno/loader: Switch over to probe_nctx
Unwind the hacks that were previously used for freedreno to probe on
virtgpu, and switch over to the new mechanism.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28777>
2024-05-23 20:02:04 +00:00
Rob Clark
2ea4a59ab7 loader: Add better support for virtgpu nctx driver loading
In the case of virtio_gpu, if the drm native context capset is
supported, we should try loading the native driver before falling back
to virgl.

Previously this was done with hacks in pipe_virtio_gpu_create_screen(),
but this also requires virgl's driconf to be the superset of virgl and
all the nctx drivers.

Instead add an optional loader callback to probe for nctx support.  This
is called with the drm capset, if the host supports the drm context
type, to allow driver specific code to determine if the specific GPU is
supported, so we can cleanly fall back to virgl if it does not (for ex,
an old VM guest with a newer host, where mesa in the guest does not
support the new GPU, but mesa in the host does).

TODO: How to handle the dynamic loader case?

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28777>
2024-05-23 20:02:03 +00:00
Rob Clark
27ebf58ee8 virgl: Update headers
VIRGL_RENDERER_UNSTABLE_APIS has been dropped upstream

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28777>
2024-05-23 20:02:03 +00:00
Rob Clark
bba6418fcb freedreno: Namespace DEFINE_CAST()
Otherwise it conflicts with a similar macro in drm_hw.h.  (Which should
also be renamed, but better to rename that in virglrenderer tree first.)

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28777>
2024-05-23 20:02:03 +00:00
Lionel Landwerlin
5f2288095b anv: fix shader identifier handling
When compilation is required, we should return
VK_PIPELINE_COMPILE_REQUIRED. The spec prevents the application from
passing a module or SPIR-V code so we have nothing to compile if the
cache lookup fails :

VUID-VkPipelineShaderStageCreateInfo-stage-06844:
   If a shader module identifier is specified for this stage, a
   VkShaderModuleCreateInfo structure must not be present in the pNext
   chain

VUID-VkPipelineShaderStageCreateInfo-stage-06848:
   If a shader module identifier is specified for this stage, module
   must be VK_NULL_HANDLE

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11208
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29340>
2024-05-23 19:05:05 +00:00
Eric Engestrom
bfd4db0476 radv/ci: move amdgpu-specific kernel message warning to src/amd/ci/
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29339>
2024-05-23 18:28:41 +00:00
Caio Oliveira
e3099fc839 spirv: Add MESA_SPIRV_DEBUG=values to dump all values
Dumps the value associated with each SPIR-V ID after parsing the module.
This will show the intermediate vtn_* values that spirv_to_nir uses.
Only a subset of detailed information is printed at the moment (focus on
pointers and pointer types), but it is easy to add for other value types
later.

Example output when running crucible with the debug option enabled.

```
    crucible: start  : func.compute.num-workgroups.basic.q0
    === SPIR-V values
           1 = extension
           2 = type void glsl_type=void
           3 = type function
           4 = function
           5 = block
           6 = type scalar glsl_type=uint
           7 = type vector glsl_type=uvec3
           8 = type array glsl_type=uvec3[]
           9 = type struct glsl_type=Storage
          10 = type pointer deref=9 SpvStorageClassUniform glsl_type=uvec4
          11 = pointer ptr_type=10 (pointed-)type=9
          12 = type scalar glsl_type=int
          13 = constant type=12
          14 = type pointer deref=7 SpvStorageClassInput glsl_type=uint
          15 = pointer ptr_type=14 (pointed-)type=7
          16 = constant type=6
          17 = type pointer deref=6 SpvStorageClassInput glsl_type=uint
          18 = pointer ptr_type=17 (pointed-)type=6
               NIR: 32    %2 = deref_array &(*%0)[0] (system uint)  // &gl_LocalInvocationID[0]
          19 = ssa glsl_type=uint
          20 = pointer ptr_type=14 (pointed-)type=7
          21 = ssa glsl_type=uvec3
          22 = type pointer deref=7 SpvStorageClassUniform glsl_type=uint
          23 = pointer ptr_type=22 (pointed-)type=7
               NIR: 32x4  %12 = deref_array &(*%11)[%4] (ssbo uvec3)  // &((Storage *)%9)->uv3a[%4]
          24 = constant type=6
          25 = constant type=6
          26 = constant type=7
    ===
    crucible: pass   : func.compute.num-workgroups.basic.q0
```

When the environment variable is set, this dump will also be printed
during vtn_fail and its helpers.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29295>
2024-05-23 17:07:31 +00:00
Eric Engestrom
0effbc625c nvk/ci: add missing .test rules to avoid running nvk tests in post-merge pipeline
Fixes: 94c82cd938 ("nvk/ci: add nvk job on a GA106 (RTX 3060)")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29352>
2024-05-23 16:45:29 +00:00
Samuel Pitoiset
d0810d528c radeonsi: use the common helper for initializing DS surfaces
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329>
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
ed30b320c8 radv: use the common helper for initializing DS surfaces
This adds GFX12 support implicitly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329>
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
636110485f amd/common: add a function to initialize ds surface
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329>
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
e1da1c891c radv: separate non-mutable vs mutable fields for ds surface
RADV doesn't really have a concept of mutable fields but RadeonSI does.
Separate setting those fields to introduce common helpers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329>
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
55be5868c5 radv: tidy up radv_initialise_ds_surface()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329>
2024-05-23 15:47:14 +00:00
Samuel Pitoiset
e9a390cb94 radv: replace db_{z,stencil}_{read,write}_base by db_{depth,stencil}_base
Both read/write register values are similar.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29329>
2024-05-23 15:47:14 +00:00
Eric R. Smith
4d298673da get_color_read_type: make sure format/type combo is legal for gles
The GLES spec limits the valid combinations of format and type that
may be returned by queries and/or used by ReadPixel. The list of valid
combinations appears in table 8.2 of the GLES 3.2 spec. Our code for
reporting the type and format of the current framebuffer, however,
does not verify that the combination is legal for GLES. For example,
RGBA and UNSIGNED_SHORT_1_5_5_5_REV is not a valid GLES combination,
but it's what we were returning for a panthor 16 bit frame buffer.

We can fix this either by changing the format or type that we return
(internally we can handle any format/type combination). We advertise the
read_format_bgra extension, so we could return GL_BGRA for the format.
However, very few applications (including notably the Khronos CTS for GLES)
cope well with BGRA. So instead we change the type to a non-_REV one
so that the combination appears in the GLES spec table of legal values.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29144>
2024-05-23 15:04:30 +00:00
Collabora's Gfx CI Team
5120d51d82 Uprev Piglit to e180f96239edba441f22f58dfc852cafb902844a
8a6ce9c6fc...e180f96239

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29317>
2024-05-23 14:04:22 +00:00
Timur Kristóf
c23c5c0a07 nir/opt_varyings: Don't promote flat inputs when moving post-dominator.
Promoting flat inputs should only happen while assigning FS input
slot groups. Otherwise we risk adding extra input slots, which
is undesireable.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29208>
2024-05-23 13:14:46 +00:00
Timur Kristóf
9dad0ced52 nir/opt_varyings: Print FS VEC4 type when debugging relocate_slot.
Useful when debugging this pass.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29208>
2024-05-23 13:14:46 +00:00
Eric Engestrom
72330e607f nvk/ci: mark the job as failing in case of hangs, instead of silently rebooting
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29341>
2024-05-23 10:48:19 +00:00
Eric Engestrom
93493ea441 nvk/ci: adjust the regex for "dut is broken and needs to be rebooted"
We are seeing issues where the regex matches when it shouldn't, and
I think it might be because the `:` is causing issues in yaml.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29341>
2024-05-23 10:48:19 +00:00
Erik Faye-Lund
afef382009 panfrost: untangle faces from layers
The hardware doesn't prevent us from mapping random 2DArray layers
as cube/cube arrays. The only restriction we have is on the number
of layers we pass (must be a multiple of 6 for cube arrays).

This patch makes the surface emission logic cube-agnostic, and
moves the cube face -> surface index conversion logic one layer
up to simplify things.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28909>
2024-05-23 10:18:07 +00:00
Erik Faye-Lund
8455e0521e panfrost: explicitly loop over surfaces
The surface iterator here doesn't really help much. It seems much more
to the point to explicitly iterate over the surfaces in the order the HW
descriptors expects it.

This will make it easier to change how things works in the future,
especially for V9 and later. More on that in a later commit.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28909>
2024-05-23 10:18:07 +00:00
Erik Faye-Lund
6497adeb35 panfrost: simplify panfrost_texture_num_elements
Adjusting the cube-dimensions to account for layers and faces does
nothing to change the number of elements, it just shifts the number
between the two.

This means we can simplify things a bit, and avoid a questionable assert
in the process.

Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28909>
2024-05-23 10:18:07 +00:00
Jose Maria Casanova Crespo
7cb2831ef5 v3dv/ci: Add more dEQP-VK subgroups that are currently skipped
We are skipping additional 357684 tests for the following subgroups
where all tests results are skip to reduce CI usage testing skipped
tests. It reduces the CI time execution by a 2%.

 14304 dEQP-VK.binding_model.mutable_descriptor.*
 22948 dEQP-VK.binding_model.shader_access.primary_cmd_buf.bind2.*
 20258 dEQP-VK.binding_model.shader_access.secondary_cmd_buf.bind2.*
 11662 dEQP-VK.compute.shader_object_binary.*
 11662 dEQP-VK.compute.shader_object_spirv.*
196299 dEQP-VK.image.host_image_copy.*
 14043 dEQP-VK.query_pool.statistics_query.*
 54656 dEQP-VK.robustness.robustness2.*
 11852 dEQP-VK.sparse_resources.*

We are also using alphabetical order these subgroups.

Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29328>
2024-05-23 11:55:26 +02:00
Eric Engestrom
8b448ffdd7 turnip+zink/ci: add gl & gles CTS jobs on the a750
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29026>
2024-05-23 06:58:01 +00:00
Eric Engestrom
3088af9051 turnip/ci: add vkcts jobs on the a750
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29026>
2024-05-23 06:58:01 +00:00
Martin Roukala (né Peres)
6f9614c187 ci/b2c: Reduce the length of the kernel cmdline
The qcom boards I am about to introduce do not support long kernel
cmdline, so reduce its size by making use of b2c's extra argument URL.

Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29026>
2024-05-23 06:58:01 +00:00
Eric Engestrom
265b0ebd9a ci/b2c: add aarch64 tests for gl & vk
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29026>
2024-05-23 06:58:01 +00:00
Samuel Pitoiset
2867a07922 radv: fix setting a custom pitch for CB on GFX10_3+
The gfx_level check was missing the version...

Found by inspection.

Fixes: 3f7ddaf281 ("radv: implement setting a custom pitch to any multiple of 256B on gfx10.3+"
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29331>
2024-05-23 06:10:07 +00:00
Eric Engestrom
f168dc6d53 zink/ci: rename zink-turnip collabora rule to make it unambiguous
We're about to add zink-turnip jobs on another farm.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241>
2024-05-23 06:01:09 +02:00
Eric Engestrom
815a5e9a8e ci: add debian/arm64_test images for gl & vk
These are real ARM images, unlike the `debian/baremetal_arm*_test` ones
that are x86_64 images with the ARM stuff tucked away in a sub-folder.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241>
2024-05-23 06:00:50 +02:00
Eric Engestrom
7fb13a9153 ci/image-tags: rename DEBIAN_X86_64_TEST_*_TAG to drop the x86 mention
We're about to add ARM images using this same infra.

Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241>
2024-05-23 06:00:50 +02:00
Eric Engestrom
c325632b14 ci: prepare VK debian test image for multi-arch
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241>
2024-05-23 06:00:23 +02:00
Eric Engestrom
124ff9c232 ci: prepare GL debian test image for multi-arch
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241>
2024-05-23 06:00:22 +02:00
Eric Engestrom
3cd6f86b7e ci: prepare base debian test image for multi-arch
Signed-off-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29241>
2024-05-23 06:00:22 +02:00