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1112 Commits

Author SHA1 Message Date
Jason Ekstrand
415bf88637 anv: Switch to common code for command buffer lifecycles 
This gets us command buffer object recycling.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18383>
 2022-11-10 11:15:23 +00:00
José Roberto de Souza
29550bc50a intel: Add has_context_isolation to intel_device_info 
Iris, hasvk and anv were fetching the same information, better do it
on one place.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19425>
 2022-11-07 17:22:14 +00:00
José Roberto de Souza
d5d1331381 intel: Add has_userptr_probe to intel_device_info 
Iris, hasvk and anv were fetching the same information, better do it
on one place.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19425>
 2022-11-07 17:22:14 +00:00
José Roberto de Souza
e9eceb1106 intel: Add has_mmap_offset to intel_device_info 
All 4 drivers were fetching the same information, better do it on one
place.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19425>
 2022-11-07 17:22:14 +00:00
José Roberto de Souza
dfd20f002f intel: Add and use intel_gem_get_param() 
Again sharing the same function across all Intel drivers.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19425>
 2022-11-07 17:22:14 +00:00
Jason Ekstrand
402a9a36f0 anv: Rip out shadow surfaces 
These are only used for storage-compatible compressed surfaces on
Broadwell and earlier and Stencil on Gfx7 where there isn't proper
stencil sampling support.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18402>
 2022-11-07 12:07:11 +00:00
José Roberto de Souza
39486661e9 intel: Add and use intel_gem_set_context_param() 
Again sharing the same function across all Intel drivers.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18974>
 2022-11-03 21:01:30 +00:00
José Roberto de Souza
6ae6921216 intel: Add and use intel_gem_destroy_context() 
Again sharing the same function across all Intel drivers.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18974>
 2022-11-03 21:01:30 +00:00
José Roberto de Souza
f928ead625 intel: Add and use intel_gem_create_context() 
Add intel_gem_create_context() to common/intel_gem.c/h and use it
on Iris, Crocus, ANV and HASVK.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18974>
 2022-11-03 21:01:30 +00:00
Lionel Landwerlin
ba0336ab3f anv: Reduce RHWO optimization (Wa_1508744258) 
Implement Wa_1508744258:

   Disable RHWO by setting 0x7010[14] by default except during resolve
   pass.

Disable the RCC RHWO optimization at all times except when resolving
single sampled color surfaces.

v2: Move stalling to genX(cmd_buffer_apply_pipe_flushes) for clarity (Mark)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19450>
 2022-11-03 10:47:59 +00:00
Tapani Pälli
f9176d9b2c anv: remove some unused functions 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19368>
 2022-10-31 06:59:36 +00:00
Mykhailo Skorokhodov
a954933f4f drirc: Add fp64_workaround_enabled option 
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>
 2022-10-28 10:08:50 +00:00
Mykhailo Skorokhodov
8c4c4c3ee1 anv: Add softtp64 workaround 
Pass float64.glsl into nir_lower_doubles() resolves the problem on
ICL/TGL when the shader uses float64, but the device doesn't support
that type.

Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18854>
 2022-10-28 10:08:50 +00:00
Lionel Landwerlin
ed7d64962e intel/common: add detection of protected context support 
v2: Add anv bits
    Fix missing i915 extension chaining helper

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8092>
 2022-10-27 10:53:18 +00:00
Lionel Landwerlin
b49b18f0b7 anv: reduce BT emissions & surface state writes with push descriptors 
Zink on Anv running Gfxbench gl_driver2 is significantly slower than
Iris.

The reason is simple, whereas Iris implements uniform updates using
push constants and only has to emit 3DSTATE_CONSTANT_* packets, Zink
uses push descriptors with a uniform buffer, which on our
implementation use both push constants & binding tables.

Anv ends up doing the following for each uniform update :
   - allocate 2 surface states :
      - one for the uniform buffer as the offset specify by zink
      - one for the descriptor set buffer
   - pack the 2 RENDER_SURFACE_STATE
   - re-emit binding tables
   - re-emit push constants

Of all of those operations, only the last one ends up being useful in
this benchmark because all the uniforms have been promoted to push
constants.

This change defers the 3 first operations at draw time and executes
them only if the pipeline needs them.

Vkoverhead before / after :
  descriptor_template_1ubo_push:                      40670 / 85786
  descriptor_template_12ubo_push:                      4050 / 13820
  descriptor_template_1combined_sampler_push,         34410 / 34043
  descriptor_template_16combined_sampler_push,         2746 / 2711
  descriptor_template_1sampled_image_push,            34765 / 34089
  descriptor_template_16sampled_image_push,            2794 / 2649
  descriptor_template_1texelbuffer_push,             108537 / 111342
  descriptor_template_16texelbuffer_push,             20619 / 20166
  descriptor_template_1ssbo_push,                     41506 / 85976
  descriptor_template_8ssbo_push,                      6036 / 18703
  descriptor_template_1image_push,                    88932 / 89610
  descriptor_template_16image_push,                   20937 / 20959
  descriptor_template_1imagebuffer_push,             108407 / 113240
  descriptor_template_16imagebuffer_push,             32661 / 34651

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
 2022-10-14 23:03:16 +00:00
Lionel Landwerlin
ff91c5ca42 anv: add analysis for push descriptor uses and store it in shader cache 
We'll use this information to avoid :
   - binding table emission
   - allocation of surface states

v2: Fix anv_nir_push_desc_ubo_fully_promoted()

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
 2022-10-14 23:03:16 +00:00
Lionel Landwerlin
8616f11a39 anv: track descriptor set layout flags 
To identify push descriptors.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
 2022-10-14 23:03:16 +00:00
Lionel Landwerlin
06d955ab21 anv: remove multiple push descriptors 
VUID-VkPipelineLayoutCreateInfo-pSetLayouts-00293

   pSetLayouts must not contain more than one descriptor set layout
   that was created with
   VK_DESCRIPTOR_SET_LAYOUT_CREATE_PUSH_DESCRIPTOR_BIT_KHR set

There is only one push descriptor set with all the descriptor sets, so
no need to have an array.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
 2022-10-14 23:03:16 +00:00
Lionel Landwerlin
803f438d85 anv: optimize 3DSTATE_VF emission 
We can avoid reemitting this when the index buffer index type doesn't
change.

Also we don't need to update this when the pipeline changes as we do
not pull any value from the pipeline. Instead rely on the dynamic
state to tell if dyn->ia.primitive_restart_enable changed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
 2022-10-14 23:03:16 +00:00
Tapani Pälli
8e0377dcf3 anv: dynamic color blend equation 
This affects following packets:

  BLEND_STATE_ENTRY
  3DSTATE_PS_BLEND

v2: move vk_to_intel_blend and vk_to_intel_blend_op,
    remove ps_blend merge (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
 2022-10-11 16:29:05 +00:00
Tapani Pälli
fc3fd7c69e anv: dynamic color write mask 
This affects following packets:

  3DSTATE_BLEND_STATE_POINTERS

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
 2022-10-11 16:29:05 +00:00
Tapani Pälli
0b75376e4d anv: dynamic provoking vertex mode 
This affects following packets:

  3DSTATE_CLIP
  3DSTATE_SF
  3DSTATE_STREAMOUT

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
 2022-10-11 16:29:05 +00:00
Tapani Pälli
1a8209218e anv: dynamic states for depth clip and clamp 
This change implements 3 states in one go:

  - depth clamp enable
  - depth clip enable
  - depth clip negative one to one

This affects following packets:

  3DSTATE_CLIP
  3DSTATE_VIEWPORT_STATE_POINTERS_CC
  3DSTATE_RASTER

v2: remove clip enable bit check from viewport emit (Lionel)
v3: use helper function from runtime to get depth clip (Lionel)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
 2022-10-11 16:29:04 +00:00
Tapani Pälli
ad2e80ee53 anv: dynamic line rasterization mode 
This affects following packets:

  3DSTATE_RASTER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
 2022-10-11 16:29:04 +00:00
Tapani Pälli
cc0ada2d67 anv: dynamic state for polygon mode 
Remove 'polygon_mode' from pipeline and read it from
dynamic state instead.

This affects following packets:

  3DSTATE_CLIP
  3DSTATE_RASTER

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18879>
 2022-10-11 16:29:04 +00:00
José Roberto de Souza
bc384e24f0 anv: Use Vulkan types for priority as much as possible 
Continuing the work to split i915_drm.h specific code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
 2022-10-04 18:35:50 +00:00
José Roberto de Souza
03b959286e intel: Make engine related functions and types not i915 dependent 
There is too much i915_drm.h code spread, this patch start to fix that
by re-organizing engine related code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18942>
 2022-10-04 18:35:50 +00:00
José Roberto de Souza
1e87834980 intel: Share code to read render timestamp 
Timestamp read is not in any hot path so there is no down-sides in
share the same function between iris, crocus, anv and hasvk.

Also while at it also dropping the functions to read MMIO from kernel,
the only use is read render timestamp so we don't need it.

v2:
- fix compilaton of ds

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18920>
 2022-10-03 06:26:50 -07:00
Mark Janes
5c62ad34b6 anv: Use WC mapped local memory for block pool BO 
Improve DG1 performance:

  Fallout: +7%
  Talos:  +15%

v2: Don't drop SNOOP (Lionel)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18841>
 2022-09-28 09:51:31 +00:00
Mark Janes
755b413ffa anv: Track BOs that need a write-combined mapping 
v2: simplify logic a bit (Lionel)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18841>
 2022-09-28 09:51:31 +00:00
Lionel Landwerlin
044cf4e75d anv: bump client visible address heap to 32GiB 
Some raytracing tests are allocating lots of buffer and because of our
2Mb alignment restriction on local memory, we're running our of VMA...

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Zhang, Jianxun <jianxun.zhang@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:37 +00:00
Lionel Landwerlin
5ad803840d anv: setup scratch space correctly for RT shaders 
Things are a bit confusing because we use the term "scratch" for 2
different things :
  * the buffer for register allocation spilling
  * the buffer for storing live values between splitted shaders around shader calls

Here we're fixing the missing register allocation spilling buffer.

v2: update comments (Caio)
    fix scratch bo size computation with pipeline libraries (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:37 +00:00
Jason Ekstrand
f3ddfd81b4 anv: Build BVHs on the GPU with GRL 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:37 +00:00
Lionel Landwerlin
49976b23e9 anv: add new command buffer space allocation 
To be used for acceleration structure building.

v2: fix missing u_vector_finish
    Free all BOs

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:37 +00:00
Jason Ekstrand
6c76ceb613 anv: Add support for OpenCL-style kernel dispatch 
v2: Use brw_cs_get_dispatch_info() (Lionel)
    Merge barrier fixes (Lionel)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:37 +00:00
Jason Ekstrand
eb249f125d anv: Add support for compiling OpenCL-style kernels 
v2: remove unused definitions

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:37 +00:00
Jason Ekstrand
6ad1a5b57a anv: Add extern "C" guards 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:37 +00:00
Jason Ekstrand
5814436159 anv: Set up the memory-backed FIFO buffer 
v2: Fix incorrect goto (Caio)
    Comment 3DSTATE_BTD programming (Caio)

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:36 +00:00
Jason Ekstrand
4388b8b253 anv: Add an anv_address_map helper 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:36 +00:00
Lionel Landwerlin
0926ac42cb anv: remove HDC flush from invalidate bits 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: a49b145e8d ("anv: Replace DC Flush with HDC Pipeline Flush")
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16970>
 2022-09-28 05:38:36 +00:00
José Roberto de Souza
7d399a2e78 anv: Nuke cmd_parser_version 
This was only necessary for gen7 platforms that no longer support by
anv.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18601>
 2022-09-20 22:29:44 +00:00
Illia Polishchuk
74658b01d2 driconf/Intel: Add lower_depth_range_rate option workaround for Homerun Clash misrendering issue 
Intel has different Z interpolation float point rounding
than other mesa gpus
For example gl_Position.z = 0.0 will be interpolated to
gl_FragCoord.z = 0.5 for all gpus

gl_FragCoord = -0.00000001 will be interpolated to
gl_FragCoord.z = 0.4999999702 for Intel
and rounded to gl_FragCoord.z = 0.5 for other gpus

Games with LEQUAL depth func will fail depth test on Intel
and will pass it on other gpus in such case

This workaround lowers translated depth range
and several gl_FragCoord.z coords with extra small difference
will be translated to the same UINT16\UINT24\UINT32
value of an integer depth buffer

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7199

Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18412>
 2022-09-19 10:08:48 +00:00
Jason Ekstrand
94f8222dde anv: Switch to the common descriptor update template struct 
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14780>
 2022-09-17 03:32:29 +00:00
Oleksii Bozhenko
f350b78b73 anv: Allow aliasing with modifiers for WSI images 
Ignore ALIAS_BIT when format comes from WSI because
we have the ability to bind the MEMORY_BINDING_PRIVATE
from the other WSI image.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7019

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18347>
 2022-09-12 10:44:38 +00:00
Lionel Landwerlin
492761ab8d anv: add a new NO_LOCAL_MEM allocation flag 
We found a perf regression with 9027c5df4c ("anv: remove the
LOCAL_MEM allocation bit") which seems to be that we over subscribe
local memory, leading i915 to swap things in/out too much.

This change avoid putting buffers in local memory if they are not
allocated from a DEVICE_LOCAL heap.

Maybe we can revisit this later if i915 is better able to deal with
more buffers in local memory.

v2: Remove implicit_css from anv_bo when not in lmem (Ivan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9027c5df4c ("anv: remove the LOCAL_MEM allocation bit")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7188
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18395>
 2022-09-06 18:24:00 +00:00
Kenneth Graunke
bc68e7b564 anv: Remove anv_batch_emit_reloc and just open-code it 
We don't need the relocation offsets anymore, and just want to pin the
BO, and combine the address into a uint64_t.  We can just open code
those two things; it's actually less code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:46 +00:00
Kenneth Graunke
479a999637 anv: Inline write_reloc into the only remaining caller 
This is writing an address and clflushing, but it's not really about
execbuf relocations.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:46 +00:00
Kenneth Graunke
fde5c903c0 anv: Delete has_bindless_images and has_bindless_samples flags 
These are always true now.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:46 +00:00
Kenneth Graunke
9cb57c9a7a anv: Delete has_a64_buffer_access flag 
It's always true.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:46 +00:00
Kenneth Graunke
c5f7e1f5b4 anv: Delete relocation support from batch submission 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:46 +00:00