OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
176,742 Commits 9 Branches 1 Tag
659b7eb2799bccfff817961518d0ff2ab9e65bca
Commit Graph

176742 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Mike Blumenkrantz
659b7eb279 r600: better tracking for vertex buffer emission 
Fixes: 76725452 (gallium: move vertex stride to CSO)

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24754>
 2023-08-18 18:58:08 +00:00
Mike Blumenkrantz
63267bcb94 r600: store the mask of buffers used by a vertex state 
Fixes: 76725452 (gallium: move vertex stride to CSO)

Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24754>
 2023-08-18 18:58:08 +00:00
David Rosca
f638ba4669 radeonsi/vcn: Fix leaking fences in decode 
Unref fence used in destroy.

Don't store the fence reference in picture->fence, instead
keep it in the driver. Because only the last fence will
now be valid, check the fence pointer in get_decoder_fence.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24677>
 2023-08-18 18:22:04 +00:00
Faith Ekstrand
1198816f50 nir: Use nir_shader_intrinsic_pass() a few places 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24760>
 2023-08-18 17:39:53 +00:00
Faith Ekstrand
831085afa3 nir: Fix metadata in nir_lower_is_helper_invocation 
It does not preserve everything.  It adds and removes instructions and
even adds a variable.

Fixes: f17b41ab4f ("nir: add lowering pass for helperInvocationEXT()")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24760>
 2023-08-18 17:39:53 +00:00
Alyssa Rosenzweig
d620d8d74f nir: Add nir_shader_intrinsics_pass 
Like instructions_pass but specialized to intrinsics. More ergnomic for this
extremely common case, and possibly a bit faster by avoiding the extra function
call on non-intrinsics.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24760>
 2023-08-18 17:39:53 +00:00
Konstantin Seurer
f6f302bbbc lavapipe: Advertise AMDX_shader_enqueue 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
ce4af69d7e lavapipe: Implement AMDX_shader_enqueue commands 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
ff6a133b72 lavapipe: Implement exec graph pipelines 
Just a collection of compute shaders that can enqueue each other.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
b817b597c7 lavapipe: Add lvp_pipeline_type 
A boolean is not enough to support exec graph pipelines.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
2489f7d84f spirv: Implement SPV_AMDX_shader_enqueue 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
289df72d10 spirv: Update headers and grammer JSON 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
ccc52ae887 nir: Add shader enqueue data structures and handling 
There are two new variable modes:
- nir_var_mem_node_payload
- nir_var_mem_node_payload_in

Also add a few more intrinsics and some shader info.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
2953c93cca vulkan Add enqueue entrypoint for CmdDispatchGraphAMDX 
The generyted one doesn't copy deep enough.

Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
083793a39d vulkan: Allow beta extensions for physical device properties 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
a7141a6f8a vulkan: Allow beta extensions for physical device features 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Konstantin Seurer
32ad8baa05 bin: Update spirv sources 
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24512>
 2023-08-18 16:57:22 +00:00
Julia Zhang
9557aa8822 radeonsi: modify algorithm of skipping holes of sparse bo 
Modify current algorithm of skipping holes of sparse bo to cover the
following using situations:
1. The whole sparse buffer is uncommitted.
2. More than one page that in the tail of sparse buffer are uncommitted.

Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24535>
 2023-08-18 15:42:20 +00:00
Flora Cui
e259f4050d radeonsi: limit CP DMA to skip holes in sparse bo 
CP DMA on gfx9 can't handle the hole in sparse buffer. The fix skip
sparse bo hole so that arb_sparse_buffer-buffer-data &&
arb_sparse_buffer-commit pass

Signed-off-by: Flora Cui <flora.cui@amd.com>
Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24535>
 2023-08-18 15:42:20 +00:00
Rohan Garg
8849e1e3a6 anv: emitting 3DSTATE_PRIMITIVE_REPLICATION is required on Gen12+ 
This change helps fix the following tests on future platforms:
  - func.multiview
  - dEQP-VK.fragment_shading_rate.renderpass2.monolithic.multiviewsrlayered.dynamic.attachment.noshaderrate.keep.replace.1x1.samples1.vs
  - anything else that uses multiview

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24746>
 2023-08-18 11:36:45 +00:00
Sviatoslav Peleshko
e62f2c48a0 dri: Use RGB internal formats for RGBX formats 
These formats do not contain alpha channel, so their internal formats
should reflect that.

Fixes: bf576772 ("dri_util: add driImageFormatToSizedInternalGLFormat function")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9429
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24580>
 2023-08-18 11:00:40 +00:00
David Heidelberg
61dd0ff97d ci/freedreno: another batch of Adreno 530 flakes 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24772>
 2023-08-18 12:20:06 +02:00
Samuel Pitoiset
b78ea2a38f radv: stop copying if VS or TES uses the InvocationID built-in 
It's only allowed in TCS or GS which means the src shader stage
value is always FALSE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24691>
 2023-08-18 09:31:23 +00:00
Samuel Pitoiset
d547c996ae radv: simplify declaring VS specific input SGPRs 
stage/previous_stage are actually useless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24691>
 2023-08-18 09:31:23 +00:00
Samuel Pitoiset
525143d01a radv: remove unused param from radv_pipeline_init_multisample_state() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24691>
 2023-08-18 09:31:23 +00:00
Samuel Pitoiset
1cf840fb3e radv: remove radv_cmd_buffer::cached_vertex_formats 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24770>
 2023-08-18 10:23:45 +02:00
Samuel Pitoiset
c136169062 radv: fix emitting TCS epilogs for GFX6-9 
The number of SGPRs need to be adjusted.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24747>
 2023-08-18 07:52:22 +00:00
Samuel Pitoiset
f9a9471caf radv: add missing comment about TCS_OFFCHIP_LAYOUT_LSHS_VERTEX_STRIDE 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24745>
 2023-08-18 07:11:26 +00:00
Samuel Pitoiset
c6a56e6b3d radv: reduce TCS_OFFCHIP_LAYOUT_NUM_PATCHES to 6-bits 
RADV clamps the number of tess patches to 40.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24745>
 2023-08-18 07:11:26 +00:00
Faith Ekstrand
20381eb522 nir: Drop nir_push_if_src() 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24765>
 2023-08-17 23:26:40 -05:00
Faith Ekstrand
96c0f8c580 nir: Drop nir_instr_rewrite_src() 
Replace all its remaining users with nir_src_rewrite().

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
b5d6b7c402 nir: Drop most uses if nir_instr_rewrite_src() 
Generated by the following semantic patch:

    @@
    expression I, S, D;
    @@

    -nir_instr_rewrite_src(I, S, nir_src_for_ssa(D));
    +nir_src_rewrite(S, D);

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
71ddaca2e2 nir: Drop nir_instr_rewrite_src_ssa() 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
de063a1481 nir: Drop most uses of nir_instr_rewrite_src_ssa() 
Generated with the following semantic patch:

    @@
    expression I, S, D;
    @@

    -nir_instr_rewrite_src_ssa(I, S, D);
    +nir_src_rewrite(S, D);

Acked-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
964c73e13e nir: Drop nir_if_rewrite_condition() 
Use nir_src_rewrite() instead.  In a couple of cases, we can even drop a
switch on whether or not it's an if source.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
267b4fb1b9 nir: Add and use a nir_instr_init_src() helper 
This helper exists for a very tiny set of use-cases but it's better to
have the helper live in nir.c than hand-roll it elsewhere.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
9c8cb69c15 nir: Add a nir_instr_clear_src() helper and use it 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:15 +00:00
Faith Ekstrand
7af0dcbdfc nir/opt_undef: Don't rewrite a bcsel to mov 
Technically, it's possible because bcsel has more sources than mov.
However, it's not worth the pain of trying to get it right.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00
Faith Ekstrand
53294de682 nir: Take a nir_def * in nir_phi_instr_add_src() 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00
Faith Ekstrand
298a3eebd8 nir: Take a nir_def * in nir_tex_instr_add_src() 
NIR bits were hand-typed.  Driver updates done through the following
semantic patch:

    @@
    expression T, ST, D;
    @@

    -nir_tex_instr_add_src(T, ST, nir_src_for_ssa(D));
    +nir_tex_instr_add_src(T, ST, D);

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24729>
 2023-08-18 01:00:14 +00:00
Christian Gmeiner
6d168b93bc ci/etnaviv: update ci expectation 
Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24751>
 2023-08-18 00:41:53 +00:00
Karol Herbst
3e0cd6dfb9 nv50: limit max code uploads to 0x8000 
I have no idea why a bigger size doesn't work, the hardware doesn't
complain, but it turns out that uploading big shaders still causes issues
with the old limit. *shrug*

Fixes: 7f63d2ebdb ("nv50: fix code uploads bigger than 0x10000 bytes")
Signed-off-by: Karol Herbst <git@karolherbst.de>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24758>
 2023-08-18 00:24:01 +00:00
Sagar Ghuge
26b2bdcfe0 iris,crocus: drop unnecessary DEBUG_NO_CCS/NO_HIZ checks 
Now isl_surf_supports_ccs helper handles DEBUG_NO_CCS check and
isl_surf_get_hiz_surf handles DEBUG_NO_HIZ, so we don't
need to check it everywhere.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24731>
 2023-08-17 23:49:34 +00:00
Sagar Ghuge
20db03d32f anv,hasvk: drop unnecessary DEBUG_NO_CCS/NO_HIZ checks 
Now isl_surf_supports_ccs helper handles DEBUG_NO_CCS check and
isl_surf_get_hiz_surf handles DEBUG_NO_HIZ, so we don't
need to check it everywhere.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24731>
 2023-08-17 23:49:34 +00:00
Sagar Ghuge
b3affef252 intel/isl: Enable INTEL_DEBUG=noccs/nohiz in ISL helpers 
Let's enable INTEL_DEBUG=noccs in isl_surf_supports_ccs helper and
INTEL_DEBUG=nohiz in isl_surf_get_hiz_surf helper.

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24731>
 2023-08-17 23:49:34 +00:00
Emma Anholt
4dfd306454 disk_cache: Disable the "List" test for RO disk cache. 
It uses a poll function that waits for a second hoping for another thread
to catch up, which is not a reliable way to do synchronization.  The test
has been spuriously failing merges on a regular basis recently.

This is issue #9222, which I'm leaving open until the author can fix the test.

Fixes: 3b69b67545 ("util/fossilize_db: add runtime RO foz db loading via FOZ_DBS_DYNAMIC_LIST")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24755>
 2023-08-17 22:52:23 +00:00
Igor Torrente
e595c367d5 zink: Fix one addicional case when running a compositor 
Covers the case where the `dri2_init_screen` calls
`pipe_loader_create_screen_vk` directly and not sets
the device major and minor.

Signed-off-by: Igor Torrente <igor.torrente@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24678>
 2023-08-17 20:47:34 +00:00
Kenneth Graunke
d7daf78f62 intel/compiler: Respect NIR_DEBUG_PRINT_INTERNAL for DEBUG_OPTIMIZER 
If the NIR_DEBUG_PRINT_INTERNAL flag is not set, don't print debugging
information for internal shaders in INTEL_DEBUG=optimizer dumps.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24684>
 2023-08-17 18:19:53 +00:00
Emma Anholt
8a8bde69a5 ci/turnip: Add a660 VK coverage. 
1/2 run pre-merge, and a half-hour full run for nightly.  Test status
looks very stable so far.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24737>
 2023-08-17 16:46:25 +00:00
Tapani Pälli
71a2d651c1 anv: refactor batch_set_preemption to use batch_emit_pipe_control 
This makes it easier to hook workarounds for this pipe control.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24690>
 2023-08-17 16:07:59 +00:00