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Author SHA1 Message Date
Alyssa Rosenzweig
5d3e2b5e9e panfrost: Fix blend constant fetch prototype 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Fixes: 93824b6451 ("panfrost: Move the blend logic out of the gallium driver")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig
c35194b945 panfrost: Fix is_opaque prototype 
Fixes: 93824b6451 ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig
a0592066b0 panfrost: Fix the reads_dest prototype 
Takes too much state, only pass what we need.

Fixes: 93824b6451 ("panfrost: Move the blend logic out of the gallium driver")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Alyssa Rosenzweig
1d62ec348a panfrost: Fix blending for unbacked MRT 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10869>
 2021-05-18 22:51:56 +00:00
Bas Nieuwenhuizen
c7904b5b9b aco: Implement bvh64_intersect_ray_amd intrinsic. 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10818>
 2021-05-18 23:02:25 +02:00
Bas Nieuwenhuizen
2d6a6469b8 nir: Add bvh64_intersect_ray_amd intrinsic. 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10818>
 2021-05-18 23:01:47 +02:00
Gert Wollny
5be00fe88a r600: Enable NIR debug flags also for Cayman 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:08 +02:00
Gert Wollny
ed595c1785 r600/sfn: legalize image access on Cayman 
This,  seems to avoid hardware resets with the
  ARB_shader_image_load_store-invalid
piglit.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
27f5157777 r600/sfn: Add lowering pass to legalize image access 
Make sure only existing images are accessed and that the accessed
coordinates are within the image.
The generated code is quite exponsive, because it encapsulates each
access to an image with two if statements, one to check whether the
image index actually exists (this will get optimized away if the
image selection is direct), and one if statement to check whether
the coordinates are in range. For that reason it will only be enabled
for Cayman were invalid access seems to raise more issues.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
ffc5be25ca r600/sfn: Fix cube query layer number for indirect access 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
6a15c7d9ad r600/sfn: read number of images from shader info 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
efdb888b29 r600/sfn: Fix Geometry shader for Cayman 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
80efb6369a r600/sfn: Fix Cayman SSBO write with more than one value 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
3b1f82c777 r600/sfn: Fix ssbo/image atomic swap for Cayman 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
9898bc2915 r600/sfn: Fix texture gather for Cayman 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
2d8b27507d r600/sfn: Use unified code path for index register load 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
e9be6be49b r600/sfn: Use unified index register code for samplers 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
07514ff2c8 r600/sfn: Fix Cayman trans ops 
v2: return from emit_sin_r600 on > Cayman (Kenn Glennard)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:16:07 +02:00
Gert Wollny
89672820b7 r600/sfn: count only distinct literals per instruction group 
This is to avoid useless instruction group splits.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:07:10 +02:00
Gert Wollny
aa055f78ba r600/sfn: Don't check the faction when searching for the input slot 
All loads from the same driver location are merged into one variable,
so there is no need to check the frachtion.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:07:10 +02:00
Gert Wollny
3b4b962c15 r600/sfn: Lower FS pos input w-transform in NIR 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:07:10 +02:00
Gert Wollny
ba8d19ab80 r600/sfn: force new CF if fetch through TC would be used in same clause 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:07:10 +02:00
Gert Wollny
91209206f2 r600/sfn: Use valid pixel mode for SSBO and Image result fetches 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:07:10 +02:00
Gert Wollny
129de7ee60 r600/sfn: Use valid pixel mode only in fragment shaders 
The doc says that it should only be set in the FS.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:07:10 +02:00
Gert Wollny
9bf5033941 r600: don't put INTERP_X and INTERP_Z into one instruction group 
Apparently this is not allowed and results in interpolation errors.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10608>
 2021-05-18 22:07:10 +02:00
Alyssa Rosenzweig
6bd33ce2dc panfrost: Reduce blitter pool size 
Blit shaders are small and the average app doesn't use many of them, so
try to pack in a single 4k BO. Saves 60k in a lot of simple apps.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
c900236569 panfrost: Pool texture views 
No need to stick these in separate BOs.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
f1e0efff8d panfrost: Pool shaders 
Now we can do so without leaking memory :-)

Likewise use a pan_pool for RSDs, to share the common path.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
93d5fbf23d panfrost: Add reference type for unowned pool 
This allows implementing the common pattern of allocating from an
unowned pool and immediately taking a reference.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
bd55b6a727 panfrost: Make pool slab size configurable 
Different pools have different expected sizes.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
ab859cfffe panfrost: Label pools 
Allows the allocated BOs to be labeled more intelligently.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
3fa1f93dac panfrost: Label all BOs in userspace 
Doesn't do any fancy cross-process labeling like @shadeslayer's patches
but helps with all your intra-process labeling needs.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
ecd0cf0b27 panfrost: Add unowned mode to pan_pool 
I would like to reuse pan_pool for persistent uploads (shaders and CSOs)
in Gallium. In theory u_upload_mgr is more appropriate, but pan_pool is
already a knockoff u_upload_mgr, so might as well finish the job.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
b131f96aa8 pan/mdg: Set lower_uniforms_to_ubo 
Rip off the band-aid. No other driver in Mesa has this combination, and
there's a reason for that. It confuses nir_to_tgsi; this commit fixes
GALLIUM_HUD (again) on Midgard.

shader-db stats aren't as bad as they appear at first blush, since the
added cycles are from added if-else branches (and only one side of the
if is taken on Midgard, which does no warping*).

total instructions in shared programs: 97036 -> 98107 (1.10%)
instructions in affected programs: 8297 -> 9368 (12.91%)
helped: 0
HURT: 45
HURT stats (abs)   min: 1 max: 52 x̄: 23.80 x̃: 25
HURT stats (rel)   min: 0.61% max: 61.90% x̄: 16.18% x̃: 14.66%
95% mean confidence interval for instructions value: 20.04 27.56
95% mean confidence interval for instructions %-change: 12.62% 19.74%
Instructions are HURT.

total bundles in shared programs: 45507 -> 46091 (1.28%)
bundles in affected programs: 3138 -> 3722 (18.61%)
helped: 2
HURT: 40
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.54% max: 2.17% x̄: 1.86% x̃: 1.86%
HURT stats (abs)   min: 2 max: 44 x̄: 14.65 x̃: 12
HURT stats (rel)   min: 2.70% max: 50.00% x̄: 23.03% x̃: 21.25%
95% mean confidence interval for bundles value: 10.35 17.46
95% mean confidence interval for bundles %-change: 16.81% 26.88%
Bundles are HURT.

total quadwords in shared programs: 76952 -> 77849 (1.17%)
quadwords in affected programs: 6556 -> 7453 (13.68%)
helped: 2
HURT: 44
helped stats (abs) min: 1 max: 5 x̄: 3.00 x̃: 3
helped stats (rel) min: 1.73% max: 4.55% x̄: 3.14% x̃: 3.14%
HURT stats (abs)   min: 2 max: 58 x̄: 20.52 x̃: 18
HURT stats (rel)   min: 2.11% max: 46.34% x̄: 17.20% x̃: 12.96%
95% mean confidence interval for quadwords value: 15.18 23.82
95% mean confidence interval for quadwords %-change: 12.68% 19.96%
Quadwords are HURT.

total registers in shared programs: 6966 -> 6925 (-0.59%)
registers in affected programs: 347 -> 306 (-11.82%)
helped: 26
HURT: 8
helped stats (abs) min: 1 max: 4 x̄: 2.04 x̃: 2
helped stats (rel) min: 6.67% max: 42.86% x̄: 20.92% x̃: 22.22%
HURT stats (abs)   min: 1 max: 5 x̄: 1.50 x̃: 1
HURT stats (rel)   min: 9.09% max: 50.00% x̄: 17.19% x̃: 11.81%
95% mean confidence interval for registers value: -1.85 -0.56
95% mean confidence interval for registers %-change: -18.97% -4.93%
Registers are helped.

total threads in shared programs: 5040 -> 5050 (0.20%)
threads in affected programs: 13 -> 23 (76.92%)
helped: 10
HURT: 1
helped stats (abs) min: 1 max: 2 x̄: 1.10 x̃: 1
helped stats (rel) min: 100.00% max: 100.00% x̄: 100.00% x̃: 100.00%
HURT stats (abs)   min: 1 max: 1 x̄: 1.00 x̃: 1
HURT stats (rel)   min: 50.00% max: 50.00% x̄: 50.00% x̃: 50.00%
95% mean confidence interval for threads value: 0.44 1.38
95% mean confidence interval for threads %-change: 55.98% 116.75%
Threads are helped.

Fixes: 24d7c413fe ("panfrost: Enable packed uniforms.")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
a89bc59980 pan/mdg: Fix spills to TLS 
LOCAL_STORAGE.zw is workgroup local memory, whereas LOCAL_STORAGE.xy is
thread local memory. Likewise PC_SP.zw is the stack pointer, which is
initialized to (LOCAL_STORAGE.zw + offset) but is modifiable by the
shader. Panfrost doesn't modify the s tack pointer, and the register
allocation logic assumes a zero offset, so let's always spill to thread
local memory = LOCAL_STORAGE.xy, as was intended by Italo's cleanup.

This is visible on any shader that spills. Compute shaders aren't
advertised yet, so WLS will be null, causing a fault like the following
(reproduced on Mali T860 with the glyphy trace):

[15634.148873] panfrost ff9a0000.gpu: Unhandled Page fault in AS0 at VA 0x0000000000000000
          Reason: TODO
          raw fault status: 0x70003C2
          decoded fault status: SLAVE FAULT
          exception type 0xC2: TRANSLATION_FAULT_LEVEL2
          access type 0x3: WRITE
          source id 0x700
[15634.658170] panfrost ff9a0000.gpu: gpu sched timeout, js=0, config=0x3300, status=0x8, head=0x31d4540,
tail=0x31d4540, sched_job=00000000e8101b2e

Fixes: 6a12ea02fe ("pan/mdg: properly encode/decode ldst instructions")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
8d2d711026 pan/mdg: Fix output types for scalar fields 
Already fixed vector, but scalar was missed.

Fixes: 4d9c0a32e7 ("pan/mdg: Use _output_ type for outmod printing")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Alyssa Rosenzweig
6f2ea57e1d pan/mdg: Remove unused midgard_int_alu_op_prefix 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10866>
 2021-05-18 19:19:01 +00:00
Bas Nieuwenhuizen
74d36c4f98 radv: Use correct border swizzle on GFX9+. 
We only need the format swizzle, not the full swizzle.

Fixes: 57e796a12a ("radv: Implement VK_EXT_custom_border_color")
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4020
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9731>
 2021-05-18 19:05:31 +00:00
Italo Nicola
32f710c09d virgl: implement EXT_multisampled_render_to_texture 
Signed-off-by: Italo Nicola <italonicola@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10500>
 2021-05-18 18:54:16 +00:00
Bas Nieuwenhuizen
07e0aab9d9 radv: Implement vkCmdTraceRays. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
 2021-05-18 18:29:36 +00:00
Bas Nieuwenhuizen
733c9b6d17 radv: Add RT pipeline bind. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
 2021-05-18 18:29:36 +00:00
Bas Nieuwenhuizen
eba2b4137e radv: Add support for RT bind point. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
 2021-05-18 18:29:36 +00:00
Bas Nieuwenhuizen
bf2b990618 radv: Use global BO list with raytracing. 
The shader binding tables in vkCmdTraceRays have no buffer reference.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
 2021-05-18 18:29:36 +00:00
Bas Nieuwenhuizen
bfe2802188 aco: Add load_sbt_amd intrinsic implementation. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
 2021-05-18 18:29:36 +00:00
Bas Nieuwenhuizen
197d9f008e radv: Add sbt descriptors user SGPR input. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
 2021-05-18 18:29:36 +00:00
Bas Nieuwenhuizen
aa82f91c38 nir: Add load_sbt_amd intrinsic. 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9767>
 2021-05-18 18:29:36 +00:00
Juan A. Suarez Romero
53ef2a7e69 ci/broadcom: update expected results 
Fix also some typos in the expected failed results.

Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10865>
 2021-05-18 15:52:57 +00:00
Antonio Caggiano
41039d8ee9 pps: Intel documentation 
Add documentation for the Intel Perfetto datasource.

Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10216>
 2021-05-18 14:28:48 +00:00
Antonio Caggiano
92180a4376 pps: Intel pps driver 
Add the Intel pps driver using functionalities provided by
libintel_perf.

v2: Fix build with perfetto not enabled.
v3: Open perf stream with no filtering.
v4: Drop usage of inc/dec_n_users.
v5: Isolate intel_perf in its own class.

Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10216>
 2021-05-18 14:28:48 +00:00
Lionel Landwerlin
5d95aa3964 intel/perf: allow metric sets to be loaded with on OA reports 
A bunch of performance counters rely on register snapshots on top of
the OA reports. Those are already conditional to the query mode in the
equations :

   availability="true $QueryMode &amp;&amp;"

This change allows to disable counters that are only available with
additional register snapshots. This will be useful if you only want to
OA reports to extract performance counter values.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10216>
 2021-05-18 14:28:48 +00:00