OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
184,201 Commits 9 Branches 1 Tag
5ae2b4882a030b2f19a32338705b03b0e348e5ff
Commit Graph

118 Commits

Author SHA1 Message Date
Tapani Pälli
5ae2b4882a blorp: implement Wa_16014912113 callback for drivers 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26920>
 2024-02-05 13:50:58 +00:00
Lionel Landwerlin
f92bff9198 intel/ds: track predication of blorp operations 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23523>
 2024-01-26 13:39:01 +00:00
Lionel Landwerlin
c76cb19b01 anv/blorp: move helper function about BTI changes to blorp 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26247>
 2023-11-17 10:17:51 +00:00
Lionel Landwerlin
ec3f8c0d42 intel/blorp: move Wa_18019816803 out of blorp code 
The driver already need to track this WA for blorp. We can completely
remove any blorp code dealing with this and instead have the flush
required by the workaround be combined with potential other flushes
the driver already has to insert before blorp operations.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26247>
 2023-11-17 10:17:51 +00:00
Lionel Landwerlin
9689607f10 anv: fix dirty state tracking for 3DSTATE_PUSH_CONSTANT_ALLOC 
ANV_CMD_DIRTY_PIPELINE also includes reprogramming of
3DSTATE_PUSH_CONSTANT_ALLOC_* instructions.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 50f6903bd9 ("anv: add new low level emission & dirty state tracking")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26247>
 2023-11-17 10:17:51 +00:00
Lionel Landwerlin
1257d08bcb anv: fix CC_VIEWPORT pointer dirty after blorp/simple-shaders 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 50f6903bd9 ("anv: add new low level emission & dirty state tracking")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26247>
 2023-11-17 10:17:51 +00:00
Rohan Garg
a77ea9555a blorp: WA 16014538804 for DG2, MTL A0 
Send empty/dummy PIPE_CONTROL after every third 3DPRIMITIVE command.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25039>
 2023-11-08 11:00:55 +00:00
Rohan Garg
1b03acb26b blorp,anv,iris: refactor blorp functions into something more generic 
Refactor some of the blorp code into something more generic that we can
reuse for functionality needed post 3DPRIMITIVE emission.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25039>
 2023-11-08 11:00:54 +00:00
Lionel Landwerlin
e64a97694a anv: use anv_state_pool_state_address for blorp vertex buffer address 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
Lionel Landwerlin
b30428416a anv: deal with state stream allocation failures 
In case we run out of space, all the parts of the driver that rely on
this should deal with failure. The helpers will set the batch in error
state so that it cannot be submitted by the application.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
Lionel Landwerlin
f9753488ec blorp: handle binding table & surface state allocation failures 
The embedding driver could be failing the allocation for whatever
reason, in which case we should skip the surface state writes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
José Roberto de Souza
07eede0970 intel: Prepare implementation of Wa_18019816803 and Wa_16013994831 for future platforms 
Those workarounds are temporary for newer platforms so we can't use
INTEL_NEEDS_WA_*, luckly those already had runtime checks.
INTEL_NEEDS_WA_* was only used because it was accessing instructions
or fields of the instructions that only exists in gfx12 or gfx125.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25685>
 2023-10-13 03:54:50 +00:00
Kenneth Graunke
17b8b2cffd anv: Add support for a transfer queue on Alchemist 
Alchemist has an improved blitter that's sufficiently powerful to
implement a transfer queue. Tigerlake's blitter lacks compression
handling and other features we need, unfortunately.

Rework (Sagar):
- Check blitter command buffer in EndCommandBuffer

v2: (Lionel)
- Look at image, buffer and memory barriers as well
- Flush cache if there is queue ownership transfer

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18325>
 2023-10-03 18:02:52 +00:00
Lionel Landwerlin
50f6903bd9 anv: add new low level emission & dirty state tracking 
A single Vulkan state can map to multiple fields in different GPU
instructions. This change introduces the bottom half of a simplified
emission mechanism where we do the following :
          Vulkan runtime state
                   |
                   V
        Intermediate driver state
                   |
                   V
         Instruction programming

This way we can detect that the intermediate state didn't change and
avoid HW instruction emission.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
 2023-09-06 20:07:02 +00:00
Tapani Pälli
92941ee84b anv: implement required PSS sync for Wa_18019816803 
According to WA description, we need to track DS write state
and emit a PSS_STALL_SYNC whenever that state changes.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18411>
 2023-08-11 07:15:48 +00:00
Sagar Ghuge
f575d4bc6f blorp: Implement blorp hooks to emit breakpoint 
Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24308>
 2023-08-08 17:36:19 +00:00
José Roberto de Souza
d9d284d050 anv: Remove VkAllocationCallbacks parameter from reloc functions 
Mismatch allocator could cause bad things, so better set the allocator
on anv_reloc_list_init() and use it in every reloc function.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24411>
 2023-08-01 22:30:04 +00:00
Lionel Landwerlin
b3f6e5dc70 anv: remove incorrect ifdef 
This is a leftover from a previous fix attempt. We don't need this.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:37 +00:00
Emma Anholt
d246948ce3 anv: Skip BTI RT flush if we're doing an op that doesn't use render targets. 
rt_flushes emitted on zink sauer.trace --loop=500 -2.02118% +/- 1.15992% (n=8).

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21508>
 2023-02-27 21:44:56 +00:00
Tapani Pälli
97f2b60833 anv: implement Wa_14015814527 for task shaders 
After using task shader, we need to emit a zero URB state and a
nullprim (empty pipe control) before rendering with primitives.

After this, a normal URB state needs to be returned, this will
happen when pipeline batch is emitted during pipeline switch.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20334>
 2023-01-03 12:44:08 +00:00
Tapani Pälli
b9aa66d5d0 anv: disable preemption for 3DPRIMITIVE during streamout 
This is required by Wa_16013994831.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20438>
 2022-12-27 15:53:42 +00:00
Lionel Landwerlin
9bb055ff5d anv: generate correct addresses for state pool offsets 
Fixes a number of CTS patterns on DG2 :

   - dEQP-VK.dynamic_rendering.primary_cmd_buff.random*
   - dEQP-VK.draw.*secondary_cmd*
   - dEQP-VK.dynamic_rendering.*secondary_cmd*
   - dEQP-VK.geometry.*secondary_cmd_buffer
   - dEQP-VK.multiview.*secondary_cmd*

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 9c1c1888d9 ("intel/fs: put scratch surface in the surface state heap")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19946>
 2022-11-23 14:37:19 +00:00
Lionel Landwerlin
9c1c1888d9 intel/fs: put scratch surface in the surface state heap 
In 4ceaed7839 we made scratch surface state allocations part of the
internal heap (mapped to STATE_BASE_ADDRESS::SurfaceStateBaseAddress)
so that it doesn't uses slots in the application's expected 1M
descriptors (especially with vkd3d-proton).

But all our compiler code relies on BSS
(STATE_BASE_ADDRESS::BindlessSurfaceStateBaseAddress).

The additional issue is that there is only 26bits of surface offset
available in CS instruction (CFE_STATE, 3DSTATE_VS, etc...) for
scratch surfaces. So we need the drivers to put the scratch surfaces
in the first chunk of STATE_BASE_ADDRESS::SurfaceStateBaseAddress
(hence all the driver changes).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4ceaed7839 ("anv: split internal surface states from descriptors")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7687
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19727>
 2022-11-19 14:58:58 +00:00
Lionel Landwerlin
4ceaed7839 anv: split internal surface states from descriptors 
On Intel HW we use the same mechanism for internal operations surfaces
as well as application surfaces (VkDescriptor).

This change splits the surface pool in 2, one part dedicated to
internal allocations, the other to application VkDescriptors.

To do so, the STATE_BASE_ADDRESS::SurfaceStateBaseAddress points to a
4Gb area, with the following layout :
   - 1Gb of binding table pool
   - 2Gb of internal surface states
   - 1Gb of bindless surface states

That way any entry from the binding table can refer to both internal &
bindless surface states but none of the driver allocations interfere
with the allocation of the application.

Based off a change from Sviatoslav Peleshko.

v2: Allocate image view null surface state from bindless heap (Sviatoslav)
    Removed debug stuff (Sviatoslav)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7110
Cc: mesa-stable
Tested-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19275>
 2022-11-11 10:13:27 +00:00
Lionel Landwerlin
54bc34f70a anv: comment out the Gfx8/9 VB cache key workaround for newer Gens 
This code shows up a little on profiling on Gfx12 and since it's only
a gfx8/9 workaround we might as well ifdef it out.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19050>
 2022-10-14 23:03:16 +00:00
Lionel Landwerlin
d53682e1a9 intel/utrace: make blorp tracepoints more readable 
With the operation name and some formats.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>
 2022-09-21 12:38:34 +00:00
Lionel Landwerlin
eac5e938c0 blorp: defined operations for debug purposes 
We add a mapping for blorp_op -> intel_snapshot

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>
 2022-09-21 12:38:34 +00:00
Kenneth Graunke
bc68e7b564 anv: Remove anv_batch_emit_reloc and just open-code it 
We don't need the relocation offsets anymore, and just want to pin the
BO, and combine the address into a uint64_t.  We can just open code
those two things; it's actually less code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:46 +00:00
Kenneth Graunke
4b5c29bad0 anv: Delete softpin checks 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:46 +00:00
Kenneth Graunke
3daeb22735 anv: Drop checks for version 8 or 9 
anv no longer supports versions below this.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:46 +00:00
Lionel Landwerlin
a659819f79 anv: remove unused gfx7 code 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Jason Ekstrand <jason.ekstrand@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18208>
 2022-09-02 09:40:46 +00:00
José Roberto de Souza
356a60bd6c anv: Do not duplicate intel_device_info memory in each logical device 
Each logical device can point to its physical device intel_device_info
saving at least one intel_device_info.

This also allow us to set 'const' to avoid values in intel_device_info
being changed by mistake.

Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17897>
 2022-08-19 16:29:58 +00:00
Jason Ekstrand
7d25c04236 anv: Switch to using common dynamic state tracking 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17564>
 2022-07-19 23:16:45 +00:00
Sviatoslav Peleshko
3f6edbc725 intel/blorp: Dirty depth bounds dynamic state bits after blorp 
Blorp emits its own 3DSTATE_DEPTH_BOUNDS, so we'll have to re-emit the
expected state after that.

Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Fixes: 56ef501e3a ("blorp: disable depth bounds")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17205>
 2022-06-27 11:11:30 +00:00
Marcin Ślusarz
f4386b81e6 intel: fix typos found by codespell 
Acked-by: David Heidelberg <david.heidelberg@collabora.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17191>
 2022-06-27 10:20:55 +00:00
Lionel Landwerlin
1c077ca9c0 u_trace/anv/iris: drop cs argument for recording traces 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16605>
 2022-05-19 19:04:28 +00:00
Jason Ekstrand
a83c91a261 blorp: Add a binding_table_offset_to_pointer helper 
On Gen11+, we have a feature that requires us to shift binding table
offsets by 3.  This adds a helper which gives the driver a hook to do
this if it so chooses.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14507>
 2022-03-09 09:18:59 +00:00
Jason Ekstrand
5a15c3eff7 anv: Drop anv_cmd_buffer::pool 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
 2022-02-11 08:06:25 +00:00
Jason Ekstrand
c5b8ee8810 anv: Use vk_command_pool 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
 2022-02-11 08:06:24 +00:00
Lionel Landwerlin
e760c5b37b anv: add perfetto source 
v2: Increase custom stall data (Felix)
    Fixup build (Felix)

v3: Add API enum (Rohan)
    Fixup old comment (Rohan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin
cc5843a573 anv: implement u_trace support 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Lionel Landwerlin
bb541d1159 intel/blorp: add measure_end entry point 
Will be useful to figure out when blorp operations end.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Caio Oliveira
87e2d2249d anv/blorp: Apply pending pipe flushes after PIPELINE_SELECT 
Allows the PIPELINE_SELECT change to consume any outstanding flushes.
In case it doesn't, we still apply the pipe flushses afterwards.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14301>
 2022-01-07 03:14:55 +00:00
Caio Oliveira
37fca614b8 anv/blorp: Split blorp_exec into a render and compute 
And set the relevant push_constants_dirty for each case.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14275>
 2021-12-21 11:07:31 +00:00
Felix DeGrood
5bf6987873 anv: dirty only state impacted by blorp_exec 
Instead of dirtying all state after blorp operations,
avoid dirtying state that blorp never touches.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5077
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12567>
 2021-10-13 04:31:34 +00:00
Jordan Justen
15a6018d06 anv/blorp: Select pipeline based on BLORP_BATCH_USE_COMPUTE 
Reworks:
 * Let blorp_clear handle DEBUG_BLOCS
 * Old subject was: "Use compute blorp for vkCmdFillBuffer with
   INTEL_DEBUG=blocs"
 * Old subject was: "anv/blorp: Support params.cs_prog_data being set"

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
 2021-09-30 17:41:33 +00:00
Jordan Justen
7599533658 anv/blorp: Make sure blorp type is supported by the queue 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
 2021-09-30 17:41:33 +00:00
Jordan Justen
a4c9c242ed blorp: Add blorp_alloc_general_state 
Reworks:
 * Add crocus

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11564>
 2021-09-30 17:41:33 +00:00
Nanley Chery
2ae70329f5 intel: Move the D16 workarounds out of ISL 
Implement the workarounds in anv and iris instead.

Before this commit, ISL unconditionally modified workaround registers
while filling out depth stencil state. To account for this, drivers
unconditionally stalled prior to emitting depth stencil packets. This
hurt performance.

By having the drivers perform the workarounds, they can choose when to
modify the relevant registers. The drivers now avoid emitting the
workaround for NULL depth buffers. This reduces stalls and leads to
better performance.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> (the ISL/Anv bits)
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (the Iris bits)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11454>
 2021-08-20 17:50:35 +00:00
Felix DeGrood
fc5cb54008 anv: Add debug messages for DEBUG_PIPE_CONTROL 
Enable with INTEL_DEBUG=pc.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9834>
 2021-06-15 12:57:42 +00:00