Commit Graph

55942 Commits

Author SHA1 Message Date
Ian Romanick
58d93e3247 glsl: Don't early-out for error-type inputs
Check the type of the array operand and the index operand before doing
other checks.  This simplifies the code a bit now (eliminating the
error_emitted parameter), and enables some later functional changes.

The shader

uniform float x[6];
uniform sampler2D s;
void main() { gl_Position.x = xx[s + 1]; }

still generates (only) the two expected errors:

0:3(33): error: `xx' undeclared
0:3(39): error: Operands to arithmetic operators must be numeric

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 15:17:05 -07:00
Ian Romanick
a131b87706 glsl: Don't emit spurious errors for constant indexes of the wrong type
Previously the shader

uniform float x[6];
void main() { gl_Position.x = x[1.0]; }

would have generated the errors

0:2(33): error: array index must be integer type
0:2(36): error: array index must be < 6

Now only

0:2(33): error: array index must be integer type

will be generated.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 15:17:05 -07:00
Ian Romanick
a70d2f05dc glsl: Collect all of the non-constant index error checks together
This puts all of the checks togeher for easier reading.  It also means
that all the checks are blocked on array->type->is_array.  Shortly this
will allow elimination of some is_error check work-arounds in this
function.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 15:17:05 -07:00
Ian Romanick
f9d8ca2817 glsl: Minor code compaction in _mesa_ast_array_index_to_hir
Also, document the reason for not checking for type->is_array in some of
the bound-checking cases.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 15:17:05 -07:00
Ian Romanick
2c333a878c glsl: Don't return a value from check_builtin_array_max_size
That last consumer of the return value was changed to not use it by the
previous commit.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 15:17:05 -07:00
Ian Romanick
666fafc144 glsl: Remove some unnecessary uses of error_emitted
The error_emitted flag is used in semantic checking to prevent spurious
cascading errors.  For example,

void foo(sampler2D s, float a)
{
    float x = a + (1.2 + s);

    ...
}

should only generate a single error.  Without the error_emitted flag for
the first error, "a + ..." would also generate an error.

However, a bunch of cases in _mesa_ast_array_index_to_hir that were
setting error_emitted would mask legitimate errors.  For example,

    vec4 a[7];
    float b = a[3.14];

should generate two error (float index and type mismatch in assignment).
The uses of error_emitted would cause only the first to be emitted.

This patch removes most of the places in _mesa_ast_array_index_to_hir
that would set the error_emitted flag.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 15:17:05 -07:00
Ian Romanick
46934adb8d glsl: Refactor handling of ast_array_index to a separate function
I love 800+ line switch-statements as much as the next guy... Future
commits will make changes to this part of the AST-to-HIR conversion, and
extracting this code will make that a bit easier.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 15:17:05 -07:00
Ian Romanick
cd39ae7394 glsl: Make check_build_array_max_size externally visible
A future commit will try to use this function in a different file.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 15:17:05 -07:00
Eric Anholt
ca9a7d975a intel: Avoid making tiled miptrees we won't be able to blit.
Doing so was breaking miptree mapping, which we really need to be able to
handle.  With this change, intel_miptree_map_direct() falls through to
doing a CPU mapping on the buffer like we need.

With the previous 2 patches, all of these should be fixed:
piglit max-texture-size (all 3 patches required!)
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=37871
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44958
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=53494

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 11:49:33 -07:00
Eric Anholt
dfed115090 intel: Do temporary CPU maps of textures that are too big to GTT map.
This still fails, since 8192*4bpp == 32768, which is too big to use the
blitter on.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2013-04-08 11:49:25 -07:00
Eric Anholt
b3a3cb9611 intel: Add support for writing to our linear-temporary-CPU-map case.
This will be used for handling updates of large textures.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Chad Versace <chad.versace@linux.intel.com>.
2013-04-08 11:49:20 -07:00
Kenneth Graunke
97e40a524e intel: Remove check for kernel 2.6.29.
Now that we require 2.6.39, there's no need to also check for 2.6.29.
Calling drm_intel_bufmgr_gem_enable_fenced_relocs() without checking
should be safe, as it simply sets a flag.

This does remove the check for zero fences available, but that doesn't
seem worth checking.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-08 11:03:08 -07:00
Kenneth Graunke
394edb5af5 intel: Require kernel 2.6.39 for relaxed relocation support.
Chris Wilson's relaxed relocation patch landed in March 2011.  Anyone
running pre-3.0 kernels probably isn't going to get the latest Mesa
anyway.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-08 11:03:08 -07:00
Kenneth Graunke
d7fd5696e6 i965: Remove a few BRW_STATE_... enum values.
These were likely used for BRW_NEW_... dirty bit flags at one point, but
they're unused now.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-08 11:03:08 -07:00
Kenneth Graunke
79c27e7528 i965: Remove brw->vb.info and struct brw_vertex_info.
Nobody uses this value, so there's no need to set it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-08 11:03:08 -07:00
Kenneth Graunke
b29dc25572 i965: Remove the BRW_NEW_INPUT_DIMENSIONS flag.
When I removed the proj_attrib_mask optimization, I also removed the
last consumer of this bit without realizing it.

Since nobody uses it, there's no point in flagging it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-08 11:03:08 -07:00
Matt Turner
2e177bc8a5 register_allocate: Fix the type of best_benefit.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2013-04-08 10:30:40 -07:00
Tom Stellard
a5a76782d5 radeon/llvm: Bump minimum LLVM version to 3.3 2013-04-08 07:43:34 -07:00
Niels Ole Salscheider
b336f51cc7 clover: Fix linkage of libOpenCL
Clover needs the irreader component of llvm

v2: Check for irreader component
irreader is only available with LLVM 3.3 >= 177971

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
2013-04-08 07:08:10 -07:00
Vincent Lejeune
5019af2145 r600g/llvm: Add support for native isa for pre EG
This fixes bug 62756 :
https://bugs.freedesktop.org/show_bug.cgi?id=62756#c12
2013-04-08 15:11:59 +02:00
Marek Olšák
eff66bc9f8 gallium/util: add const to a parameter of util_max_layer 2013-04-06 23:57:15 +02:00
Marek Olšák
08275b25cc st/mesa: don't expose ARB_color_buffer_float without driver support in GL core
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-04-06 23:57:12 +02:00
Marek Olšák
3264c3e997 mesa: allow drivers not to expose ARB_color_buffer_float in GL core profile
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-04-06 23:57:10 +02:00
Marek Olšák
9d4f67600b mesa: move updating clamp control derived state out of mesa_update_state_locked
It has 2 dependencies: glClampColor and the framebuffer, we might just as well
do the update where those two are changed.

v2: cosmetic changes from Brian's email

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-04-06 23:57:09 +02:00
Marek Olšák
755648c37f mesa: don't set _ClampFragmentColor to TRUE if it has no effect
This should reduce shader recompilations with drivers that emulate fragment
color clamping, because we want the clamping to be enabled only if there is
a signed normalized or floating-point colorbuffer.

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-04-06 23:57:06 +02:00
Marek Olšák
21d407c1b8 mesa: refactor clamping controls, get rid of _ClampReadColor
v2: cosmetic changes from Brian's email

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-04-06 23:57:04 +02:00
Chris Forbes
c4629ad3f9 mesa: don't memcmp() off the end of a cache key.
Reported-by: `per` in #intel-gfx

The size of the cache key varies, so store the actual size as well as
the key blob itself, rather than just assuming it's the same as the size
passed in.

NOTE: This is a candidate for stable branches.

V2: Don't leave silly holes in structure; use unsigned instead of GLuint.
V3: Fix missing case for `last` match.

Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-04-06 18:30:08 +13:00
Tom Stellard
302f53dc20 radeonsi: Add compute support v3
v2:
  - Only dump shaders when env variable is set.

v3:
  - Don't emit VGT registers

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com
2013-04-05 18:43:34 -04:00
Tom Stellard
4f7fe2cf2c radeonsi: Set TCL1_ACTION_ENA when invalidating the texture cache
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com
2013-04-05 18:43:34 -04:00
Tom Stellard
0ccf82c557 radeonsi: Remove si_pm4_inval_vertex_cache()
This function is a holdover from r600g and is identical to
si_pm4_inval_texture_cache(), so it is not needed.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com
2013-04-05 18:43:34 -04:00
Tom Stellard
c5e5b3401c gallium: PIPE_COMPUTE_CAP_IR_TARGET - allow drivers to specify a processor v2
This target string now contains four values instead of three.  The old
processor field (which was really being interpreted as arch) has been split
into two fields: processor and arch.  This allows drivers to pass a
more a more detailed description of the hardware to compiler frontends.

v2:
  - Adapt to libclc changes

Reviewed-by: Francisco Jerez <currojerez@riseup.net>
2013-04-05 18:43:34 -04:00
Wladimir
1a868acbec util: add ETC as compressed format
Add UTIL_FORMAT_LAYOUT_ETC to util_format_is_compressed. It was missing.

Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2013-04-05 16:14:51 -06:00
Brian Paul
de99b6d117 gallium/u_blitter: fix is_blit_generic_supported() stencil checking
Don't check if there's sampler support for stencil if we're not
going to actually blit/copy stencil values.  Fixes the case where
we mistakenly said we can't support a blit of depth values from
S8Z24 to X8Z24.

Also, rename the is_stencil variable to dst_has_stencil to improve
readability.

NOTE: This is a candidate for the stable branches.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
2013-04-05 16:14:51 -06:00
Alexander Monakov
9cda356004 Honor GLX_DONT_CARE in MATCH_MASK
NOTE: This is a candidate for stable branches.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=47478
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=62999
Bugzilla: http://bugs.winehq.org/show_bug.cgi?id=26763
2013-04-05 14:32:45 -07:00
Rob Clark
aac7f06ad8 freedreno: use autogenerated register defs
Switch to use the envytools generated headers for register/bitfield
definitions.  This is the first step in preparing to add a3xx support,
since it avoids having conflicting names for a3xx and a2xx registers.
And since I'm using envytools for a3xx it is simpler to just use it for
everything.

This shouldn't cause any functional change, it is really just a lot of
renaming.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2013-04-05 14:33:16 -04:00
José Fonseca
1fefc65d20 st/wgl: Install our windows message hook to threads created before the ICD is loaded.
Otherwise we will not receive destroy windows events, causing framebuffers
to leak.

This happens particularly with java and jogl.

Tested with java + jogl, MATLAB.

VMware Internal Bug Number: 1013086.

Reviewed-by: Brian Paul <brianp@vmware.com>
2013-04-05 18:27:54 +01:00
Adam Jackson
ca70de9bd2 llvmpipe: Work without sse2 if llvm is new enough
At least on llvm 3.2 this appears to work fine.  Tested on an Athlon XP
2600+, which has sse and 3dnow but not sse2.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
Signed-off-by: Adam Jackson <ajax@redhat.com>
2013-04-05 11:32:53 -04:00
Jerome Glisse
b8998f976e winsys/radeon: add command stream replay dump for faulty lockup v3
Build time option, set RADEON_CS_DUMP_ON_LOCKUP to 1 in radeon_drm_cs.h to
enable it.

When enabled after each cs submission the code will try to detect lockup by
waiting on one of the buffer of the cs to become idle, after a timeout it
will consider that the cs triggered a lockup and will write a radeon_lockup.c
file in current directory that have all information for replaying the cs.

To build this file :
gcc -O0 -g radeon_lockup.c -ldrm -o radeon_lockup -I/usr/include/libdrm

v2: Add radeon_ctx.h file to mesa git tree
v3: Slightly improve dumped file for easier editing, only dump first faulty cs

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2013-04-05 10:22:05 -04:00
Brian Paul
5192262833 st/xlib: add HUD support for xlib/GLX
For the softpipe and llvmpipe drivers.

Reviewed-by: Jose Fonseca <jfonseca@vmware.com>
2013-04-04 17:00:42 -06:00
Brian Paul
f5071783c1 gallium/hud: add GALLIUM_HUD_PERIOD env var
To set the graph update rate, in seconds.  The default update rate
has also been changed to 1/2 second.

Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-04-04 17:00:42 -06:00
Brian Paul
6211c45186 gallium/hud: initialize sampler state
The default wrap mode (PIPE_TEX_WRAP_REPEAT) is incompatible with
unnormalized texcoords (at least for softpipe).

v2: use PIPE_TEX_WRAP_CLAMP_TO_EDGE

Reviewed-by: Marek Olšák <maraeo@gmail.com>
2013-04-04 17:00:42 -06:00
Kenneth Graunke
edc52a8f28 glsl: Add an optimization pass to flatten simple nested if blocks.
GLBenchmark 2.7's shaders contain conditional blocks like:

if (x) {
    if (y) {
        ...
    }
}

where the outer conditional's then clause contains exactly one statement
(the nested if) and there are no else clauses.  This can easily be
optimized into:

if (x && y) {
    ...
}

This saves a few instructions in GLBenchmark 2.7:

    total instructions in shared programs: 11833 -> 11649 (-1.55%)
    instructions in affected programs:     8234 -> 8050 (-2.23%)

It also helps CS:GO slightly (-0.05%/-0.22%).  More importantly,
however, it simplifies the control flow graph, which could enable other
optimizations.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-04 15:38:19 -07:00
Kenneth Graunke
967514ce68 i965: Use a variable for the push constant size in kB.
This clarifies that the offset of 2 is actually 16 kB / 8kB units.
It also keys both computations off of a single variable, which should
make it easier to change in the future.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-04-04 15:38:19 -07:00
Kenneth Graunke
8cdb2d32ec i965: Turn brw->urb.vs_size and gs_size into local variables.
These variables are only used within a single function, so we may as
well make them local variables.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-04-04 15:38:19 -07:00
Kenneth Graunke
b99ad7f02c i965: Remove BRW_NEW_WM_INPUT_DIMENSIONS dirty bit.
This was only produced by the brw_wm_input_dimensions atom, which was
removed in the previous commit.  So there's no need for the dirty bit.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-04 15:38:19 -07:00
Kenneth Graunke
d198546bac i965: Delete brw_vs_constval.c and the brw_wm_input_sizes atom.
This was only used to compute proj_attrib_mask, which was removed by the
previous commit.  That makes this dead code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-04 15:38:19 -07:00
Kenneth Graunke
705c8247fa i965: Remove now dead brw_wm_prog_key::proj_attrib_mask field.
The previous commit removed the last user of this field, so there's no
longer any point in setting it.  Removing this should eliminate
state-dependent recompiles, and make the precompile more reliable.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-04 15:38:19 -07:00
Kenneth Graunke
7183568869 i965: Remove fixed-function texture projection avoidance optimization.
This optimization attempts to avoid extra attribute interpolation
instructions for texture coordinates where the W-component is 1.0.

Unfortunately, it requires a lot of complexity: the brw_wm_input_sizes
state atom (all the brw_vs_constval.c code) needs to run on each draw.
It computes the input_size_masks array, then uses that to compute
proj_attrib_mask.  Differences in proj_attrib_mask can cause
state-dependent fragment shader recompiles.  We also often fail to guess
proj_attrib_mask for the fragment shader precompile, causing us to
needlessly compile it twice.

Furthermore, this optimization only applies to fixed-function programs;
it does not help modern GLSL-based programs at all.  Generally, older
fixed-function programs run fine on modern hardware anyway.

The optimization has existed in some form since the initial commit.  When
we rewrote the fragment shader backend, we dropped it for a while.  Eric
readded it in commit eb30820f26 as part of
an attempt to cure a ~1% performance regression caused by converting the
fixed-function fragment shader generation code from Mesa IR to GLSL IR.
However, no performance data was included in the commit message, so it's
unclear whether or not it was successful.

Time has passed, so I decided to re-measure this.  Surprisingly,
Eric's OpenArena timedemo actually runs /faster/ after removing this and
the brw_wm_input_sizes atom.  On Ivybridge at 1024x768, I measured a
1.39532% +/- 0.91833% increase in FPS (n = 55).  On Ironlake, there was
no statistically significant difference (n = 37).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2013-04-04 15:38:19 -07:00
Kenneth Graunke
32726b1af6 i965: Use ctx->Stencil._WriteEnabled in DEPTH_STENCIL_STATE.
This is the same computation as the _WriteEnabled flag, so we may as
well use it.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-04-04 15:38:19 -07:00
Kenneth Graunke
01bd29d681 i965: Fix stencil write enable flag in 3DSTATE_DEPTH_BUFFER on Gen7+.
ctx->Stencil.WriteMask is a statically sized array of 3 elements.
Checking it against 0 actually is a NULL check, and can never fail,
which meant that we always said stencil writes were enabled.

Use the new core Mesa derived state flag to fix this.

NOTE: This is a candidate for stable branches.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
2013-04-04 15:38:18 -07:00