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406 Commits

Author SHA1 Message Date
Alyssa Rosenzweig
be4d88a6ba agx: Mark components as ASSERTED 
Prevents a release build warning.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
0e2293a52b agx: Handle load_back_face_agx 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
 2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig
c21168a26c agx: Lower front face to back face 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
 2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig
5de49375ec asahi: Expose PIPE_CAP_CLIP_HALFZ 
Use the Zink lowering pass to handle the non-halfz case. Metal, like Vulkan,
uses half-z (and Metal is not configurable, making r/e tricky).

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11084>
 2021-05-30 23:32:01 +00:00
Alyssa Rosenzweig
e9483110d2 agx: Zero r0l before first use of control flow 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
839fff846a agx: Add break/continue support 
Following Dougall's notes closely.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
dd06e6af34 agx: Implement loops in the simplest way 
Again, optimizations are possible, but for now go for conformance.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
11705488ed agx: Optimize out empty else blocks 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
cf43206e76 agx: Implement emit_if the simplest way 
Lots of optimizations are possible from here.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
f7918ebc82 agx: Track current_block 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
0a7a6f0558 agx: Implement boolean mov 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
a1a8ee9b11 agx: Enable 1-bit load_const 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
15b5573194 agx: Set reads_tib appropriately 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
 2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
d0f566a90d agx: Implement load_output 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
 2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
1b9b2f9046 agx: Condition writeout ops on already being emitted 
There's a lot of r/e waiting here, but will be needed for ld_tile. Match
the Metal blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
 2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
41d8db33a2 agx: Assume lower_fragcolor has been called 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
 2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
07fdc0015e agx: Rename blend -> st_tile 
For symmetry.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
 2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
06fe6651b3 agx: Implement blend constant color sysvals 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
 2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
5fd489a6bd agx: Return agx_instr* from emit_intrinsic 
Aesthetically useful.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
 2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
87ad9439d3 agx: Support bcsel 
We're already using cmpsel in lots of places, pipe through the real
thing!

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:20 -04:00
Alyssa Rosenzweig
d3abe997ca agx: Add b2i implementation 
Another icmpsel variant.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
80edb8124d agx: Implement b2f 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
5a5abdc8d8 agx: Support 1-bit booleans 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
9201d31eac agx: Add min/max support 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:19 -04:00
Alyssa Rosenzweig
257a8cc111 agx: Emit texture ops 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:18 -04:00
Alyssa Rosenzweig
d555849c3c agx: Add agx_tex_dim helper 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:18 -04:00
Alyssa Rosenzweig
1455f33f9b agx: Implement vertex_id 
Preloaded to r5 in vertex shaders.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:18 -04:00
Alyssa Rosenzweig
7566466354 agx: Lower load_attr to device memory accesses 
This is pretty annoying but not as catastrophic as I feared... at least,
until we need to support indirect access, non-native formats, or instancing.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig
1c6f34f611 agx: Set flag on last st_vary instruction 
Not sure what the point is but let's match the blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig
033d4d09fc agx: Implement load_ubo/kernel_input 
Lower to a read from global memory at a base address specified in a
sysval.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig
77e7168ae2 agx: Implement limited case of i2i16/i2i32 as iadd 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig
0f58e8dabe agx: Add dead code eliminator 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:16 -04:00
Alyssa Rosenzweig
28801b4849 agx: Add forward optimizing pass for fmov 
Explain the ideas behind our SSA-based optimizer (inspired by ACO's,
thank you to Daniel Schuermann for discussing this with me in the
context of Bifrost), and implement the subset needed to propagate
abs/neg through.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:16 -04:00
Alyssa Rosenzweig
e50bae00f4 agx: Add 32-bit bitwise shifts 
Only ishr has an actual native instruction, the others are special cases
of the bitfield insertion/extraction ops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:16 -04:00
Alyssa Rosenzweig
17bb5a067a agx: Add saturated integer add/subtract support 
Just a flag on the regular iadd instruction.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:15 -04:00
Alyssa Rosenzweig
86ae965ea4 agx: Add iadd/imad integer arithmetic 
Lots of optimizations will be possible later on.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:15 -04:00
Alyssa Rosenzweig
0c21513693 agx: Add bitwise operations 
This get translated to bitop with the corresponding truth table with
some builder syntax sugar.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:15 -04:00
Alyssa Rosenzweig
c06dcaf0a0 agx: Implement native int->float conversions 
This time 8, 16, and 32-bit sources are supported natively, but not
64-bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:15 -04:00
Alyssa Rosenzweig
2126848771 agx: Implement native float->int conversions 
No 8-bit or 64-bit yet since those need lowerings.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:14 -04:00
Alyssa Rosenzweig
1f77aa95ec agx: Implement fsin/fcos 
First, we lower to fsin_agx and some ALU in NIR. Then, we implement
fsin_agx with the underlying transcental ops.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:14 -04:00
Alyssa Rosenzweig
b5a3845f9a agx: Implement simple floating point ops 
These are all direct translations of NIR->AIR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:14 -04:00
Alyssa Rosenzweig
8648b2be0b agx: Implement ld_vary 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:13 -04:00
Alyssa Rosenzweig
e54fdc0fac agx: Terminate programs with stop and traps 
The function of stop is clear. The function of trap, let alone a whole
sled of them, is less so. Maybe a debugging feature for later.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:13 -04:00
Alyssa Rosenzweig
f2d264e191 agx: Add instruction packing 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:13 -04:00
Alyssa Rosenzweig
c215895eae agx: Add a trivial register allocator 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:12 -04:00
Alyssa Rosenzweig
8af9822d14 agx: Implement fragment_out 
For a single colour render target.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:12 -04:00
Alyssa Rosenzweig
0079783428 agx: Implement vec2/vec3/vec4 ops 
As p_combine, to un-stub emit_alu.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:12 -04:00
Alyssa Rosenzweig
7ad11e3923 agx: Add agx_alu_src_index helper for emit_alu 
Since we don't use abs/neg in NIR, this just needs to construct
p_extract ops to deal with swizzles.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:12 -04:00
Alyssa Rosenzweig
22886f50f9 agx: Implement direct st_vary 
Indirection can come later, if at all..

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:11 -04:00
Alyssa Rosenzweig
fde66f0aa8 agx: Implement load_const as mov 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:11 -04:00