Commit Graph

179896 Commits

Author SHA1 Message Date
Friedrich Vock
5688a6ea28 nir: Handle casts in nir_opt_copy_prop_vars
Cc: mesa-stable

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27197>
(cherry picked from commit 9f22b95956)
2024-01-24 14:23:04 +00:00
Friedrich Vock
261ed78051 nir: Make is_trivial_deref_cast public
Cc: mesa-stable

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27197>
(cherry picked from commit 6c845ed548)
2024-01-24 14:23:04 +00:00
Boris Brezillon
73e2fce123 panfrost: Clamp the render area to the damage region
The render area clamping was lost during the transition to the FB
helpers. Restore the original logic so we can benefit from
EGL_KHR_partial_update on v4, and on v5 when only one damage
rectangle is passed.

Fixes: ff3eada7eb ("panfrost: Use the generic preload and FB helpers in the gallium driver")
Reported-by: Sjoerd Simons <sjoerd.simons@collabora.com>
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Tested-by: Sjoerd Simons <sjoerd.simons@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27215>
(cherry picked from commit f6f7715c58)
2024-01-24 14:23:03 +00:00
Rhys Perry
14277e0746 nir/lower_shader_calls: remove CF before nir_opt_if
Otherwise, opt_if_simplification() can attempt to insert an inot after a
jump.

Fixes RADV compilation of a Cyberpunk 2077 pipeline with
PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27193>
(cherry picked from commit e465ac2561)
2024-01-24 14:23:02 +00:00
Rhys Perry
eb965b58cb nir/lower_non_uniform: set non_uniform=false when lowering is not needed
Fixes RADV compilation of a Doom Eternal pipeline with
PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT, because
nir_opt_non_uniform_access was skipped and later passes don't expect
non-uniform access.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: b1619109ca ("nir/lower_non_uniform: remove non_uniform flags after lowering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27192>
(cherry picked from commit 015b0d678f)
2024-01-24 14:23:01 +00:00
Rhys Perry
9a45352746 radv: do nir_shader_gather_info after radv_nir_lower_rt_abi
Fixes compilation of a Doom Eternal shader with
PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT.

ac_nir_lower_resinfo() was not happening because it is predicated on
uses_resource_info_query and no later optimization updated it.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27195>
(cherry picked from commit 90939e93f6)
2024-01-24 14:22:40 +00:00
Eric Engestrom
2519220ab6 .pick_status.json: Update to eca4f0f632 2024-01-24 14:21:43 +00:00
Tapani Pälli
b0be9a58af iris: replace constant cache invalidate with hdc flush
This implements Wa_14010840176.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21364>
(cherry picked from commit 231ede4f0c)
2024-01-23 21:23:45 +00:00
Lionel Landwerlin
b6045c5fa9 anv: implement undocumented tile cache flush requirements
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27169>
(cherry picked from commit ba87656079)
2024-01-23 21:14:02 +00:00
Lionel Landwerlin
7e322ae574 anv: fix pipeline executable properties with graphics libraries
We're missing the ISA code in renderdoc. You can reproduce with the
Sascha Willems graphics pipeline demo.

The change is large here because we have to fix a confusion between
anv_shader_bin & anv_pipeline_executable. anv_pipeline_executable is
there as a representation for the user and multiple
anv_pipeline_executable can point to a single anv_shader_bin.

In this change we split the anv_shader_bin related logic that was
added in anv_pipeline_add_executable*() and move it to a new
anv_pipeline_account_shader() function.

When importing RT libraries, we add all the anv_pipeline_executable
from the libraries.

When importing Gfx libraries, we add the anv_pipeline_executable only
if not doing link time optimization.

anv_shader_bin related properties are added whenever we're importing a
shader from a library, compiling or finding in the cache.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3d49cdb71e ("anv: implement VK_EXT_graphics_pipeline_library")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26594>
(cherry picked from commit 58c9f817cb)
2024-01-23 21:13:46 +00:00
Karol Herbst
08229beb4e nir: rework and fix rotate lowering
No driver supports urol/uror on all bit sizes. Intel gen11+ only for 16
and 32 bit, Nvidia GV100+ only for 32 bit. Etnaviv can support it on 8,
16 and 32 bit.

Also turn the `lower` into a `has` option as only two drivers actually
support `uror` and `urol` at this momemt.

Fixes crashes with CL integer_rotate on iris and nouveau since we emit
urol for `rotate`.

v2: always lower 64 bit

Fixes: fe0965afa6 ("spirv: Don't use libclc for rotate")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by (Intel and nir): Ian Romanick <ian.d.romanick@intel.com>

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27090>
(cherry picked from commit f2b7c4ce29)
2024-01-23 20:52:01 +00:00
Yiwei Zhang
1f89910f6b venus: fix to respect the final pipeline layout
This fixes VUID-vkCmdDraw-None-08600 violation when running gpl cts:
dEQP-VK...graphics_library.misc.bind_null_descriptor_set.*, where the
final pipeline layout is falsely dropped, leading to incompatible with
the pipeline layout of the bound descriptor set.

Fixes: a65ac274ac ("venus: Do pipeline fixes for VK_EXT_graphics_pipeline_library")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27054>
(cherry picked from commit 80a5df16fe)
2024-01-23 20:14:57 +00:00
Yiwei Zhang
287e146d7e venus: fix pipeline derivatives
This was unexpected dropped in the initial GPL impl.

Fixes: a65ac274ac ("venus: Do pipeline fixes for VK_EXT_graphics_pipeline_library")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27054>
(cherry picked from commit f713b17a16)
2024-01-23 20:14:57 +00:00
Yiwei Zhang
725541c326 venus: fix pipeline layout lifetime
Should check the count instead of random ptr addr.

Fixes: 19f2b9d0bb ("venus: extend VkPipelineLayout lifetime for ...")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27054>
(cherry picked from commit b551b6e48a)
2024-01-23 19:49:26 +00:00
Samuel Pitoiset
535cef74b0 radv: fix indirect dispatches on the compute queue on GFX7
GFX7 CP requires the indirect dispatch VA to be aligned to 32-bytes.

This fixes dEQP-VK.api.command_buffers.many_indirect_disps_on_secondary,
but it's unexpected that it uncovered this bug.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27148>
(cherry picked from commit 5c03cdbd02)
2024-01-23 13:21:49 +00:00
Georg Lehmann
c529e4af06 aco: stop scheduling at p_logical_end
No Foz-DB changes, but this fixes some issues when the spiller inserts
scratch loads after p_logical_end for p_return.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27119>
(cherry picked from commit 74fc2e287f)
2024-01-23 13:21:48 +00:00
Daniel Schürmann
faa7275057 aco: give spiller more room to assign spilled SGPRs to VGPRs
On chordal graphs, a greedy coloring can be done in a way that never uses
more colors than are required for the largest clique. However, since we
have vector values and force phi resources into the same spill slots, the
interference graphs are not chordal, and thus, this assumption doesn't hold.

Use twice as many spill slots as upper bound.

Totals from 10 (0.01% of 79242) affected shaders: (GFX11)
MaxWaves: 52 -> 54 (+3.85%)
Instrs: 271386 -> 271779 (+0.14%)
CodeSize: 1362544 -> 1365432 (+0.21%)
VGPRs: 2536 -> 2532 (-0.16%)
SpillVGPRs: 778 -> 818 (+5.14%)
Scratch: 73472 -> 76800 (+4.53%)
Latency: 3331718 -> 3328798 (-0.09%); split: -0.14%, +0.05%
InvThroughput: 1665860 -> 1643350 (-1.35%); split: -1.40%, +0.05%
VClause: 3292 -> 3329 (+1.12%); split: -0.06%, +1.18%
Copies: 46082 -> 46257 (+0.38%)

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27011>
(cherry picked from commit e3098bb232)
2024-01-23 13:21:46 +00:00
Friedrich Vock
5d602c5e6e radv: Fix shader replay allocation condition
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26891>
(cherry picked from commit 43bdfebbff)
2024-01-23 13:21:45 +00:00
Konstantin Seurer
a26d09b450 lavapipe: Report the correct preprocess buffer size
There can be multiple sequences.

Fixes: 976dd26 ("lavapipe: NV_device_generated_commands")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27019>
(cherry picked from commit 024f144165)
2024-01-23 13:21:44 +00:00
Konstantin Seurer
b3918fe54c lavapipe: Mark vertex elements dirty if the stride changed
Fixes: 7672545 ("gallium: move vertex stride to CSO")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27019>
(cherry picked from commit cc94ff081c)
2024-01-23 13:21:43 +00:00
Konstantin Seurer
596cfa4424 lavapipe: Fix DGC vertex buffer handling
Fixes: 976dd26 ("lavapipe: NV_device_generated_commands")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27019>
(cherry picked from commit 6d88c1bb6c)
2024-01-23 13:21:42 +00:00
Konstantin Seurer
13b0648cc5 ac/llvm: Enable helper invocations for quad OPs
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9239
cc: mesa-stable

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27110>
(cherry picked from commit 220c912080)
2024-01-23 13:21:41 +00:00
Tapani Pälli
f948ccf791 anv: expand pre-hiz data cache flush to gfx >= 125
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27132>
(cherry picked from commit 02d7f5e4ff)
2024-01-23 13:21:40 +00:00
Tapani Pälli
296e6d3121 iris: expand pre-hiz data cache flush to gfx >= 125
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27132>
(cherry picked from commit 93706d5c2f)
2024-01-23 13:21:39 +00:00
Ian Romanick
0bdce8683c intel/compiler: Track mue_compaction and mue_header_packing flags in brw_get_compiler_config_value
v2: Use u_foreach_bit64. Suggested by Lionel.

Fixes: 48885c7fe3 ("intel/compiler: load debug mesh compaction options once")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26993>
(cherry picked from commit 7481d61a5d)
2024-01-23 13:20:51 +00:00
Hans-Kristian Arntzen
e0790e8734 wsi/x11: Add workaround for Detroit Become Human.
Game needs strict image count to not crash in non-vsync mode.

Signed-off-by: Hans-Kristian Arntzen <post@arntzen-software.no>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27038>
(cherry picked from commit efc0131d5b)
2024-01-23 13:18:50 +00:00
Dave Airlie
9b6bce4bb2 radv: don't submit empty command buffers on encoder ring.
the vcn enc/unified rings don't do nop packets, and hang with 0 sized
cmd buffers. This just stops submitting 0 sized cmd buffers to the hw.

Fixes hangs with dEQP-VK.video.decode.h264_i on navi3x

Cc: mesa-stable
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25932>
(cherry picked from commit f33683e4da)
2024-01-23 13:18:49 +00:00
Dave Airlie
ee3ab3257c radv/video: refactor sq start/end code to avoid decode hangs.
The extra cmd buffer layer was done wrong, need to emit the
sq start and ends around every reset/decode packet.

Fixes dEQP-VK.video.decode.h264_i on navi3x

Fixes: d8f3060bd9 ("radv/video: start adding gfx11 vcn decoder")
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25932>
(cherry picked from commit d32f2ee7b6)
2024-01-23 13:18:48 +00:00
Eric Engestrom
edc8f709f2 .pick_status.json: Update to d0a3bac163 2024-01-23 13:18:32 +00:00
Friedrich Vock
dd6e3a1a4e radv/rt: Add workaround to make leaves always active
DOOM Eternal builds acceleration structures with inactive primitives and
tries to make them active in later AS updates. This is disallowed by the
spec and triggers a GPU hang. Fix the hang by working around the bug.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27034>
(cherry picked from commit a9831caa14)
2024-01-17 22:25:49 +00:00
Boris Brezillon
ae7d41bd4d panvk: Fix access to unitialized panvk_pipeline_layout::num_sets field
Commit 73eecffabd ("panvk: Use the vk_pipeline_layout base struct")
reworked the panvk logic to use vk_pipeline_layout, which contains the
number of descriptor set layout referenced by a pipeline layout, thus
deprecating panvk_pipeline_layout::num_sets.

Make panvk_fill_non_vs_attribs() use vk_pipeline_layout::set_count
instead of panvk_pipeline_layout::num_sets and kill the latter so we
can't introduce new users.

Fixes: 73eecffabd ("panvk: Use the vk_pipeline_layout base struct")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Constantine Shablya <constantine.shablya@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27107>
(cherry picked from commit b18bfed2c5)
2024-01-17 22:18:30 +00:00
Boris Brezillon
6fb9f61f8a panvk: Fix tracing
pandecode_next_frame() take a decode context. Passing NULL leads to a
NULL deref.

Fixes: 56be9a55be ("pan/decode: handle more than one panfrost_device")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Constantine Shablya <constantine.shablya@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27107>
(cherry picked from commit 35a02560c8)
2024-01-17 22:18:29 +00:00
Sviatoslav Peleshko
13ceea551c nir: Use alu source components count in nir_alu_srcs_negative_equal
When we use source from ALU instruction directly, the default swizzle array
should be populated with the same amount of components as the src has.

Otherwise, if we use nir_ssa_alu_instr_src_components, it can return
the destination components count that is lower than component index
actually used in that source. This can lead to false equality
between 0 (uninitialized) and 0 (.x) in swizzle comparison below.

Fixes: c6ee46a7 ("nir: Add nir_alu_srcs_negative_equal")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8704
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22655>
(cherry picked from commit 6b0bfdfa9e)
2024-01-17 22:18:28 +00:00
Yonggang Luo
46bafee336 compiler/spirv: The spirv shader is binary, should write in binary mode
Fixes: 53265c8798 ("spirv: Add a mechanism for dumping failing shaders")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26775>
(cherry picked from commit fd11818828)
2024-01-17 22:18:27 +00:00
Yiwei Zhang
0946a4bfe0 vulkan/wsi/wayland: fix returns and avoid leaks for failed swapchain
Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Tested-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27080>
(cherry picked from commit dc5725ee29)
2024-01-17 22:18:25 +00:00
Eric Engestrom
c12de84ef3 .pick_status.json: Update to 6e4bb8253e 2024-01-17 22:18:21 +00:00
David Rosca
077c854016 radeonsi/vcn: Fix H264 slice header when encoding I frames
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27029>
(cherry picked from commit 865abfde63)
2024-01-16 18:42:48 +00:00
Patrick Lerda
cd711b4259 glsl/nir: fix gl_nir_cross_validate_outputs_to_inputs() memory leak
For instance, this issue is triggered with
vs-to-fs-overlap.shader_test -auto -fbo:
Direct leak of 24 byte(s) in 1 object(s) allocated from:
    #0 0x7fe64f58e9a7 in calloc (/usr/lib64/libasan.so.6+0xb19a7)
    #1 0x7fe642ca2839 in _mesa_symbol_table_ctor ../src/mesa/program/symbol_table.c:286
    #2 0x7fe642ff003d in gl_nir_cross_validate_outputs_to_inputs ../src/compiler/glsl/gl_nir_link_varyings.c:728
    #3 0x7fe642d7c7d8 in gl_nir_link_glsl ../src/compiler/glsl/gl_nir_linker.c:1357
    #4 0x7fe642be6931 in st_link_glsl_to_nir ../src/mesa/state_tracker/st_glsl_to_nir.cpp:562
    #5 0x7fe642be6931 in st_link_shader ../src/mesa/state_tracker/st_glsl_to_nir.cpp:944
    #6 0x7fe642acab55 in link_program ../src/mesa/main/shaderapi.c:1336
    #7 0x7fe642acab55 in link_program_error ../src/mesa/main/shaderapi.c:1447
    #8 0x7fe6424aa389 in _mesa_unmarshal_LinkProgram src/mapi/glapi/gen/marshal_generated2.c:1911
    #9 0x7fe641fd912b in glthread_unmarshal_batch ../src/mesa/main/glthread.c:139
    #10 0x7fe641f48d48 in util_queue_thread_func ../src/util/u_queue.c:309
    #11 0x7fe641fa442a in impl_thrd_routine ../src/c11/impl/threads_posix.c:67

Fixes: 7d1948e9b5 ("glsl: implement cross_validate_outputs_to_inputs() in nir linker")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27071>
(cherry picked from commit bacace8634)
2024-01-16 18:42:47 +00:00
Karol Herbst
3cc00515aa rusticl/kernel: run opt/lower_memcpy later to fix a crash
nir_opt_memcpy requires explicit types to function properly. So run them
after lowering vars to explicit types.

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27068>
(cherry picked from commit f896659894)
2024-01-16 18:42:47 +00:00
Tatsuyuki Ishi
a34a657bbd radv: never set DISABLE_WR_CONFIRM for CP DMA clears and copies
This mirrors the changes in 69ff9c16bb ("radeonsi: never set
DISABLE_WR_CONFIRM for CP DMA clears and copies").

Cc: mesa-stable
Suggested-by: Vitaliy Triang3l Kuzmin <triang3l@yandex.ru>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27053>
(cherry picked from commit 43fb43ba2c)
2024-01-16 18:42:46 +00:00
Lucas Stach
fc920acf7d etnaviv: disable 64bpp render/sampler formats
Vivante hardware handles 64bpp render targets and samplers in a odd way
by splitting the buffer and using a pair of texture samplers or a pair
of MRT outputs to access those resources. This isn't implemented in the
driver right now, so we should not advertise support for those formats.

CC: mesa-stable
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26982>
(cherry picked from commit e481c1269c)
2024-01-16 18:42:45 +00:00
Eric Engestrom
8f69ee06d2 .pick_status.json: Update to ff84aef116 2024-01-16 18:42:33 +00:00
Tapani Pälli
2f0a118afe anv: check for wa 16013994831 in emit_so_memcpy_end
We are toggling preemption on/off during streamout, this is also
happening on gfx12 platforms, not just dg2.

Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27002>
(cherry picked from commit 36f428f1de)
2024-01-15 22:20:07 +00:00
Lionel Landwerlin
5d7b3812b2 anv: hide vendor ID for The Finals
XeSS workaround.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10436
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27057>
(cherry picked from commit a34a113059)
2024-01-15 22:19:04 +00:00
Jesse Natalie
4c37d02fe2 mesa: Consider mesa format in addition to internal format for mip/cube completeness
Prior to 06b526de, the mesa format was used for these completeness checks.
That was to address the case where a *different* internal format selected
the *same* mesa format, and the texture shouldn't be considered compatible.
But this didn't address the case where the *same* internal format selected
a *different* mesa format, e.g. because the type passed to the TexImage
API was different.

An old WGL demo app called TexFilter.exe tries to redefine a mipped RGBA16
texture as RGBA8. This incorrect logic caused Mesa to try to copy the RGBA16
data from the smaller mips into the newly created RGBA8 data, because it
thought that the texture was still mip-complete, despite the format changing.

Cc: mesa-stable
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27023>
(cherry picked from commit 4cb9c77e8e)
2024-01-15 22:18:42 +00:00
Matt Turner
685cc5f6f2 util/tests: Disable half-float NaN test on hppa/old-mips
Bug: https://bugs.gentoo.org/908079
Fixes: 067023dce2 ("util: Add some unit tests of the half-float conversions.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26991>
(cherry picked from commit 5b7c733902)
2024-01-15 09:43:54 +00:00
Matt Turner
c24841d1e2 util: Add DETECT_ARCH_HPPA macro
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26991>
(cherry picked from commit 0540c9de44)
2024-01-15 09:43:50 +00:00
Eric Engestrom
0c942965e2 .pick_status.json: Update to 4fe5f06d40 2024-01-15 09:43:40 +00:00
Mike Blumenkrantz
151cd31e05 zink: fix separate shader patch variable location adjustment
in spirv, these start at location 0, not location 32

fixes #10414

Fixes: d9942442f2 ("zink: handle patch variable locations for separate shaders better")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26981>
(cherry picked from commit 565ee4fafc)
2024-01-12 18:44:54 +00:00
Alessandro Astone
62161b7425 zink: Fix resizable BAR detection logic
This was broken in two ways:
* When looking for the MAX biggest_ram it was actually comparing
  a candidate against biggest_vis_ram

* mem_props.memoryTypes[] should be accessed with the memory type
  index as found in heap_map

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10341
Cc: 23.3 <mesa-stable>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26979>
(cherry picked from commit a077c14f15)
2024-01-12 18:44:53 +00:00