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Author SHA1 Message Date
Jordan Justen
4ffe1a9f9e intel/brw: Fix SSBO/shared load offset register size for Xe2 
Rework:
 * Ken: Reword commit message

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
 2024-05-28 18:45:49 +00:00
Jordan Justen
4bc4da01f4 intel/brw: Allow xe2 in brw_stage_has_packed_dispatch() 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
 2024-05-28 18:45:49 +00:00
Jordan Justen
739613ec70 intel/brw: Simplify enabling brw_fs_test_dispatch_packing 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
 2024-05-28 18:45:49 +00:00
Jordan Justen
aa152ef431 anv/grl: Set INTEL_FORCE_PROBE=* when running intel_clc 
In order to build grl, we need to get the device_info struct from the
PCI ID, but for pre-production platforms we don't want to enable them
unless INTEL_FORCE_PROBE is set.

Setting it when running intel_clc allows us to get the device_info
struct when the pre-production hardware is not ready to be enabled by
default.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
 2024-05-28 18:45:49 +00:00
Jordan Justen
2217cff68a pci_ids/intel: Add LNL PCI IDs (with FORCE_PROBE set) 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
 2024-05-28 18:45:49 +00:00
Jordan Justen
845ca72a14 intel/dev: Add LNL device info 
Reworks:
 * José: Disable has_integer_dword_mul support (BSpec 56800)
 * Rohan: Set has_indirect_unroll
 * José: Add PAT settings
 * Jianxun: Set has_flat_ccs

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Co-authored-by: José Roberto de Souza <jose.souza@intel.com>
Co-authored-by: Rohan Garg <rohan.garg@intel.com>
Co-authored-by: Jianxun Zhang <jianxun.zhang@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
 2024-05-28 18:45:49 +00:00
Jordan Justen
4beab24d69 docs: Document INTEL_FORCE_PROBE env-var 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
 2024-05-28 18:45:49 +00:00
Jordan Justen
237d9e7c45 intel/dev: Support INTEL_FORCE_PROBE env-var 
This environment variable allows some Intel devices that are
unsupported to be forced to run. These devices have incomplete
support, and therefore might not work at all.

Reworks:
 * José: Simplify scan_for_force_probe() with strtok()

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
 2024-05-28 18:45:49 +00:00
Jordan Justen
c967b38c7c intel/dev: Allow setting FORCE_PROBE for intel PCI IDs 
For example:

CHIPSET(0x56a0, dg2_g10, "DG2", "Intel(R) Arc(tm) A770 Graphics", FORCE_PROBE)

For now if a PCI ID has FORCE_PROBE set, then we refuse to start the
device.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
 2024-05-28 18:45:49 +00:00
Iván Briano
8d098ecfea anv: check cmd_buffer is on a transfer queue more properly 
The queueFlags of the associated queue may have more flags than just the
type of queue it is, based on what that queue supports, like sparse or
protected content. Check that the queue is a blitter engine instead.

Fixes a bunch of dEQP-VK.api.copy_and_blit.core.*_transfer on MTL with
ANV_SPARSE=0

Fixes: 17b8b2cffd ("anv: Add support for a transfer queue on Alchemist")

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29336>
 2024-05-28 18:25:16 +00:00
Eric Engestrom
e6d9201c6c v3dv/ci: fix typo in renderer_check 
Fixes: 993dd0832f ("rpi4/ci: use deqp-runner suite for vk job as well")
Fixes: c0e6a72b00 ("rpi5/ci: use deqp-runner suite for vk job")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29412>
 2024-05-28 18:04:22 +00:00
Eric Engestrom
dc3bc70899 .mailmap: fix email address for @cpmichael 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29437>
 2024-05-28 16:31:23 +00:00
Boris Brezillon
76047bfa5e pan/jc: Drop unused pool argument passed to pan_jc_add_job() 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382>
 2024-05-28 16:03:30 +00:00
Boris Brezillon
443fe41ad2 pan/desc: Add missing format in translate_s_format() 
Vulkan stencil image views of combined stencil Z32_S8 buffers can result
in a PIPE_FORMAT_X32_S8X24_UINT format being passed to the stencil view.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382>
 2024-05-28 16:03:30 +00:00
Boris Brezillon
586e427b78 pan/decode: Be robust to NULL texture payload 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382>
 2024-05-28 16:03:30 +00:00
Boris Brezillon
20d25b9f07 panvk: Make sure we dump memory mappings before crashing 
Kinda useful when we want to debug things.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382>
 2024-05-28 16:03:30 +00:00
Boris Brezillon
47a1daa6da panvk: Kill cmd_get_tiler_context() 
cmd_prepare_tiler_context() is just a wrapper around
cmd_get_tiler_context(), and cmd_get_tiler_context() is only called
from cmd_prepare_tiler_context().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382>
 2024-05-28 16:03:30 +00:00
Boris Brezillon
f57fac8d37 panvk: Use vk_pipeline_shader_stage_to_nir() 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382>
 2024-05-28 16:03:30 +00:00
Boris Brezillon
f21c163baa panvk: Clean Midgard leftovers in the cmd_close_batch() path 
pan_preload_fb() will use pre-frames on Bifrost. Pass NULL preload_jobs
and assert that num_preload_jobs is zero.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29382>
 2024-05-28 16:03:30 +00:00
Erik Faye-Lund
dd8fb7139d mesa/main: rewrite mipmap generation code 
The old mipmap generation code has a few problems:

1. It open-codes the format conversion, which is error prone, and it's
   hard to know if we're missing some formats. Manual inspection shows
   that we're indeed missing some less commonly used formats.

2. When downsampling between two miplevels with the same width (e.g a
   width of one), the code would read from outside the image.

3. It averages sRGB textures in gamma space. Whilte that's legal in GL
   (the filtering algorithm is undefined), it doesn't produce very good
   results. And it's not the same thing as util_gen_mipmap() does.

4. Similarly, it uses a box-filter for the stencil values. And while
   that's actually what the spec recomments (regardless of format), it's
   absolutely *not* what most applications would want. Using nearest
   sampling would make more sense.

5. It has requirements about the type and format returned by
   _mesa_uncompressed_format_to_type_and_comps() which other call-sites
   in mesa doesn't have. This is the real reason I want to get rid of
   it, because it ends up complicating the GLES read formats / types.

So, let's rewrite all of this, fixing all of the above. The result is
quite a bit shorter, and if this ends up being less performant, it's
unlikely that this matters, because we almost always use the GPU
accelerated code-path provided by util_gen_mipmap() anyway.

The new code works by a few identities: It uses the pack / unpack
helpers to convert the texture to a few reasonable intermediate formats,
so we keep the amount of open-coded averaging to a minimum. To do this
without heap-allocations, we introduce a concept of a "span", which has
a max fixed size, that can trivially be allocated on the stack.

We also add some more requirements to keep things sane; the higher level
do_row functions only allow the dest image to be half of the source
width or one (whichever is larger). This matches the high-level needs of
mipmap generation. The lower level do_span() function is a bit more
flexible, because that turns out to be helpful when implementing
do_span_3D(), where we want to avoid collapsing the inner dimension
twice.

Tested-by: Eric R. Smith <eric.smith@collabora.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29380>
 2024-05-28 15:04:14 +00:00
Erik Faye-Lund
cd37384985 util/format: correct a typo 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29380>
 2024-05-28 15:04:14 +00:00
Rohan Garg
6fc6f95e90 intel/genxml: Update STATE_COMPUTE_MODE for Xe2 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Rohan Garg
f5a5c35717 intel/genxml: update MI_SEMAPHORE_WAIT for Xe2 
Rework:
 * José: Restore "Register Poll Mode" default to "Memory Poll"
 * José: Other minor formatting changes to match other genxml

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Rohan Garg
569a037fb1 intel/genxml: Update XY_BLOCK_COPY_BLT 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Rohan Garg
26e78f83bb intel/genxml: update CFE_STATE for LNL 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Rohan Garg
7001134246 isl: enable compression for CPS buffers on xe2+ 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Rohan Garg
b9c68883c4 intel/genxml: update 3DSTATE_CPSIZE_CONTROL_BUFFER for xe2+ 
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Rohan Garg
bd09649750 intel/genxml: add the new state byte stride instruction 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Jordan Justen
17b6db893b intel/genxml: Update 3DSTATE_BTD for xe2 
Reworks:
  - Rohan: 3DSTATE_BTD can also be emitted on the CCS

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Jordan Justen
5709bbe033 intel/genxml: Add XY_FAST_COLOR_BLT for xe2 
Reworks:
  - Rohan: Use a uint for the surface format since we're dropping the
    SURFACE_FORMAT enum from genxml

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Jordan Justen
92fa87f5bd blorp: Update programming for XY_FAST_COLOR_BLT on xe2 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29264>
 2024-05-28 14:42:19 +00:00
Samuel Pitoiset
7605456a9b radv: apply the SQ_THREAD_TRACE_WPTR workaround on GFX11 only 
GFX12 doesn't seem affected according to RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29426>
 2024-05-28 13:59:31 +00:00
Samuel Pitoiset
33ae2275bf radv: apply the workaround for no PS inpputs and LDS on GFX11 only 
GFX12 doesn't seem affected according to RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29426>
 2024-05-28 13:59:31 +00:00
Konstantin Seurer
a93f95c69c radv/rt: Remove load_rt_dynamic_callable_stack_base_amd 
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619>
 2024-05-28 12:23:45 +00:00
Konstantin Seurer
432f3eb9ca radv/rt: Track ray_launch_size reads 
Totals from 33 (8.71% of 379) affected shaders:
Instrs: 1434025 -> 1433988 (-0.00%); split: -0.01%, +0.00%
CodeSize: 7578824 -> 7578472 (-0.00%); split: -0.01%, +0.00%
Latency: 9241632 -> 9241639 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 3407014 -> 3407049 (+0.00%); split: -0.00%, +0.00%
VClause: 40399 -> 40391 (-0.02%)
SClause: 37755 -> 37760 (+0.01%); split: -0.04%, +0.05%
Copies: 169588 -> 169567 (-0.01%); split: -0.04%, +0.02%
PreSGPRs: 4323 -> 4319 (-0.09%)
VALU: 940500 -> 940484 (-0.00%); split: -0.00%, +0.00%
SALU: 220508 -> 220509 (+0.00%); split: -0.03%, +0.03%

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619>
 2024-05-28 12:23:45 +00:00
Konstantin Seurer
7ba8fccad3 radv/rt: Track ray_launch_id reads 
We can expect the z-component to be unused most of the times. Avoid
preserving it in those cases.

Totals from 94 (24.80% of 379) affected shaders:
MaxWaves: 916 -> 935 (+2.07%)
Instrs: 3316697 -> 3318357 (+0.05%); split: -0.06%, +0.11%
CodeSize: 17618704 -> 17616680 (-0.01%); split: -0.09%, +0.08%
VGPRs: 11632 -> 11520 (-0.96%)
SpillSGPRs: 1139 -> 1205 (+5.79%); split: -0.35%, +6.15%
Latency: 22595907 -> 22598225 (+0.01%); split: -0.15%, +0.16%
InvThroughput: 7036479 -> 6923740 (-1.60%); split: -1.74%, +0.14%
VClause: 104325 -> 104361 (+0.03%); split: -0.16%, +0.19%
SClause: 83920 -> 83925 (+0.01%); split: -0.08%, +0.08%
Copies: 328140 -> 330687 (+0.78%); split: -0.27%, +1.05%
Branches: 134521 -> 134541 (+0.01%); split: -0.01%, +0.02%
PreSGPRs: 8753 -> 8806 (+0.61%)
PreVGPRs: 10984 -> 10937 (-0.43%)
VALU: 2149880 -> 2151318 (+0.07%); split: -0.08%, +0.15%
SALU: 499107 -> 499128 (+0.00%); split: -0.08%, +0.09%

Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619>
 2024-05-28 12:23:45 +00:00
Konstantin Seurer
9fe34a3204 radv: Remove uses_dynamic_rt_callable_stack 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619>
 2024-05-28 12:23:45 +00:00
Konstantin Seurer
1038f48dd1 radv: Replace is_rt_shader with RADV_SHADER_TYPE_RT_PROLOG 
The flag was only used for identifying the rt prolog.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Friedrich Vock <friedrich.vock@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28619>
 2024-05-28 12:23:45 +00:00
Eric R. Smith
272dcaff01 panfrost: fix some omissions in valhall flow control 
The code for checking flow control did not realize that
`LD_TEX` and `LD_TEX_IMM` were memory accesses, and hence was
not inserting waits where these were necessary. This showed up
as flakes in KHR-GLES31.core.shader_image_load_store.basic-glsl-misc-fs

Cc: mesa-stable
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29363>
 2024-05-28 11:18:14 +00:00
Rhys Perry
de07fd384d aco/gfx12: disallow SCC and most constants for BUF SOFFSET 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Rhys Perry
12b4bdc134 aco/gfx12: decrease max_nsa_vgprs for VSAMPLE 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Rhys Perry
b1b3237590 aco/gfx12: remove MIMG vector affinity 
Since GFX12 uses NSA unconditionally, there is no code size advantage to
avoiding it.

fossil-db (gfx1200):
Totals from 41700 (52.52% of 79395) affected shaders:
MaxWaves: 1063633 -> 1063623 (-0.00%); split: +0.00%, -0.00%
Instrs: 32745913 -> 32736332 (-0.03%); split: -0.10%, +0.07%
CodeSize: 177664256 -> 177623280 (-0.02%); split: -0.08%, +0.06%
VGPRs: 1668640 -> 1665280 (-0.20%); split: -0.26%, +0.06%
Latency: 248630176 -> 248803989 (+0.07%); split: -0.23%, +0.30%
InvThroughput: 51923793 -> 51958560 (+0.07%); split: -0.15%, +0.22%
VClause: 633381 -> 633594 (+0.03%); split: -0.31%, +0.34%
SClause: 1090207 -> 1090206 (-0.00%); split: -0.02%, +0.02%
Copies: 2042437 -> 2040188 (-0.11%); split: -0.53%, +0.42%
Branches: 680437 -> 680416 (-0.00%); split: -0.01%, +0.01%
VALU: 19387160 -> 19384917 (-0.01%); split: -0.06%, +0.04%
SALU: 3112590 -> 3112540 (-0.00%); split: -0.01%, +0.00%
VOPD: 5474 -> 5527 (+0.97%); split: +2.87%, -1.90%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Rhys Perry
8bc03668e1 radv/gfx12: don't add workgroup id shader args 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Rhys Perry
ef74407577 aco/gfx12: use ttmp9/ttmp7 for workgroup id 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Rhys Perry
c8123b67e0 aco/gfx12: don't create v_fmac_legacy_f32 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Rhys Perry
e79a8219d2 aco/gfx12: sign-extend s_getpc_b64 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Rhys Perry
ae18c88409 aco/gfx12: implement workgroup barrier 
Same sequence LLVM uses for llvm.amdgcn.s.barrier.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Rhys Perry
fae2a85d57 aco/gfx12: implement subgroup shader clock 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Rhys Perry
872dda2bc5 aco: support GFX12 in insert_NOPs 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29330>
 2024-05-28 10:52:11 +00:00
Jose Maria Casanova Crespo
4835dc0e7f v3dv: Emit stencil draw clear if needed for GFXH-1461 
Fixes: 1e81bb05ae (v3dv: implement workaround for GFXH-1461)
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29427>
 2024-05-28 10:29:18 +00:00