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Author SHA1 Message Date
Pierre-Eric Pelloux-Prayer
4e362f738f gallium/ddebug: implement set_inlinable_constants 
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30587>
 2024-09-09 09:13:51 +00:00
Pierre-Eric Pelloux-Prayer
746e283fc3 gallium/ddebug: implement modifiers function 
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30587>
 2024-09-09 09:13:51 +00:00
Vignesh Raman
c6a9a9c3bc ci/deqp-runner: pass EXTRA_CARGO_ARGS 
Without EXTRA_CARGO_ARGS='--target armv7-unknown-linux-gnueabihf',
deqp-runner binary was built for aarch64 architecture for arm32
builds and causing below failures on arm32 target,
/usr/bin/deqp-runner: cannot execute binary file: Exec format error

So pass EXTRA_CARGO_ARGS to cargo to fix this.

Fixes: 83d9cfa5 ("ci/deqp-runner: build from git checkout even on linux")
Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31071>
 2024-09-09 08:26:47 +00:00
Mary Guillemard
51157e7440 docs: Mark timer queries as done on panfrost 
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30553>
 2024-09-09 09:26:42 +02:00
Mary Guillemard
8ffda8093e panfrost: Implement timer queries 
This implement PIPE_CAP_QUERY_TIMESTAMP, PIPE_CAP_QUERY_TIME_ELAPSED and
PIPE_CAP_TIMER_RESOLUTION by using the new uAPI in place.

Effectively, this expose ARB_timer_query, EXT_disjoint_timer_query and
OpenCL profiling on rusticl.

Co-authored-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30553>
 2024-09-09 09:16:03 +02:00
Mary Guillemard
dee5223262 panfrost: Move occlusion query allocation to create_query 
Also ensure to check if resource allocation failed.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30553>
 2024-09-09 09:15:59 +02:00
Mary Guillemard
302127fe9d pan/kmod: Add timestamp uapi support 
This adds support for timestamp in kmod based on new uAPI changes.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30553>
 2024-09-09 09:15:47 +02:00
Mary Guillemard
76aae6c3da panfrost: Update panthor_drm.h 
Update to sync with uAPI changes.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30553>
 2024-09-09 09:15:44 +02:00
Mary Guillemard
80fe936be9 panfrost: Update panfrost_drm.h 
Update to sync with uAPI changes.

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30553>
 2024-09-09 09:15:20 +02:00
David Rosca
95d15406c4 radv/video: Don't use multiple tasks for one encode operation 
The begin op was sent as one task and encode op as another one.
This doesn't work on VCN2 and older, so just send both ops in same task.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31078>
 2024-09-09 06:55:03 +10:00
David Rosca
60c38b9886 radv/video: Don't use op_close in encode 
This should only be used on video session destroy, but at that point
we don't have command buffer. RENCODE_IB_OP_CLOSE_SESSION is optional,
so it's okay not using it at all.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31078>
 2024-09-09 06:54:47 +10:00
Caio Oliveira
2a5a12cb71 intel/executor: Small fixes to the help message 
Add missing @eot to the example.
Reword INTEL_DEBUG=color description.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31076>
 2024-09-07 16:32:50 +00:00
Mike Blumenkrantz
1e17f49baf ci: add --pipeline-url to trace update script 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31070>
 2024-09-07 12:15:35 +00:00
Mike Blumenkrantz
f944c18fad ci: fix trace update script 
this was broken by various things

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31070>
 2024-09-07 12:15:35 +00:00
David Rosca
e509139f61 radeonsi/vcn: Add support for H264 8x8 transform on VCN5 
Enabling this gives slight increase in quality.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31020>
 2024-09-07 04:48:18 +00:00
David Rosca
22d98e35cd radeonsi/vcn: Stop hardcoding values in VCN version overrides 
It only makes it more likely to forget updating all functions when
implementing these features and cause issues.
Also fixes H264 constrained_intra_pred on VCN5.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31020>
 2024-09-07 04:48:18 +00:00
David Rosca
cd2562117a frontends/va: Parse more H264 PPS for transform_8x8_mode_flag 
Also use constrained_intra_pred_flag from pic params.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31020>
 2024-09-07 04:48:18 +00:00
Marek Olšák
1537b9355a ac,radeonsi: update comments related to the L2 cache, use "L2", not "TC" 
"GL2" is also OK. "TC-compatible" is also OK.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30869>
 2024-09-07 01:51:23 +00:00
Marek Olšák
1b94137039 ac/nir/meta: move the "skip compute if no DCC image stores" condition to common 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30869>
 2024-09-07 01:51:23 +00:00
Marek Olšák
5250128c6a ac: fix WAVES_PER_SH value for gfx12 
not a serious issue because we only use it for PRIME without SDMA IIRC

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30869>
 2024-09-07 01:51:23 +00:00
Alyssa Rosenzweig
1753bf599c ci: update traces 
🤕

thanks Mike

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
b7542c4390 nir: CSE comparisons in atan2 
Same code generated on AGX but simplified NIR.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
7546ae96a7 nir: drop NaN fixup for atan 
this existed due to the min/max, per the comment. now that we don't do min/max,
the whole routine is NaN correct so the fixup is pointless.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Suggested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
ab8547a002 nir: push up abs in atan2 calculation 
everybody has abs on fmul, not everyone has abs on bcsel. should help agx and
bifrost.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
398e1ad46c nir: fuse ffma for atan range fixup 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
47e7cd268c nir: negate an expression in atan 
we're going to fix up the sign immediately anyway.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
5318b8868b nir: simplify atan range reduction fixup 
the original version sure is creative.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
87b99d5797 nir: use copysign for atan 
this does two things:

* ignores sign of negative numbers which let us play fast and loose later in th
  series
* avoids an expensive fsign instruction in favour of a cheap bitwise op

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
95215a094a nir: extend copysign for no-integer hw 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
0a4a0df283 nir: push down fabs for atan 
worse in terms of NIR instruction count but lets the fabs fold easier. (on agx,
which has fabs on comparisons and fmul but not on bcsel. should be no worse if
ISA has fabs on all 3.)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
8579375777 nir: simplify atan range reduction 
just implement what the comment says, don't be clever. the clever thing is worse
on all architectures i'm familiar with, because the fdiv will turn into
fmul+frcp.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
a32b1a975d nir: correct comment for atan range reduction 
the code did not match the comment, blew a sign.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
4fc3e34f2f nir: use Horner's method for atan 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
0c81a29db6 virgl: set no_integers 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
a52f606647 svga: set no_integers 
for vgpu9 but not 10

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
4b95fb2988 freedreno/a2xx: set no_integers 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
531538f678 etnaviv: set no_integers 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Alyssa Rosenzweig
f79f63f8b8 lima: set no_integers 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30934>
 2024-09-07 00:54:35 +00:00
Boyuan Zhang
8bf7562416 radeonsi/vcn: fix loop filter across slices 
PPS header should use pps_loop_filter_across_slices_enabled_flag instead
of slice_loop_filter_across_slices_enabled_flag according to HEVC SPEC.

Slice header should also use pps_loop_filter_across_slices_enabled_flag
as one of the condition to determine if slice flag needs to be present.

V2: Apply pps_loop_filter_across_slices_enabled_flag to loop_filter as well
So modify loop_filter_across_slices_enabled value to be pps one instead

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31064>
 2024-09-06 22:48:17 +00:00
Mohamed Ahmed
af15cceff4 nvk: Use stride in the explicit modifier case for linear images 
Fixes: f1fdffa1b2 (nvk: Support image creation with modifiers)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31045>
 2024-09-06 19:37:09 +00:00
Sil Vilerino
fed08a4ac8 Fix definitions of PIPE_BIND_VIDEO_DECODE/ENCODE_DPB as they conflict with PIPE_BIND_SCANOUT and PIPE_BIND_SHARED 
Fixes: f8145fe691 ("pipe: Add PIPE_BIND_VIDEO_DECODE_DPB/PIPE_BIND_VIDEO_ENCODE_DPB")

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31067>
 2024-09-06 18:53:11 +00:00
Samuel Pitoiset
eab5b453cd radv: fix allocating sparse descriptor buffers in the 32-bit addr space 
There are two bugs:
- VK_KHR_maintenance5 added VkBufferUsageFlags2CreateInfoKHR, so
checking for pCreateInfo->usage is incomplete
- this was also missing the usage flag for descriptor buffer with samplers

This fixes recent VKCTS coverage in
dEQP-VK.binding_model.descriptor_buffer.*.

Fixes: 059391b631 ("radv: use 32bit va range for sparse descriptor buffers")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31054>
 2024-09-06 18:27:37 +00:00
Dylan Baker
a089d8e89b docs: update sha sums for 24.2.2 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31065>
 2024-09-06 18:19:24 +00:00
Dylan Baker
d6c1bda9eb docs: update sha sums for 24.2.2 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31065>
 2024-09-06 18:19:24 +00:00
Dylan Baker
b489dc4918 docs: add release notes for 24.2.2 
Conflicts:
	docs/relnotes.rst

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31065>
 2024-09-06 18:19:24 +00:00
Mike Blumenkrantz
b6f201b173 meson: require dri3 modifiers 
the year is 2024 and we have the technology

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31044>
 2024-09-06 17:34:17 +00:00
Tapani Pälli
0489df9a51 glsl: set a version to standalone compiler context 
Upcoming more strict context vs glsl version checks will fail otherwise.
Since standalone compiler requires ARB_ES3_2_compatibility that requires
GL 4.5 we simply set that as the context version.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31061>
 2024-09-06 14:32:33 +00:00
Tapani Pälli
62799fcdd5 iris: initialize pixel struct to zero when setting clear color 
Otherwise we can end up with uninitialized values, this fixes following
valgrind warning:

==71705== Uninitialised byte(s) found during client check request
==71705==    at 0x73B6DB8: util_bitpack_uint (bitpack_helpers.h:55)
==71705==    by 0x73B6DB8: GFX11_PIPE_CONTROL_pack (gen11_pack.h:19885)
==71705==    by 0x73B6DB8: iris_emit_raw_pipe_control (iris_state.c:10022)
==71705==    by 0x6F93386: iris_emit_pipe_control_write (iris_pipe_control.c:97)
==71705==    by 0x6FBCCAA: iris_resource_update_indirect_color (iris_resolve.c:1241)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30990>
 2024-09-06 13:19:04 +00:00
Tapani Pälli
39a1f53890 anv: initialize pixel struct to zero when setting clear color 
Otherwise we can end up with uninitialized values, this fixes following
valgrind warning:

==31283== Uninitialised byte(s) found during client check request
==31283==    at 0x503E4DE: anv_batch_bo_finish (anv_batch_chain.c:345)
==31283==    by 0x504220A: anv_cmd_buffer_end_batch_buffer (anv_batch_chain.c:1103)
==31283==    by 0x55A0E4F: end_command_buffer (genX_cmd_buffer.c:3455)
==31283==    by 0x55A0E82: gfx11_EndCommandBuffer (genX_cmd_buffer.c:3466)
==31283==    by 0x11233A: ??? (in /usr/bin/vkcube)
==31283==    by 0x10BDEE: ??? (in /usr/bin/vkcube)
==31283==    by 0x49B5149: (below main) (in /usr/lib64/libc.so.6)
==31283==  Address 0xc10c4d8 is 1,240 bytes inside a block of size 8,192 client-defined
==31283==    at 0x5036EF6: anv_bo_pool_alloc (anv_allocator.c:1284)
==31283==    by 0x503E0E1: anv_batch_bo_create (anv_batch_chain.c:262)
==31283==    by 0x5040D3F: anv_cmd_buffer_init_batch_bo_chain (anv_batch_chain.c:868)
==31283==    by 0x504F9C1: anv_create_cmd_buffer (anv_cmd_buffer.c:147)
==31283==    by 0x6B718C4: vk_common_AllocateCommandBuffers (vk_command_pool.c:206)
==31283==    by 0x4FB06B2: vkAllocateCommandBuffers (trampoline.c:1996)
==31283==    by 0x111E6B: ??? (in /usr/bin/vkcube)
==31283==    by 0x10BDEE: ??? (in /usr/bin/vkcube)
==31283==    by 0x49B5149: (below main) (in /usr/lib64/libc.so.6)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30990>
 2024-09-06 13:19:04 +00:00
Danylo Piliaiev
3886a3014d tu: Fix ZPASS_DONE having stale value with generic clear+early frag test 
If the next renderpass uses the same depth attachment, clears it
with generic clear - ZPASS_DONE may somehow read stale values that
are apparently invalidated by CCU_INVALIDATE_DEPTH.

Fixes:
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_alpha_to_coverage_samples_2_maintenance5
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_alpha_to_coverage_samples_4_maintenance5
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_samples_2_maintenance5
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_samples_4_maintenance5

When running them with TU_DEBUG=sysmem

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30858>
 2024-09-06 10:01:49 +00:00