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Author SHA1 Message Date
Alyssa Rosenzweig
5b3f4cf6f8 asahi/decode: Turn assert into error 
To allow us to debug broken fetches.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:55 +00:00
Alyssa Rosenzweig
6aa1cf6e7a asahi: Advertise OpenGL ES 3.1! 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:55 +00:00
Alyssa Rosenzweig
c8b44eb4c3 agx: Implement imul_high 
Like umul_high. Fixes
dEQP-VK.spirv_assembly.instruction.compute.mul_extended.signed_16bit

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:55 +00:00
Alyssa Rosenzweig
cf12429c97 agx: Convert 8-bit comparisons 
Fixes dEQP-VK.spirv_assembly.type.vec3.i8.slessthan_frag

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:55 +00:00
Alyssa Rosenzweig
72231b042c agx: Handle b2i8 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:55 +00:00
Alyssa Rosenzweig
7590b2b39d agx: Allow loop headers without later preds 
These happen for loops that break after exactly 1 iteration, unconditionally.
Fixes validation splat in dEQP-VK.glsl.switch.conditional_fall_through_2_uniform_vertex

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Alyssa Rosenzweig
4dcfb681bc agx/lower_vbo: Handle nonzero component 
Fixes dEQP-VK.glsl.440.linkage.varying.component.vert_in.vec2.as_float_float

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Mary
0ec2183dfc agx: Ensure to lower 1D image load/store to 2D 
This was missing from lower_images.
This fix a good chunk of Vulkan deQP failures with 1D images.

Signed-off-by: Mary <mary@mary.zone>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Alyssa Rosenzweig
8701ad4396 agx: Don't blow up when lowering textures twice 
Hard to avoid with GS.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Alyssa Rosenzweig
7f636a08c8 asahi: Keep drawoverhead from OOMing itself 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Alyssa Rosenzweig
c363fcbe1e agx: Assert vertex_id, instance_id are VS-only 
We can get them in other shaders transiently due to merging shader stages, but
they need to be lowered since the hardware versions only exist in the hardware
VS. So the compiler should never see them outside VS.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Alyssa Rosenzweig
4c36f9052b asahi: Copy CSO stride 
Fixes: 7672545223 ("gallium: move vertex stride to CSO")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Alyssa Rosenzweig
240ee9564b agx: Use more barriers 
Fixes flakiness in
KHR-GLES31.core.texture_buffer.texture_buffer_atomic_functions.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Alyssa Rosenzweig
f068ed0534 agx: Fix extraneous bits with b2b32 
From expanding mov_imm to take a 64-bit immediate. this worked by accident
before. Fixes brief regression in
dEQP-GLES31.functional.compute.shared_var.basic_type.bvec3.

Fixes: dbd98aa24d1 ("agx: Fix 64-bit immediate moves")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Alyssa Rosenzweig
ec2ab7d771 nir: Add load_sysval_agx intrinsic 
For merging shader stages, it will be useful to express a load from an explicit
GL "descriptor set", so we can represent things like UBO loads with merged
shaders where UBOs can come from either stage. To do so, we add an intrinsic
representing a load from the driver's uniform tables, indexed like "descriptor
sets" with "bindings".

In principle, a layered GL-on-Vulkan implementation would use literal descriptor
sets for each stage, so I feel comfortable with the analogy here.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24847>
 2023-08-23 15:06:54 +00:00
Chris Spencer
bda4eb18dd anv: Advertise Vulkan 1.3 on Android 13 
Older versions of Android rejected newer versions of Vulkan,[1] but Android
13 devices are 'strongly recommended' to support Vulkan 1.3.[2]

[1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4781
[2] https://source.android.com/docs/compatibility/13/android-13-cdd#7142_vulkan

Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24816>
 2023-08-23 14:31:26 +00:00
Alyssa Rosenzweig
b0f02973d7 panfrost/ci: Disable T720 
Timing out and preventing merges. The lab needs to fix the devices and likely
add more coverage before this can be re-enabled.

The rest of the Panfrost/Collabora farm seems ok, it's just the T720 devices.

See https://gitlab.freedesktop.org/mesa/mesa/-/jobs/47910575 which at the time
of pushing has been waiting for t720 job to start for 45 minutes. This will
allow us to merge code today.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
 2023-08-23 10:26:38 -04:00
Sviatoslav Peleshko
9865e5dff4 anv: Do fast clear color initialization more delicately 
Fixes: b4198e79 ("anv/cmd_buffer: Initalize the clear color struct for CNL+")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9464
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24768>
 2023-08-23 12:55:08 +00:00
Sviatoslav Peleshko
caa5c23e48 intel/isl: Don't over-allocate CLEAR_COLOR size to use whole cache line 
At the time this was added to fix some test failures. But it seems that
the failures were happening due to missing cache flushes, so
this extra space is no longer neccessary.

Fixes: 37b4eacc ("intel/isl: Resize clear color buffer to full cacheline")
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24768>
 2023-08-23 12:55:08 +00:00
Georg Lehmann
6d949e18fd aco: fix u2f16 with 32bit input 
The vulkan spec says all conversions are correctly rounded, so if the input
is larger than the largest fp16 value, we need to return MAX_FLOAT/inf
instead of cutting off the msbs.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24826>
 2023-08-23 12:25:56 +00:00
Rhys Perry
1d29a1e2fc aco: add adjust_bpermute_dst helper 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
 2023-08-23 12:36:46 +01:00
Rhys Perry
9169fbf83c aco: clarify bpermute pseudo opcode names 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
 2023-08-23 12:36:46 +01:00
Rhys Perry
8a024c985f aco: fix p_bpermute_gfx6's exec save/restore with wave32 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
 2023-08-23 12:36:46 +01:00
Rhys Perry
85957dd6e5 aco: fix p_bpermute_gfx6 with input at non-zero byte 
Same as the other bpermute pseudo instructions.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24693>
 2023-08-23 12:36:46 +01:00
Chris Spencer
280281f8f7 anv/android: Add support for AHARDWAREBUFFER_FORMAT_YV12 
The default MediaCodec software video decoder returns frames in this
format.

Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24388>
 2023-08-23 09:56:03 +00:00
Chris Spencer
35fddccf3f anv/android: Fix importing hardware buffers with planar formats 
Currently, we try to fetch the color aspect of the format and convert that
to an ISL format, which is then used to convert the pixel stride to bytes.
This does not work with planar formats because they don't have a color
aspect, and the planes can be of different sizes anyway, so may not have
the same byte stride. Change to calculate the stride individually for each
plane.

Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24388>
 2023-08-23 09:56:03 +00:00
Samuel Pitoiset
203b4054f3 aco: rework printing shader stages 
To avoid printing "unknown" for shader object when eg. VS and TCS
are compiled separately.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24810>
 2023-08-23 09:21:33 +00:00
Feng Jiang
09ff733a3e CODEOWNERS: Add @flynnjiang for VirGL video 
Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Acked-by: Corentin Noël <corentin.noel@collabora.com>
Acked-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24570>
 2023-08-23 08:35:08 +00:00
Samuel Pitoiset
aef257fd15 radv: advertise NV_device_generated_commands_compute 
This extension introduces a token for implementing DGC compute, it's
only intended to be used by vkd3d-proton.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
1a90b7a5da radv: allow DGC on the compute queue 
DGC cmdbuf on ACE are executed as IB1 without chaining because IB2
isn't supported on ACE.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
559da06755 radv: implement NV_device_generated_commands_compute 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
a57fe712f7 radv: prepare radv_prepare_dgc() for DGC compute 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
aa0ca1e1db radv: prepare radv_get_sequence_size() for DGC compute 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Samuel Pitoiset
bb82a3402a radv: track the pipeline bind point for indirect commands layout 
This will be used to implement DGC compute.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24275>
 2023-08-23 06:05:39 +00:00
Mike Blumenkrantz
fbf3f64c6d zink: sanitize optimal keys 
shader keys represent pipeline states which trigger variants, but not
all shaders are affected by certain states

this adds some sanitizing for the optimal path to ignore shader variants
which won't have any effect for the currently bound shaders, thus reducing
the number of pipelines compiled (both unoptimized and optimized)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24831>
 2023-08-23 01:39:42 +00:00
Mike Blumenkrantz
dae144aeac zink: use the "set" optimal key for prog last_variant_hash for consistency 
this is the key that has been set during program update for reuse
everywhere else, and everything else in the driver uses it

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24831>
 2023-08-23 01:39:42 +00:00
Mike Blumenkrantz
d5157356ce zink: don't start multiple cache jobs for the same program 
if there's already a cache job in flight then starting a second one
is illegal

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24831>
 2023-08-23 01:39:42 +00:00
David Rosca
87e2d5d605 frontends/va: Add BT.709 as supported postproc color standard 
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24788>
 2023-08-23 01:01:16 +00:00
David Rosca
33dc69b9fa gallium/auxiliary/vl: Don't set csc matrix in video_buffer/rgb_to_yuv_layer 
It's now handled in va frontend instead.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24788>
 2023-08-23 01:01:16 +00:00
David Rosca
92690aee95 frontends/va: Set csc matrix in postproc 
Set correct matrix according to format, color standard and range.

Change default value for color range when not explicitly specified.
Use limited range for YUV and full range for RGB.

This also adds support for converting from full range YUV to RGB.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24788>
 2023-08-23 01:01:16 +00:00
David Rosca
e99f0f953e gallium/auxiliary/vl: Add BT.709 full csc matrix 
Used for converting from full range YUV.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24788>
 2023-08-23 01:01:16 +00:00
Sagar Ghuge
839b03cc06 blorp: Drop unnecessary assertions in blorp_can_hiz_clear_depth 
We already checks for the alignment and the multislice surface, we don't
need to add assertions around those two.

fixes: 37fcbb375c ("blorp: Disable unaligned partial HIZ fast clears for HIZ_CCS too")
closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9684

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Tested-by: Mark Janes <markjanes@swizzler.org>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24837>
 2023-08-23 00:35:07 +00:00
Rob Clark
39f26642d6 util: Decouple disk cache from EGL_ANDROID_blob_cache 
Just because the user / system-integrater doesn't want shader disk
cache, doesn't mean they don't want EGL_ANDROID_blob_cache to work.
We've kind of already solved this for the android case, so just
generalize that solution.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9520
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24636>
 2023-08-23 00:04:16 +00:00
Emma Anholt
5bd0750921 intel/fs: Simplify compute_start_end(). 
Now that we have moved the screening up, we can simplify the code.  No
change in shader-db steam performance, n=10.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24702>
 2023-08-22 23:34:30 +00:00
Emma Anholt
2b01246f49 intel/fs: Move the defin[]/defout[] screening up to livein[]/liveout[] setup. 
This keeps us from having to run the loop to propagate up quite so much.

steam shader-db time -1.86356% +/- 0.941498% (n=10).  There's a small
scheduling effect, since previously the scheduler wasn't considering
defin/defout:

cycles helped:   shaders/closed/steam/amnesia-the-dark-descent/high/241.shader_test FS SIMD16: 11428 -> 11422 (-0.05%) (scheduled: scheduled)
cycles helped:   shaders/humus-volumetricfogging2/1.shader_test FS SIMD32: 13832 -> 13800 (-0.23%) (scheduled: scheduled)
cycles helped:   shaders/tesseract/479.shader_test FS SIMD32:      9330 -> 8644 (-7.35%) (scheduled: scheduled)

cycles HURT:   shaders/robclark-shaders/android/angle/aztec_ruins/36.shader_test FS SIMD32: 7870 -> 7940 (0.89%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/57.shader_test FS SIMD32: 7870 -> 7940 (0.89%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/54.shader_test FS SIMD32: 7870 -> 7940 (0.89%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/android/angle/aztec_ruins/30.shader_test FS SIMD32: 8726 -> 8808 (0.94%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_5_high_off/51.shader_test FS SIMD32: 8726 -> 8808 (0.94%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_5_normal_off/48.shader_test FS SIMD32: 8726 -> 8808 (0.94%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_4_off/129.shader_test TCS SIMD8: 3911 -> 3979 (1.74%) (scheduled: scheduled)
cycles HURT:   shaders/robclark-shaders/gfxbench5/gl_4_off/109.shader_test TCS SIMD8: 3911 -> 3979 (1.74%) (scheduled: scheduled)

total cycles in shared programs: 313096438 -> 313096306 (<.01%)
cycles in affected programs: 92200 -> 92068 (-0.14%)

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24702>
 2023-08-22 23:34:30 +00:00
Emma Anholt
ed4e1becea intel/fs: Move defin/defout setup to the start of the loop. 
Refactor for the next commit.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24702>
 2023-08-22 23:34:30 +00:00
Daniel Schürmann
7e246f7f2b nir/opt_move: fix handling of if-condition 
By accident, this used the parent of the nir_src which is a nir_if
instead of the parent of the SSA value.

Totals from 10814 (8.10% of 133461) affected shaders: (GFX11)
Instrs: 21759185 -> 21757190 (-0.01%); split: -0.02%, +0.01%
CodeSize: 112320272 -> 112316008 (-0.00%); split: -0.02%, +0.01%
SpillSGPRs: 11220 -> 11212 (-0.07%)
SpillVGPRs: 911 -> 903 (-0.88%); split: -1.54%, +0.66%
Latency: 258334759 -> 258316073 (-0.01%); split: -0.02%, +0.01%
InvThroughput: 31428650 -> 31426394 (-0.01%); split: -0.02%, +0.01%
VClause: 309119 -> 309090 (-0.01%); split: -0.01%, +0.01%
SClause: 657028 -> 657150 (+0.02%); split: -0.03%, +0.04%
Copies: 1434209 -> 1432420 (-0.12%); split: -0.28%, +0.15%
Branches: 481804 -> 481801 (-0.00%)
PreSGPRs: 829995 -> 829966 (-0.00%)
PreVGPRs: 758249 -> 758253 (+0.00%)

Fixes: 8a78706643 ('nir: refactor nir_opt_move')
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24695>
 2023-08-22 21:05:18 +00:00
Alyssa Rosenzweig
f9e5534182 nir/lower_gs_intrinsics: Remove end primitive for points 
EndPrimitive() for points is entirely pointless, so just remove it when lowering
EndPrimitive to simplify the IR. This is (maybe) an optimization everywhere, and
will be relied on for correctness on Asahi.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24798>
 2023-08-22 20:24:40 +00:00
Alyssa Rosenzweig
8c7629524e nir/print: Print access qualifiers for intrinsics 
Instead of printing an opaque integer that needs to be manually decoded.
Example output:

    32x4   %7 = @image_load (%4 (0x0), %6, %5 (0x0), %4 (0x0)) (image_dim=2D, image_array=false, format=r8g8b8a8_snorm, access=readonly|reorderable, range_base=0, dest_type=float32)

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24798>
 2023-08-22 20:24:40 +00:00
Caio Oliveira
48b86a877f compiler/types: Use smaller keys for explicit_matrix_types table 
Instead of using the name as key, use a shorter struct type.
Only build a name string if we are adding a new entry to the table.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23281>
 2023-08-22 18:52:15 +00:00