Commit Graph

183301 Commits

Author SHA1 Message Date
Faith Ekstrand
d280160a13 nak: Disallow gl_FragData and set MRT correctly
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27049>
2024-01-12 23:58:11 +00:00
Faith Ekstrand
005b5b1464 nvk: Set a minimum of one patch control point
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27049>
2024-01-12 23:58:11 +00:00
Faith Ekstrand
2cab67a9f1 nvk: Invalidate state after secondary command buffers
Today, the only thing that this really affects is descriptor sets and
dynamic state as everything else is re-emitted almost every time.
However, as we add more dirtying, we'll need to be more and more careful
about stale state leaking across secondary command buffer executions.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27049>
2024-01-12 23:58:11 +00:00
Faith Ekstrand
bc36dfdb5d nvk: Handle missing descriptor sets in nvk_nir_lower_descriptors
For VK_EXT_graphics_pipeline_library, we need to be able to handle
missing descriptor sets.  THis screws up dynamic buffers because we're
no longer guaranteed to be able to statically compute the index into
nvk_root_descriptor_table::dynamic_buffers while lowering descriptors.
Instead, we may need to look up the start index for the set in
nvk_root_descriptor_table::set_dynamic_buffer_start and compute from
there.

We also rework nvk_nir_lower_descriptors to take an array of (possibly
NULL) descriptor sets.  This ensures that we don't make any assumptions
about the pipeline layout.  It's also the interface we'll want for
implementing VK_EXT_shader_object.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27048>
2024-01-12 23:42:39 +00:00
Faith Ekstrand
3197aff4e8 nvk: Make dynamic cbuf indices relative to the descriptor set
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27048>
2024-01-12 23:42:38 +00:00
Faith Ekstrand
e0d907f56f nvk: Rework descriptor set binding
This prepares us for VK_EXT_graphics_pipeline_library by allowing null
descriptor sets to be bound and handling holes in pipeline layouts.  We
also add a set_dynamic_buffer_start map to the root descriptor table
which says where in dynamic_buffers each set starts.  This can be used
by the pipeline layout lowering in the case where we can't statically
the dynamic buffer index for a binding.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27048>
2024-01-12 23:42:38 +00:00
Faith Ekstrand
a11adbe408 nvk: Use s instead of set_idx in CmdBindDescriptorSets
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27048>
2024-01-12 23:42:38 +00:00
Faith Ekstrand
2d5c04ee4a nvk: Return an nvk_cbuf_map from nvk_lower_nir()
There's no need to pass in the whole shader when the only part we're
going to write is the cbuf map.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27048>
2024-01-12 23:42:38 +00:00
Faith Ekstrand
f62b5582ea nvk: Add an explicit mapping from shader stages to cbuf bindings
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27048>
2024-01-12 23:42:38 +00:00
Juan A. Suarez Romero
8120360358 Revert "v3d: show warning on creating a v3d screen on real hw"
There are paths were a v3d screen can be created instead of vc4 screen,
in a real rpi4 hardware. For instance, in the CI itself.

So assuming that it was only possible with the simulator was wrong.

This reverts commit c31be1f4ba.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27047>
2024-01-12 23:03:06 +00:00
Jesse Natalie
4cb9c77e8e mesa: Consider mesa format in addition to internal format for mip/cube completeness
Prior to 06b526de, the mesa format was used for these completeness checks.
That was to address the case where a *different* internal format selected
the *same* mesa format, and the texture shouldn't be considered compatible.
But this didn't address the case where the *same* internal format selected
a *different* mesa format, e.g. because the type passed to the TexImage
API was different.

An old WGL demo app called TexFilter.exe tries to redefine a mipped RGBA16
texture as RGBA8. This incorrect logic caused Mesa to try to copy the RGBA16
data from the smaller mips into the newly created RGBA8 data, because it
thought that the texture was still mip-complete, despite the format changing.

Cc: mesa-stable
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27023>
2024-01-12 22:26:27 +00:00
Karol Herbst
75ff6ca470 clc: add support for the native spir-v backend
This allows us to easily test if the LLVM SPIR-V backend is viable to
replace the translator.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26955>
2024-01-12 21:58:37 +00:00
Karol Herbst
22fa315ee0 clc: use spirv triple starting with llvm-17
It's supported since a while and shouldn't regress anything.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26955>
2024-01-12 21:58:37 +00:00
José Roberto de Souza
49fe060b5f anv: Fix PAT entry for userptr in integrated GPUs
Fixes: 060439bdf0 ("anv: Add ANV_BO_ALLOC_IMPORTED")
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27040>
2024-01-12 21:32:49 +00:00
Mike Blumenkrantz
8929257352 zink: use maint6 for multi-layer compressed surface creation
this should speed up multi-layer copying

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26953>
2024-01-12 21:05:26 +00:00
Mike Blumenkrantz
33282e7504 zink: hook up maint6
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26953>
2024-01-12 21:05:26 +00:00
Mike Blumenkrantz
4ccc91de17 zink: use local screen variable in surface creation
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26953>
2024-01-12 21:05:26 +00:00
Caio Oliveira
1a31970946 intel/compiler/xe2: Implement instruction compaction for DPAS.
These use different tables but map to the same bits, so it is just
a matter of picking the right tables for the instruction.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
6e56a4b474 intel/compiler/xe2: Fix for the removal of AccWrCtrl.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
7f39e51dd5 intel/compiler/xe2: Add extra flag registers.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
f974eacab3 intel/compiler/xe2: Fix for the removal of most predication modes.
Reworks:
* Remove changes to fixup_nomask workaround since it applies only for
  Gfx12 family.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
f79123e1d9 intel/compiler/xe2: Fix for NibCtrl field removal.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
7db3f0b1c1 intel/compiler/xe2: Implement instruction compaction.
Reworks:
* Handle DPAS in has_3src_unmapped_bits.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
57ba9c176c intel/compiler/xe2: Implement codegen of compact instructions.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
d8ba1d63bc intel/compiler: Add assume() checks to brw_compact_inst_(set_)bits().
Similar to the preconditions of brw_inst_(set_)bits().

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
4a24f49b57 intel/compiler/xe2: Implement codegen of three-source instructions.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
e10e7d5aa3 intel/compiler/xe2: Implement codegen of indirect immediates.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
294bdbb253 intel/compiler/xe2: Implement codegen of 2-source instruction operands.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
72bbfa8e8d intel/compiler/xe2: Implement codegen of general instruction controls.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Francisco Jerez
066e6c6234 intel/compiler/xe2: Add Xe2 bounds to FF() macro.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
2024-01-12 20:18:03 +00:00
Yiwei Zhang
ecd50e70d4 venus: populate oom from ring submit alloc failures
ring_seqno_valid indicates a successful ring cmd submission, and can be
used to avoid invalid reply decoding due to failed submit alloc.
Otherwise, the garbled VkResult will mislead into initialization failure
instead of oom.

Below cts failure is fixed:
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic

Fixes: ec131c6e55 ("venus: use instance allocator for ring allocs")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27026>
2024-01-12 19:56:34 +00:00
Yiwei Zhang
12d428bc68 venus: avoid redundant layout transition for optimal internal layout
This ensures no extra barriers when internal layout is wsi layout.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27020>
2024-01-12 19:34:56 +00:00
Matt Turner
5b7c733902 util/tests: Disable half-float NaN test on hppa/old-mips
Bug: https://bugs.gentoo.org/908079
Fixes: 067023dce2 ("util: Add some unit tests of the half-float conversions.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26991>
2024-01-12 17:47:55 +00:00
Matt Turner
0540c9de44 util: Add DETECT_ARCH_HPPA macro
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26991>
2024-01-12 17:47:55 +00:00
Corentin Noël
68f5277887 glsl: Make sure that the variable is a ir_variable before unreferencing it
While it technically was already only using an ir_instruction field, better make
sure that it is effectively an ir_variable using the dedicated method instead of
relying on an undefined behavior.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26144>
2024-01-12 17:11:57 +00:00
Corentin Noël
d9c4ccf56d glsl: Make sure to not cast ir_dereference_variable into ir_variable
The parameter_lists_match_exact function was wrongly assuming that all the
elements were ir_variable when there can also be ir_dereference_variable elements.

Add case taking this into account.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26144>
2024-01-12 17:11:57 +00:00
Dmitry Osipenko
b9ad22d24e virtio/vdrm: Fix lockup in vdrm_host_sync()
The vdrm_execbuf() missed to set the seqno field for requests sent to host.
This causes vdrm_host_sync() to lock up due to the unset seqno in a case
where two or more threads are using vdrm_execbuf() and vdrm_send_req()
concurrently, like in this scenario:

	thread1: vdrm_send_req()  shmem->seqno=1 req->seqno=2
	thread2: vdrm_execbuf()   shmem->seqno=1 req->seqno=0
	thread1: vdrm_host_sync() shmem->seqno=0 req->seqno=2

Fix the lockup by setting the seqno in vdrm_execbuf().

Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27021>
2024-01-12 16:53:59 +00:00
Derek Foreman
2fa1979c66 egl/wayland: Fix possible buffer leak
If we have to wait for a buffer to be released in swrast_update_buffers(),
we can leak it.

Take care to reuse the existing buffer if one is still available.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26761>
2024-01-12 15:16:31 +00:00
Pierre-Eric Pelloux-Prayer
e2f39e8aca Revert "ci/radeonsi: disable VA-API testing on raven"
This reverts commit 9017852de4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26947>
2024-01-12 14:42:55 +00:00
Pierre-Eric Pelloux-Prayer
4e76c4ecb4 radeonsi: compute epitch when modifying surf_pitch
In the linear case with no mipmaps addrlib sets epitch to surf_pitch - 1
so lets do the same thing here.

The change in si_descriptors.c looks like it's papering over a bug but I
couldn't find any other changes that wouldn't break at least one use case.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10375
Fixes: 115b61e51f ("ac/surface: don't oversize surf_size")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26947>
2024-01-12 14:42:55 +00:00
Tapani Pälli
810c1f7747 hasvk: remove gfx9 specific cs stall from emit_ps_depth_count
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26997>
2024-01-12 14:01:08 +00:00
Tapani Pälli
30c148fd16 hasvk: remove softpin (GFX_VERx10 >= 90) related code
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26997>
2024-01-12 14:01:08 +00:00
Tapani Pälli
ed2743258a hasvk: remove gfx9 specific code from emit_sample_pattern
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26997>
2024-01-12 14:01:08 +00:00
Tapani Pälli
4d3d3a495f hasvk: remove cmd_buffer_ray_query_globals function decl
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26997>
2024-01-12 14:01:08 +00:00
Job Noorman
b4015a1894 tu: support l1 dcache size on musl
musl doesn't support _SC_LEVEL1_DCACHE_LINESIZE so calculate the size
manually like on Bionic.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27031>
2024-01-12 13:21:10 +00:00
Rohan Garg
91798bab2d anv: refactor emit_dynamic_buffer_binding_table_entry
Refactor emit_dynamic_buffer_binding_table_entry to emit a null surface
state when the descriptor has no assocaited buffers allowing us to drop
the same check elsewhere.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27005>
2024-01-12 11:55:41 +00:00
Juan A. Suarez Romero
49794473c7 v3d/vc4/ci: reset the list of timeout tests
Check all the timeout tests in the skip list to remove those that are
not timeout anymore, and add new ones.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27027>
2024-01-12 09:33:39 +00:00
Daniel Schürmann
09413ff745 aco/insert_exec_mask: only create loop phis for exec mask if necessary
Totals from 195 (0.25% of 79242) affected shaders: (GFX11)

Instrs: 476457 -> 476031 (-0.09%); split: -0.23%, +0.14%
CodeSize: 2453964 -> 2452108 (-0.08%); split: -0.23%, +0.16%
SpillSGPRs: 944 -> 913 (-3.28%); split: -3.39%, +0.11%
SpillVGPRs: 838 -> 835 (-0.36%); split: -0.95%, +0.60%
Latency: 10811026 -> 10810125 (-0.01%); split: -0.08%, +0.07%
InvThroughput: 2276677 -> 2276698 (+0.00%); split: -0.12%, +0.12%
VClause: 9223 -> 9233 (+0.11%); split: -0.10%, +0.21%
SClause: 9025 -> 9005 (-0.22%); split: -0.38%, +0.16%
Copies: 67419 -> 67382 (-0.05%); split: -0.97%, +0.92%
PreSGPRs: 10830 -> 10668 (-1.50%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26937>
2024-01-12 09:05:15 +00:00
Daniel Schürmann
e83d8e1366 aco/insert_exec_mask: replace phi for loop restore mask with explicit copies
Totals from 1785 (2.25% of 79242) affected shaders: (GFX11)

Instrs: 6787574 -> 6787041 (-0.01%); split: -0.01%, +0.00%
CodeSize: 34906500 -> 34904704 (-0.01%); split: -0.01%, +0.01%
SpillSGPRs: 5848 -> 5816 (-0.55%)
Latency: 88616877 -> 88617209 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 16644948 -> 16644717 (-0.00%); split: -0.00%, +0.00%
VClause: 141122 -> 141121 (-0.00%)
SClause: 178929 -> 178906 (-0.01%); split: -0.03%, +0.02%
Copies: 569444 -> 569081 (-0.06%); split: -0.09%, +0.03%
Branches: 186980 -> 186961 (-0.01%); split: -0.01%, +0.00%
PreSGPRs: 133648 -> 133369 (-0.21%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26937>
2024-01-12 09:05:15 +00:00
Daniel Schürmann
d375d297cf aco/insert_exec_mask: unify exec restore code after divergent control flow
No fossil-db changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26937>
2024-01-12 09:05:15 +00:00