This splits rendering into two passes when front and back stencil
reference value, value mask, or write mask don't match.
The advantages of doing it in the driver instead of in st are:
* SWTCL is executed just once and the resulting vertex buffer is reused
in the second pass.
* Lower driver overhead due to the fallback being very close to
the actual draw emission with minimum state change.
As per Radeon 9700 Opengl Programming and Optimization Guide [1], there are
16 texture units even on the first r300 chipsets. If you think I am wrong,
feel free to propose a patch.
[1] Here's PDF: http://people.freedesktop.org/~mareko/
The tiling setup needs a bit of work, but this should be good enough for now,
when we get buffers from the kernel we need to store their tiling properties.
Signed-off-by: Dave Airlie <airlied@redhat.com>
there's no good way of aligning the output's, and since the vertex_header
is variable sized in the first place we need to extract elements from a vector
and store them individually into an array. this gets the basic examples working
again
With an Intel 855GM handled by intel_drv, there's a crash with Gallium3D
enabled DRI driver for Intel i915 (--enable-gallium-intel).
The Gallium3D driver doesn't support the 855GM as expected by
intel_drv, it failed to open the screen and give an half
initialized screen structure to dri_destroy_option_cache():
optionCache.info is NULL, so it's crashing while trying
to free array content. This patch at least fix the crash in the function.
Here's some logs of the fixed version:
[ 16274.137] LoaderOpen(/opt/mesa/lib/xorg/modules/drivers/intel_drv.so)
[ 16274.139] (II) Loading /opt/mesa/lib/xorg/modules/drivers/intel_drv.so
[ 16274.183] (II) Module intel: vendor="X.Org Foundation"
[ 16274.183] compiled for 1.8.0, module version = 2.11.0
[ 16274.183] Module class: X.Org Video Driver
[ 16274.183] ABI class: X.Org Video Driver, version 7.0
[ 16274.183] (II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
E7221 (i915), 915GM, 945G, 945GM, 945GME, Pineview GM, Pineview G,
965G, G35, 965Q, 946GZ, 965GM, 965GME/GLE, G33, Q35, Q33, GM45,
4 Series, G45/G43, Q45/Q43, G41, B43, Clarkdale, Arrandale
[ 16274.382] (II) intel(0): Integrated Graphics Chipset: Intel(R) 855GME
[ 16274.382] (--) intel(0): Chipset: "852GM/855GM"
[ 16276.675] (II) intel(0): [DRI2] Setup complete
[ 16276.675] (II) intel(0): [DRI2] DRI driver: i915
debug_get_option: GALLIUM_TRACE = (null)
debug_get_bool_option: GALLIUM_RBUG = FALSE
debug_get_bool_option: INTEL_DUMP_CMD = FALSE
i915_create_screen: unknown pci id 0x3582, cannot create screen
dri_init_screen_helper: failed to create pipe_screen
[ 16276.794] (EE) AIGLX error: Calling driver entry point failed
[ 16276.794] (EE) AIGLX: reverting to software rendering
[ 16276.794] (II) AIGLX: Screen 0 is not DRI capable
[ 16276.796] (II) AIGLX: Loaded and initialized /opt/mesa/lib/dri/swrast_dri.so
[ 16276.796] (II) GLX: Initialized DRISWRAST GL provider for screen 0
Signed-off-by: Yann Droneaud <yann@droneaud.fr>
Reviewed-by: Corbin Simpson <MostAwesomeDude@gmail.com>
MAXWIDTH/HEIGHT were 2048 but the max texture size was 4096.
This caused a crash if a 4Kx4K texture was created and rendered to.
See comment about max framebuffer size in lp_scene.h.
Also added assertions to catch this inconsistancy in the future.
