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Author SHA1 Message Date
Marek Olšák
0482ff3158 radeonsi: don't do image stores with RGBX, L, LA, I, and SRGB formats 
The only change in behavior is that RGBX stores now overwrite X, which is
what CB does and it's faster.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
b42a4a7f07 radeonsi: remove compute-based DCC decompression because it's broken 
The new blit test discovered that it doesn't always work.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
9da309a7f4 radeonsi: add common helper si_launch_grid_internal_images that is more robust 
It does things in the correct order, which isn't easy to get right.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
2a854647c0 radeonsi: make si_launch_grid_internal static 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
233b4271dc radeonsi: call pipe->blit instead of util_blitter_blit after MSAA resolving 
This fixes a problem where the destination has a DCC-incompatible view
format and triggers a DCC decompression using a custom u_blitter path, which
is disallowed inside u_blitter due to it being a u_blitter recursion that
always crashes.

This is also better because we'll get the best codepath (u_blitter or
compute) instead of just u_blitter,

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
922f54a0c8 radeonsi: move SI_MAX_VRAM_MAP_SIZE to si_debug_options.h 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
38cd2a610a radeonsi: unify VGT_TESS_DISTRIBUTION programming 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
5c0b0f0058 ac/surface: don't forbid 256KB swizzle modes on smaller gfx11 chips 
let addrlib make the right choice

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
2c25dd0f27 amd/addrlib: fix 3D texture allocation failures on gfx11 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
2208ff7a5b util/format: add util_format_rgbx_to_rgba helper 
Image stores don't like RGBX on AMD. This is required by compute blits.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17864>
 2022-08-03 00:57:16 +00:00
Marek Olšák
91a3a38d5c glthread: don't sync on IsEnabled(GL_DEPTH_TEST) by tracking it in glthread 
Discovered with viewperf.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17781>
 2022-08-03 00:14:33 +00:00
Marek Olšák
a4ee818b18 glthread: don't ignore glPushAttrib/glPopAttrib when tracking GL_CULL_FACE 
Fixes: f4348ef60d - glthread: don't sync for glIsEnabled with a few enums

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17781>
 2022-08-03 00:14:33 +00:00
Gert Wollny
51a8e9feb5 r600: increase possible stack size in binary code 
With the trace posted in #6969 we get a nesting level of 149,
so make it a round 256 of stack entries.

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6969

Fixes: a4840e15ab
  r600: Use nir-to-tgsi instead of TGSI when the NIR debug opt is disabled.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17849>
 2022-08-03 00:05:08 +00:00
Rob Clark
3f5d84fb37 freedreno/registers/a6xx: Some reg64 conversion 
Reduce the spurious delta from a7xx regs.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
73ca381d7a freedreno/registers: Move varset to <enum> 
De-noisify the enum values that are generation specific.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
0cd8ce6ce3 freedreno/registers: Allow varset to be specified on enum 
It gets a bit repetitive to specify the same varset on each value.  The
rnn decode already handles it when specified on the enum, we just need
to relax the schema to allow this.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
98b84ef286 freedreno/registers: Whitespace fix for gen_header.py 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
ba85272cb6 freedreno/ci: Update unit test reference decodes 
Apparently we aren't running unit tests in CI?

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
7381e06d81 freedreno: Use enum for primtypes table 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
d6e4b1982b freedreno/a6xx: De-open-code CACHE_FLUSH enum 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
7a62f6e3a3 freedreno/drm: Combine upper and lower 32b of OR val 
The original reason it was split was because of libdrm ABI.  But that no
longer applies since we pulled it into mesa.

While we are at it, remove the c++ workaround.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
cccadf7db6 freedreno/autotune: Make 'offset' macro "private" 
Otherwise it conflicts with glsl_types.h DEFAULT_CONSTRUCTOR when
included from a c++ file.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
4490387ea8 freedreno/ir3: Remove unneeded forward declaration 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
8e8b7562c6 freedreno: Extract common helper macros 
De-duplicate some macros that had been copy/pasta'd around, etc.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
f1503e34df freedreno/a6xx: Fix enum tag 
This wasn't meant to be a variable.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Rob Clark
57c03bdf14 freedreno/a6xx: Remove fd6_format.[ch] 
Just use the fdl6 version of the one remaining helper.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17817>
 2022-08-02 23:46:15 +00:00
Alyssa Rosenzweig
07e9543270 pan/decode: Fix overrun decoding planes 
We need to calculate the # of descriptors like we do on Midgard.

Fixes: ae9316f812 ("pan/decode: Decode Valhall surface descriptor")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17842>
 2022-08-02 21:11:06 +00:00
Jason Ekstrand
3225d60685 vulkan: Improve the docs for vk_subpass_info 
Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17858>
 2022-08-02 19:20:23 +00:00
Jason Ekstrand
378b398da7 vulkan: Always populate vk_render_pass_state::render_pass 
This way drivers can at least see whether dynamic rendering is being
used or not even if they use vk_render_pass.  Dynamic rendering only
drivers are expected to ignore those fields anyway.

Reviewed-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17858>
 2022-08-02 19:20:23 +00:00
Christian Gmeiner
d5cd8f18c2 etnaviv: Move nir_shader_compiler_options to compiler 
It fits there much better and is an other step to get the
compiler to common code.

Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17819>
 2022-08-02 19:10:55 +00:00
David Heidelberg
5a000b4eb6 ci: set reasonable amount of wget retries for each download 
Acked-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Guilherme Gallo <guilherme.gallo@collabora.com>
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17655>
 2022-08-02 17:35:46 +02:00
Filip Gawin
875ee25e98 r300: don't read from output transform_r300_vertex_SEQ/SNE 
Native rewrite in current form doesn't check
type of register and may use output as a
temp.

Helps with 218 deqp-gles2 tests.

Cc: mesa-stable

Reviewed-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17736>
 2022-08-02 15:09:03 +00:00
Konstantin Seurer
19f8d33876 radv: Use vk_descriptor_set_layout 
Use the common ref counting and the common destroy entrypoint.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17818>
 2022-08-02 14:16:14 +00:00
Konstantin Seurer
da2233a108 vulkan: Handle descriptor set layout alloc fails 
Fixes: 949ce92 ("vulkan: Add a base struct for descriptor set layouts")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17818>
 2022-08-02 14:16:14 +00:00
Konstantin Seurer
ae64b7a08c vulkan: Fix descriptor set layout allocation scope 
Fixes: 949ce92 ("vulkan: Add a base struct for descriptor set layouts")
Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17818>
 2022-08-02 14:16:14 +00:00
Mykhailo Skorokhodov
8b13acd715 anv: Move Wa_1806527549 and enable by default 
Move Wa_1806527549 into `init_render_queue_state` and
set HIZ_CHICKEN (7018h) bit = 1 by default.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6717
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17778>
 2022-08-02 16:33:10 +03:00
Mykhailo Skorokhodov
6498328210 iris: Move Wa_1806527549 and enable by default 
Move Wa_1806527549 into `iris_init_render_context` and
set HIZ_CHICKEN (7018h) bit = 1 by default for TGL.

Cc: mesa-stable
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17778>
 2022-08-02 16:33:10 +03:00
Danylo Piliaiev
188d1e2b20 freedreno: WFI after PC_TESSFACTOR_ADDR update 
Updating PC_TESSFACTOR_ADDR could race with the next draw which uses it.

Don't know any failures in tests.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17833>
 2022-08-02 12:34:34 +00:00
Danylo Piliaiev
18573e4058 tu: WFI after PC_TESSFACTOR_ADDR update 
Updating PC_TESSFACTOR_ADDR could race with the next draw which uses it.

Fixes GL CTS tests running via Zink:
 KHR-Single-GL46.enhanced_layouts.glsl_contant_values
 KHR-GLES32.core.tessellation_shader.tessellation_shader_point_mode.point_rendering
 KHR-GLES32.core.tessellation_shader.winding.quads_cw
 KHR-GLES32.core.tessellation_shader.winding.triangles_cw

And probably more.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6815

Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17833>
 2022-08-02 12:34:34 +00:00
Lionel Landwerlin
8c9dd9e783 intel/dev: remove INTEL_DEVID_OVERRIDE 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
 2022-08-02 11:17:58 +00:00
Lionel Landwerlin
7f82ab7104 intel/dev: add a test verifying that device override works 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
 2022-08-02 11:17:58 +00:00
Lionel Landwerlin
9d55c5237e intel/tools/stub: fixup parsing of --platform= 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
 2022-08-02 11:17:58 +00:00
Lionel Landwerlin
f2bbc959a0 intel/tools/drm-shim: fixup eu_stride for topology 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
 2022-08-02 11:17:58 +00:00
Lionel Landwerlin
186ff4696a intel/dev: move verification function to a header 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17831>
 2022-08-02 11:17:58 +00:00
Lionel Landwerlin
6931ae83ce anv: decode init batch with INTEL_DEBUG=bat 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17852>
 2022-08-02 10:42:26 +00:00
Feng Jiang
2926a1aa76 virgl: do not share virgl_screen between different drm_files 
Now, only one instance of virgl_screen exists for a device
(/dev/dri/cardX), and it is shared by different frontends (eg GLX,
GBM, etc.). There is a problem with this, as follows:

  /* Init GLX */
  ...
  glXCreateContext(...);
  ...

  /* GBM */
  gbm_fd = open("/dev/dri/card0", O_RDWR);
  dev = gbm_create_device(gbm_fd);
  bo = gbm_bo_create(dev, ...);
  plane_handle = gbm_bo_get_handle_for_plane(bo, ...);
  drmPrimeHandleToFD(gbm_fd, handle.u32, flags, &plane_fd);

The above drmPrimeHandleToFD() call will fail with ENOENT.
The reason is that GBM and GLX share the same virgl_screen (file
descriptor), and it is not gbm_fd that is used to create gbm_bo,
but other fd (opened during GLX initialization). Since the scope
of prime handle is limited to drm_file, the above plane_handle is
invalid under gbm_fd.

By canceling the sharing of virgl_screen between different drm_files,
GBM can use the correct fd to create resources, thereby avoiding the
problem of invalid prime handle.

Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16738>
 2022-08-02 10:30:08 +00:00
Marcin Ślusarz
883acc4150 intel/compiler: use NIR_PASS more 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17619>
 2022-08-02 10:07:05 +00:00
Marcin Ślusarz
7ebae85955 intel/compiler: insert URB fence before task/mesh termination 
Bspec 53421 says:
"A URB fence memory is typically performed prior the thread
exit message, so that the next thread dispatch that reads
that URB memory will see it."

Cc: 22.1 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16665>
 2022-08-02 09:31:24 +00:00
Marcin Ślusarz
30c0f2bfbb intel/compiler: there are 4 types of fences on gfx >= 12.5 
Found by code inspection.

There's an assert later checking that we haven't overflown
this array, so this change probably doesn't matter for any
workload.

Cc: 22.1 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16665>
 2022-08-02 09:31:24 +00:00
Marcin Ślusarz
2bd148c990 intel/compiler: emit URB fences for TASK/MESH 
Cc: 22.1 <mesa-stable>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16665>
 2022-08-02 09:31:24 +00:00