Commit Graph

199830 Commits

Author SHA1 Message Date
Marek Olšák
2807259a18 st/mesa: switch Z/S DrawPixels shaders to IO intrinsics
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:18 +00:00
Marek Olšák
135c9fa7b6 st/mesa: unlower IO for internal shaders if needed
This will be required because all internal shaders will be converted
to IO intrinsics.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:18 +00:00
Marek Olšák
7e39045733 st/mesa: switch ATI_fs to IO intrinsics
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:18 +00:00
Marek Olšák
40848ba97e st/mesa: use IO intrinsics in st_nir_lower_position_invariant
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:18 +00:00
Marek Olšák
02b7396568 st/mesa: use IO intrinsics in st_nir_lower_fog
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:18 +00:00
Marek Olšák
a408c0aa2b st/mesa: run DCE before st_unlower_io_to_vars
Some lowering passes can leave dead code behind, but dead IO intrinsics
are still counted as enabled IO, which breaks things.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:18 +00:00
Marek Olšák
3f7911e7d3 st/mesa: fold st_translate_prog_to_nir into prog_to_nir
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:18 +00:00
Marek Olšák
49f737bc14 mesa: remove unused PROGRAM_WRITE_ONLY
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:18 +00:00
Marek Olšák
14956aa0f2 mesa: remove unused PROGRAM_SYSTEM_VALUE
ARB_vp/fp don't have system values.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:17 +00:00
Marek Olšák
ee8916c414 nir: use IO intrinsics in nir_lower_drawpixels
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:17 +00:00
Marek Olšák
0de28a9fd0 nir: use IO intrinsics in nir_lower_bitmap
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:17 +00:00
Marek Olšák
a7ad1b302b nir: remove redundant option linker_ignore_precision
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:17 +00:00
Marek Olšák
730c8d506f nir: flip the early exit condition in nir_lower_io_temporaries
no change in behavior other than skipping COMPUTE as well.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:17 +00:00
Marek Olšák
7b55ee999d nir: don't set num_slots/src/dest_type/write_mask when they're set automatically
to those values

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:17 +00:00
Marek Olšák
55a4a8a2a8 nir: set src_type and dest_type to float implicitly for IO build helpers
If you want to set it to int/uint, set .src_type or .dest_type. If you want
to set it to float, you don't need to set the type at all. It's implicitly
set to float.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:17 +00:00
Marek Olšák
b9f9d001d7 nir: set nir_io_semantics::num_slots to at least 1 in build helpers
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32779>
2025-01-06 19:09:17 +00:00
José Roberto de Souza
7ac9ac0f93 anv: Allow larger SLM sizes for task and mesh shader
It was hard-coded to 64k but Xe2 platforms and newer supports
larger SLM sizes.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Dylan Baker <dylan.c.baker@intel.com>
Cc: mesa-stable
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32874>
2025-01-06 18:31:20 +00:00
Konstantin Seurer
378fd38e1d llvmpipe: Move max_anisotropy to static sampler state
Applications typically use one globak max_anisotropy value.
Moving it to static state should save a could of instructions.

Reviewed-by: Aleksi Sapon <aleksi.sapon@autodesk.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31748>
2025-01-06 18:00:18 +00:00
Konstantin Seurer
0797a14c52 llvmpipe: Remove unused AF code
The table and some other parameters are not used.

Reviewed-by: Aleksi Sapon <aleksi.sapon@autodesk.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31748>
2025-01-06 18:00:18 +00:00
Konstantin Seurer
350a0fe632 llvmpipe: Use a simpler and faster AF implementation
This is based on the example given by the Vulkan specification: https://registry.khronos.org/vulkan/specs/1.3-extensions/html/vkspec.html#textures-texel-anisotropic-filtering

The basic idea is to compute the axis in which the uv coordinates
change the fastest in screen space (rho_y and rho_y). If rho_x is larger
than rho_y, samples are summed up along the x-Axis and the y-Axis
viceversa. The x/y offsets are mapped back into texture (u/v) space
using a linear approximation of u(x,y) and v(x,y).

This approach does not use a nested loop and the number of samples is
basically limited to max_anisotropy (+/-). The sample count of the
previous approach could explode in some situations, leading to
frametimes >1s.

Reviewed-by: Aleksi Sapon <aleksi.sapon@autodesk.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31748>
2025-01-06 18:00:18 +00:00
Konstantin Seurer
7279e47521 llvmpipe: Disable anisotropic filtering for explicit lod
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31748>
2025-01-06 18:00:18 +00:00
Icenowy Zheng
70fa598696 zink: do not set transform feedback bits when not available
Currently the list of buffer usage bits specified is hardcoded with
transform feedback bits, which leads to a validation layer error report
with ID VUID-VkBufferCreateInfo-None-09499 when EXT_transform_feedback
is not available.

Only set these bits when EXT_transform_feedback extension is really
available to suppress this error.

Cc: mesa-stable
Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32386>
2025-01-06 15:19:46 +00:00
Pavel Ondračka
c179a7dde4 r300/ci: update CI expectations
One new rv410 flake and one new rv530 fail which I can't reproduce
locally. Also remove the vs-varying-array-mat3* flakes, those were
failing because we run out of varyings, however this should no longer be
an issue since nir_opt_varyings was enabled for everyone.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32897>
2025-01-06 13:26:56 +00:00
Kenneth Graunke
4ab04799ee brw: Delete assign_constant_locations and push_constant_loc[]
The push_constant_loc[] array is always an identity mapping these days,
so it's kind of pointless.  Just use the original uniform number and
skip the unnecessary "remap" step.  With that gone, and shrinking UBO
ranges gone, assign_constant_locations() is now empty and can be removed
as well.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32841>
2025-01-06 12:45:47 +00:00
Kenneth Graunke
93e186e1a4 brw: Delete pull constant lowering
Now that we never shrink ranges in the backend, we never lower push
constants to pull constants late in the backend either.  get_pull_loc
will never return true, and so all of brw_lower_constant_loads becomes
a noop.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32841>
2025-01-06 12:45:47 +00:00
Kenneth Graunke
1ab4fe2dd6 brw: Don't shrink UBO push ranges in the backend
Back in the bad old days (vec4?) we had a bunch of smarts in the backend
to dead code eliminate unused vector components and re-pack regular
uniforms, so we really couldn't decide how much data we were pushing
until very late in the backend.  Nowadays we have none of that - we do
all of our elimination and packing in NIR.  anv shrinks ranges to deal
with Vulkan API push constants, and iris treats everything as a UBO and
as of the previous commit will also shrink appropriately.

So we don't need to do this anymore...which will let us simplify quite
a bit of code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32841>
2025-01-06 12:45:47 +00:00
Kenneth Graunke
583ad35455 brw: Limit maximum push UBO ranges to 64 registers in the NIR pass.
anv already does this limiting, since it needs to handle non-UBO push
constants as well.  iris treats everything as a UBO, but doesn't have
a limiter and was relying on the backend to handle it.

Do this in the NIR pass so that we can eliminate the backend code.
It's not necessary for anv, but handling it here is simple and less
error prone for iris, which calls this in a number of places.  We know
we need to limit things to this much; anv can limit more if needed.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32841>
2025-01-06 12:45:47 +00:00
Feng Jiang
96c8eb64f0 virgl: Ensure that PIPE_SHADER_CAP_MAX_CONST_BUFFERS is less than PIPE_MAX_CONSTANT_BUFFERS
The value of the PIPE_SHADER_CAP_MAX_CONST_BUFFERS parameter should be
less than PIPE_MAX_CONSTANT_BUFFERS, otherwise, it will lead to some
assert failures. For example:

    void
    cso_unbind_context(struct cso_context *cso)
    {
    ...
        int maxsam = scr->get_shader_param(scr, sh,
                                           PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS);
        int maxview = scr->get_shader_param(scr, sh,
                                            PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS);
        int maxssbo = scr->get_shader_param(scr, sh,
                                            PIPE_SHADER_CAP_MAX_SHADER_BUFFERS);
        int maxcb = scr->get_shader_param(scr, sh,
                                          PIPE_SHADER_CAP_MAX_CONST_BUFFERS);
        int maximg = scr->get_shader_param(scr, sh,
                                          PIPE_SHADER_CAP_MAX_SHADER_IMAGES);
        assert(maxsam <= PIPE_MAX_SAMPLERS);
        assert(maxview <= PIPE_MAX_SHADER_SAMPLER_VIEWS);
        assert(maxssbo <= PIPE_MAX_SHADER_BUFFERS);
        assert(maxcb <= PIPE_MAX_CONSTANT_BUFFERS); // Crash here
        assert(maximg <= PIPE_MAX_SHADER_IMAGES);
    ...
    }

Signed-off-by: Feng Jiang <jiangfeng@kylinos.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32889>
2025-01-06 12:18:20 +00:00
Martin Roukala (né Peres)
f1a6af133a radeonsi/ci: run a fraction of glcts-vangogh in pre-merge
Now that ACO has become the default on pre-RDNA GPUs, all pre-merge CI
coverage of radeonsi+LLVM has disapeared. Let's fix this by making
our post-merge glcts-vangogh-valve job run inpre-merge pipelines.

However, we are limited in vangogh capacity, so rather than running the
full glcts/piglit test suites we run a fraction of it to stay under 15
minutes of execution time on a single Steam Deck.

Suggested-by: Marek Olšák <maraeo@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32865>
2025-01-06 11:55:22 +00:00
Martin Roukala (né Peres)
0c538f82bc radeonsi/ci: run on ACO changes
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32865>
2025-01-06 11:55:22 +00:00
Martin Roukala (né Peres)
bec7f09e76 radeonsi/ci: update the vangogh expectations
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Valentine Burley <valentine.burley@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32865>
2025-01-06 11:55:21 +00:00
Tapani Pälli
b1b1a4ef91 iris: initialize whole pipe_box struct for memcmp
Z and depth fields were given to memcmp uninitialized.

CID: 1637431
Fixes: 1fc82ee558 ("iris: Add support for damage region")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32857>
2025-01-06 09:18:52 +00:00
Tapani Pälli
72351afe24 anv: handle mesh in sbe_primitive_id_override
This prevents crashes seen in some upcoming cts tests.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32861>
2025-01-06 08:41:18 +00:00
David Rosca
36bedf6c80 frontends/va: Get buffer feedback with locked mutex in MapBuffer
Fixes: 93d434362b ("frontends/va: Move encode fence to coded buffer")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12344

Tested-by: Benjamin Cheng <benjamin.cheng@amd.com>
Reviewed-by: David (Ming Qiang) Wu <David.Wu3@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32761>
2025-01-06 08:19:08 +00:00
Hyunjun Ko
5ecea6ec4a anv: handle negative value of slot index for h265 decoding.
Fixes: 8d519eb5 ("anv: add initial video decode support for h265")
Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32823>
2025-01-06 01:02:14 +00:00
Hyunjun Ko
168298b891 anv: Enable remapping picture ID
Fix to handle 16 refs.

v1. handle the case where a slot index is negative.
(Lionel Landwerlin <lionel.g.landwerlin@intel.com>)

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32823>
2025-01-06 01:02:14 +00:00
Hyunjun Ko
9221feaf79 anv: define ANV_VIDEO_H264_MAX_DPB_SLOTS
prep work for remapping slot ids for h264 decoding.

Signed-off-by: Hyunjun Ko <zzoon@igalia.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32823>
2025-01-06 01:02:13 +00:00
Erik Faye-Lund
61593e9c54 pan/ci: update opencl expectations
It's not entirely clear to me why this has moved from Crash/Fail to
Pass, the only thing I can see in the commit history between the last
nightly pass and failure is an optimization of unpacing 8-bit values
from a 64-bit value. It's a bit suspicious that an optimization makes
somethign pass...

But we need to have correct CI expectations, otherwise we won't notice
new failures. So let's update to the new reality, and debug this if the
problem reappears in the future.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32833>
2025-01-05 07:44:04 +00:00
Erik Faye-Lund
f313b33d13 pan/ci: update t760 checksum
Looks like this changed when IO-lowering was changed in the GLSL
linker, but because the traces job here runs post-merge, it wasn't
noticed at the time.

There's only a single pixel that has changed, from a very dark color to
another very dark color. Neigher the before nor after images looks
obviously more correct than the other.

Fixes: 73d675451b ("ci: update fail lists and trace checksums")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32833>
2025-01-05 07:44:04 +00:00
David Rosca
e33452a6d3 ac/surface: Don't force linear for VIDEO_REFERENCE with emulated image opcodes
This caused regression by using higher pitch than needed on compute-only
devices, resulting in video decode errors.

Fixes: 308bae950f ("ac/surface: Add RADEON_SURF_VIDEO_REFERENCE")
Tested-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32863>
2025-01-04 09:13:44 +00:00
Rob Clark
fb59a9fb08 freedreno/a6xx: Use LATE_Z with OC + discard
If occlusion query is used, and the FS discards samples, we need to use
LATE_Z in order to get the sample count after the FS.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32869>
2025-01-04 02:52:41 +00:00
Lionel Landwerlin
98cdb9349a anv: ensure null-rt bit in compiler isn't used when there is ds attachment
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 15987f49bb ("anv: avoid setting up a null RT unless needed")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/12396
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32867>
2025-01-03 23:12:22 +00:00
Caio Oliveira
6968794c50 intel/brw: Add missing bits in 3-src SWSB encoding for Xe2+
Fix invalid SWSB annotation in dEQP-VK.glsl.builtin.precision.mix.mediump.vec4 for LNL.

Fixes: 4a24f49b57 ("intel/compiler/xe2: Implement codegen of three-source instructions.")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32846>
2025-01-03 21:19:26 +00:00
Benjamin Lee
51b0bad30b panfrost/va: implement fquantizetf16 ftz
Bifrost implements this with a ftz flag in the clause header. Valhall
doesn't have clauses, and needs a separate flush instruction.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32470>
2025-01-03 20:53:36 +00:00
Benjamin Lee
c9de3d57f7 panfrost/va: add FLUSH instruction
This is needed to implement FTZ for intermediate values on valhall.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32470>
2025-01-03 20:53:36 +00:00
Benjamin Lee
9f17138571 panvk: remove load_multisampled_pan sysval
This was only used by bi_lower_sample_mask_writes, which now ignores it
in panvk due to panfrost_compile_inputs::single_sample_full_coverage.

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32636>
2025-01-03 20:01:54 +00:00
Benjamin Lee
41c6148c0d panvk: handle sample mask writes on 1-sample targets
In OpenGL, non-multisample targets always have full coverage, and shader
writes to gl_SampleMask are ignored. On Vulkan, sample mask writes on
single-sample targets are treated the same way as writes with >1 sample.

Fixes dEQP-VK.pipeline.*.multisample_shader_builtin.write_sample_mask.1_samples

Signed-off-by: Benjamin Lee <benjamin.lee@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32636>
2025-01-03 20:01:54 +00:00
Karol Herbst
5f30bc62fe rusticl/mesa/resource: port to NonNull
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32821>
2025-01-03 18:26:19 +00:00
Karol Herbst
0fe59874c0 rusticl/mem: pass around QueueContext instead of PipeContext
This let us get rid of the Queue argument in a couple of places.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32821>
2025-01-03 18:26:19 +00:00
Karol Herbst
b2f42dbe61 rusticl/queue: make QueueContext::dev public
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32821>
2025-01-03 18:26:19 +00:00