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384aced65e7768f7bba1a6159c6730efdd514d6c
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204 Commits

Author SHA1 Message Date
Dave Airlie
384aced65e radv: drop scanning the tess shader in the nir code. 
This drops the now unneeded scanning and results in favour
of the ones in the info.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-16 05:23:08 +00:00
Dave Airlie
f50d520acf radv: use num_patches output from tcs shader. 
Instead of recalculating the value, use the shader calculated value.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-16 05:23:05 +00:00
Dave Airlie
bf9a0ea853 radv/tess: remove last chunk of tess sgprs 
This removes the last TES-specifc user sgpr.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-16 05:23:01 +00:00
Dave Airlie
6db44d6a8c radv: pass num_patches to tes from tcs 
TES needs num_patches to do some of the calculations.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-16 05:22:58 +00:00
Dave Airlie
010d055aae radv: drop tess offchip layout for tcs. 
This removes the last TCS specific user sgpr.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-16 05:22:54 +00:00
Dave Airlie
ee31cff856 radv: drop tcs_out_offsets 
Move all calculations to shader generation.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-16 05:22:47 +00:00
Dave Airlie
b0460bbf1c radv: drop tcs_out_layout 
Move all calculations to shader generation.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-16 05:22:43 +00:00
Dave Airlie
6adf99165c radv/tess: drop tcs_in_layout setting completely. 
Inline all calcs at shader creation.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-16 05:22:37 +00:00
Dave Airlie
f343d11ae7 radv: drop ls_out_layout const. 
We can precalculate input_vertex_size at compile time.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-03-16 05:22:32 +00:00
Samuel Pitoiset
fbe694562b ac/nir: move ac_nir_compiler_options and friends to radv folder 
Also replace ac_ by radv_.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-03-13 16:54:23 +01:00
Samuel Pitoiset
2cfba40eea ac/nir: move ac_shader_variant_info and friends to radv folder 
Also replace ac_ by radv_.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-03-13 16:54:16 +01:00
Timothy Arceri
0f2c7341e8 ac/radv: move lower_indirect_derefs() to ac_nir_to_llvm.c 
Until llvm handles indirects better we will need to use these
workarounds in the radeonsi backend also.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-03-05 14:09:23 +11:00
Samuel Pitoiset
639c4f2b54 ac/shader: move scanning some info about input PS declarations 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-02-28 10:14:26 +01:00
Dave Airlie
baa0feb73d radv: don't send num_tcs_input_cp to sgprs. 
We never use it in the shaders.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:36 +00:00
Dave Airlie
952222ddd4 radv/tess: don't need to look in constant for vertices_per_patch 
This just avoids passing this value via user sgprs.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-02-21 00:01:28 +00:00
Samuel Pitoiset
549c7f3724 radv: compact varyings after removing unused ones 
It makes no sense to compact before, and the description of
nir_compact_varyings() confirms that.

Polaris10:
Totals from affected shaders:
SGPRS: 108528 -> 108128 (-0.37 %)
VGPRS: 74548 -> 74500 (-0.06 %)
Spilled SGPRs: 844 -> 814 (-3.55 %)
Code Size: 3007328 -> 2992932 (-0.48 %) bytes
Max Waves: 16019 -> 16009 (-0.06 %)

Vega10:
Totals from affected shaders:
SGPRS: 106088 -> 106232 (0.14 %)
VGPRS: 74652 -> 74700 (0.06 %)
Spilled SGPRs: 692 -> 658 (-4.91 %)
Code Size: 2967708 -> 2953028 (-0.49 %) bytes
Max Waves: 18178 -> 18162 (-0.09 %)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-02-19 12:19:17 +01:00
Bas Nieuwenhuizen
05d84ed68a radv: Always lower indirect derefs after nir_lower_global_vars_to_local. 
Otherwise new local variables can cause hangs on vega.

CC: <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105098
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-02-15 23:45:59 +01:00
Samuel Pitoiset
834d9845ca ac/shader: scan info about output PS declarations 
NIR->LLVM should only be a translation pass, and all scan stuff
should be done before.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-02-08 22:14:27 +01:00
Samuel Pitoiset
a097a6f519 radv: do not dump meta shader stats 
That's quite useless and that pollutes the output.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-01-31 14:10:26 +01:00
Bas Nieuwenhuizen
882eff4d20 radv: Merge raster state with PM4 generation. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:02:05 +01:00
Bas Nieuwenhuizen
69364f1c34 radv: Move gs state out of pipeline. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:02:01 +01:00
Bas Nieuwenhuizen
e4e060d135 radv: Split out cliprect rule generation. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:56 +01:00
Bas Nieuwenhuizen
acbaef3005 radv: Merge VGT_GS_MODE computation with PM4 generation. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:52 +01:00
Bas Nieuwenhuizen
4ae6a8b0cd radv: Split out processing the vertex input state. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:41 +01:00
Bas Nieuwenhuizen
9062b1c241 radv: Move tessellation state out of pipeline. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:38 +01:00
Bas Nieuwenhuizen
4aa1cb4e90 radv: Move blend state out of pipeline. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:34 +01:00
Bas Nieuwenhuizen
0f72f0eacb radv: Split out generating VGT_SHADER_STAGES_EN. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:30 +01:00
Bas Nieuwenhuizen
694c34314b radv: Split out the ia_multi_vgt_param precomputation. 
Also moved everything in a struct and then return the struct from
the helper function, so it is clear in the caller what part of the
pipeline gets modified.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:26 +01:00
Bas Nieuwenhuizen
0bea0851aa radv: Split out db_shader_control computation. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:18 +01:00
Bas Nieuwenhuizen
5dce47ae6d radv: Compute shader_z_format when emitting it. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:13 +01:00
Bas Nieuwenhuizen
df2e7ab0db radv: Merge depth stencil state with PM4 generation. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:06 +01:00
Bas Nieuwenhuizen
d5a0af84ec radv: Merge ps_input_cntl computation with PM4 generation. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:01:01 +01:00
Bas Nieuwenhuizen
e2bf18030d radv: Merge vtx_reuse_depth computation with PM4 generation. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:00:55 +01:00
Bas Nieuwenhuizen
c80747b32c radv: Merge vs state computation with PM4 generation. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:00:50 +01:00
Bas Nieuwenhuizen
c4191cf944 radv: Merge binning state generation with pm4 emission. 
We don't need the pipeline state struct anymore.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:00:45 +01:00
Bas Nieuwenhuizen
6f1a3f081e radv: Constify some pipeline helpers. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:00:40 +01:00
Bas Nieuwenhuizen
f0c9ef410a radv: Add PM4 pregeneration for compute pipelines. 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:00:34 +01:00
Bas Nieuwenhuizen
beeab44190 radv: Record a PM4 sequence for graphics pipeline switches. 
This gives about 2% performance improvement on dota2 for me.

This is mostly a mechanical copy and replacement, but at bind time
we still do:

1) Some stuff that is only based on num_samples changes.
2) Some command buffer state setting.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:00:22 +01:00
Bas Nieuwenhuizen
7c366bc152 radv: Determine unneeded dynamic states. 
Which avoids setting or emitting them.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-30 22:00:17 +01:00
Samuel Pitoiset
b358e0e67f ac/shader: scan if fragment shaders write memory 
It's better to do that in ac_shader_info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
 2018-01-26 12:14:27 +01:00
Dave Airlie
d2414e64e4 radv: add multisample Z optimisation from amdvlk 
This was just found while reading for other stuff,
src/core/hw/gfxip/gfx6/gfx6DepthStencilView.cpp.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-01-25 06:48:11 +10:00
Dave Airlie
298554541d radv: move spi_baryc_cntl to pipeline 
We need to enable the pos float location 2 mode anytime we have
persample not just when forced by the frag shader.

This fixes:
dEQP-VK.pipeline.multisample.min_sample_shading*

Fixes: 58c97a079 (radv: enable location at sample when persample is forced.)
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-01-25 06:47:28 +10:00
Dave Airlie
766589d89a radv: fix sample_mask_in loading. (v3.1) 
This is ported from radeonsi and fixes:
dEQP-VK.pipeline.multisample_shader_builtin.sample_mask.bit_*

v2: don't call this path for radeonsi, it does it in the epilog.
use the radeonsi code path.
v3: handle NULL pCreateInfo->pMultisampleState properly (Samuel)
v3.1: set ps_iter_samples default to 1 (Bas)

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Fixes: bdcbe7c76 (radv: add sample mask input support)
Signed-off-by: Dave Airlie <airlied@redhat.com>
 2018-01-24 14:25:11 +10:00
Bas Nieuwenhuizen
dbf1e918cd radv: emit pa_sc_mode_cntl_0 with multisample state. 
We don't have the meta kludge with 0 viewports anymore,
so we can always enable them.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-19 23:35:12 +01:00
Bas Nieuwenhuizen
bd5c942cef radv: Use correct bindings for inputRate in key generation. 
The bindings also have an index field.

Fixes: 49d035122e "radv: Add single pipeline cache key."
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104677
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
 2018-01-19 01:54:59 +01:00
Samuel Pitoiset
8045f01e2a Revert "ac/shader: gather If TES reads TESSINNER or TESSOUTER" 
This can't work for two reasons:
- TESSINNER/TESSOUTER are shader input values, so never translated
to the intrinsic ops
- the shader info pass scans the current stage but we want to know
in TCS, if TES reads the tess factors.

This fixes 6 regressions related to
deqp-vk/tessellation/shader_input_output/tess_level_{inner,outer}_XXX_tes

This reverts commit 5ba1a61648.
 2018-01-15 13:47:18 +01:00
Samuel Pitoiset
5ba1a61648 ac/shader: gather If TES reads TESSINNER or TESSOUTER 
This shouldn't be scanned in the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
 2018-01-15 11:51:47 +01:00
Bas Nieuwenhuizen
5db0bf9994 radv: Implement VK_EXT_discard_rectangles. 
Tested with a modified deferred demo and no regressions in a 1.0.2
mustpass run.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-01-10 13:26:22 +01:00
Bas Nieuwenhuizen
11b9cdd2d7 radv: Add mapping between dynamic state mask and external enum. 
The EXT values are really large, e.g.
VK_DYNAMIC_STATE_DISCARD_RECTANGLE_EXT = 1000099000, so 1 << value
is not going to fit into a 32-bit mask.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
 2018-01-10 13:24:31 +01:00
Samuel Pitoiset
a4d2782664 amd/common: scan if gl_PrimitiveID is used before translating to LLVM 
It makes more sense to move all scan stuff in the same place.
Also, we don't really need to duplicate the uses_primid field
for each stages.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
 2018-01-04 18:43:09 +01:00