Commit Graph

170017 Commits

Author SHA1 Message Date
Sarah Walker
35d2b51c11 pvr: Implement pvr_isp_scan_direction()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
8bcc40ed22 pvr: Complete pvr_double_stride()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
9cfe3b5283 pvr: Complete pvr_unwind_rects()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
8a0a357b65 pvr: Complete pvr_modify_command()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
240bac1e85 pvr: Implement pvr_pbe_setup_modify_defaults()
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Matt Coster
0a8334e054 pvr: Complete pvr_isp_ctrl_stream()
This also adds pvr_pbe_src_format_ds(), the equivalent to
pvr_pbe_src_format_normal() for depth/stencil formats.

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Sarah Walker
5ac3c8d0df pvr: Support single core transfer queue commands on multicore GPUs
Co-authored-by: Matt Coster <matt.coster@imgtec.com>
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Karmjit Mahil
c3e7060ba1 pvr: Implement simple internal format v2 transfer paths.
This commit fixes the triangle demo on the AM62 by implementing
the paths that were left unimplemented due to the Chromebook not
having the simple internal format v2 feature.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
838132c0a9 pvr: Implement vkCmdClearDepthStencilImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
c468cf29a8 pvr: Implement vkCmdResolveImage2KHR API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
de9c53e3bb pvr: Implement vkCmdFillBuffer API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
ed243eca90 pvr: Implement vkCmdCopyImageToBuffer2 API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
29e120c092 pvr: Implement vkCmdClearColorImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
5827f0098c pvr: Implement vkCmdBlitImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
4c31121329 pvr: Implement vkCmdCopyImage2KHR API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Rajnesh Kanwal
dc260f6fc3 pvr: Implement vkCmdCopyBufferToImage API.
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:06 +00:00
Karmjit Mahil
96b6b69d8a pvr: Implement vkCmdUpdateBuffer().
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Rajnesh Kanwal
480bdff4b5 pvr: Add support to process transfer and blit cmds
Co-authored-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Co-authored-by: Matt Coster <matt.coster@imgtec.com>
Co-authored-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Frank Binns
1cdd0ccb37 pvr: replace transfer EOT binary shaders with run-time compiled shaders
Take the opportunity to tweak the naming of pvr_transfer_ctx_setup_shaders and
pvr_transfer_ctx_fini_shaders to make them fit in with the rest of the naming in
the driver.

Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Simon Perretta
11dea16dee pvr: Add support for generating transfer EOT programs
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Simon Perretta
f0b47cfd65 pvr: Add support for generating transfer fragment programs
Co-authored-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Co-authored-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Signed-off-by: Rajnesh Kanwal <rajnesh.kanwal@imgtec.com>
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Simon Perretta
eeac8336ef pvr: Use movc for reading special registers
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Simon Perretta
e8cd78b319 pvr: Amend validation when checking multiple supported types
Signed-off-by: Simon Perretta <simon.perretta@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Karmjit Mahil
4dc86e1148 pvr: Add missing includes in pvr_common.h
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Frank Binns
6b27b76432 pvr: use util_dynarray_begin() in more places
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Frank Binns
16a1752d34 pvr: add missing explicit check against VK_SUCCESS
Signed-off-by: Frank Binns <frank.binns@imgtec.com>
Acked-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21550>
2023-04-19 11:01:05 +00:00
Viktoriia Palianytsia
c4e8b1cddb iris,crocus: Add proper way of assigning num_levels value
Changes miptree_level_range_length function
to use correct macro and
num_levels value assignment.

Closes: mesa/mesa#8256

Signed-off-by: Viktoriia Palianytsia <v.palianytsia@globallogic.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22067>
2023-04-19 10:25:55 +00:00
Timur Kristóf
acce5c3fe1 radv: Enable IB2 workaround on all indirect draws.
IB2 packets hang GFX6 when they contain any indirect draws,
not just the MULTI versions.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
2023-04-19 09:27:52 +00:00
Timur Kristóf
46a14390d8 radv: Remove IB2 workaround from mesh shader draws.
The GPUs which need the workaround do not support mesh shaders.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
2023-04-19 09:27:52 +00:00
Timur Kristóf
d16d9ef345 radv: Simplify IB2 workaround.
Move compute IB2 check to the winsys, because IB2 only works on
GFX queues and not any other queue types.

Then, simplify the workaround condition in the cmd buffer.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Tatsuyuki Ishi <ishitatsuyuki@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22533>
2023-04-19 09:27:52 +00:00
Qiang Yu
fbe7aec446 aco: skip scratch buffer init when its arg is not used
radeonsi does not pass scratch buffer address by arg,
but dynamical relocation symbol when upload. Just skip
this part to enable radeonsi use aco, but it will fail
when spill.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Qiang Yu
9cd3aa173a aco: implement nir_bindless_image_atomic_inc/dec_wrap
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Qiang Yu
b54f07870e nir: add missing image atomic_inc/dec_wrap intrinsic
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Qiang Yu
31bfad83ec aco: support 32bit address in nir_load_smem_amd
radeonsi uses 32bit address.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Qiang Yu
3ff9153a3b ac,radv: move ps arg compation to common place
To be shared with radeonsi when aco is used.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22525>
2023-04-19 08:39:46 +00:00
Ryan Neph
48062f91c7 virgl: add debug flag to force synchronous GL shader compilation
This does two things:
1. Flush the command buffer and associate a fence with each
   glLinkProgram().
2. Force the application calling glLinkProgram() to wait on the
   associated fence, matching the semantics of native drivers.

This important for some workloads and some environments. For example, on
ChromeOS devices supporting VM-based android (ARCVM), an app's HWUI thread
may be configured to use skiagl, while the app may create its own GLES
context for custom rendering. Virgl+virtio_gpu supports a single fencing
timeline, so all guest GL/GLES contexts are serialized by submission
order to the guest kernel.

If the app's submits multiple heavy shaders for compliation+linking
(glCompileShader + glLinkProgram()), these are batched into a single
virtgpu execbuffer (with one fence). Then rendering performed by the
HWUI thread is blocked until the unrelated heavy host-side work is
finished. To the user, the app appears completely frozen until finished.

With this change, the app is throttled in its calls to glLinkProgram(),
and the HWUI work can fill in the gaps between each while hitting most
display update deadlines. To the user, the UI may render at reduced
framerate, but remains mostly responsive to interaction.

Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22341>
2023-04-19 06:35:35 +00:00
Lionel Landwerlin
2e2491b76c anv: enable shaderStorageImageReadWithoutFormat on Gfx12.5+
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22552>
2023-04-19 06:04:52 +00:00
Tatsuyuki Ishi
3678c28d3d util: Call mesa_bytes_to_hex directly instead of disk_cache_format_hex_id.
The formatting is nothing specific about the disk cache.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22527>
2023-04-19 04:19:51 +00:00
Tatsuyuki Ishi
681d8cd9ea util: Add dedicated hex conversion functions and use it.
This deduplicate two identical bytes_to_hex implementation into one.

The intention is to ease the introduction of a new hash algorithm, which
will also have its formatting helper (to ensure seamless transition from
sha1).

Note that the new functions always take the size of the binary buffer,
unlike the old disk_cache_format_hex_id which took `binary * 2` which was
inconsistent (binary size is `binary` and string size is `binary * 2 + 1`).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22527>
2023-04-19 04:19:50 +00:00
Mike Blumenkrantz
96a0b1e988 zink: fix non-db bindless texture buffers
the db members are only populated in db mode

fixes Dawn of War 3 crash on launch

Fixes: 99ba529fee ("zink: implement descriptor buffer handling of bindless texture")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22566>
2023-04-19 03:25:36 +00:00
Qiang Yu
feeae0f18f ac/llvm,radeonsi: lower nir_load_point_coord_maybe_flipped in nir
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
2023-04-19 01:59:02 +00:00
Qiang Yu
f7f0d31fcc nir,ac/llvm,radeonsi: replace nir_load_smem_buffer_amd with nir_load_ubo
They use same instruction. Just because when the time
nir_load_smem_buffer_amd was introduced, radeonsi didn't support
pass buffer descriptor to nir_load_ubo directly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
2023-04-19 01:59:02 +00:00
Qiang Yu
75b75c6c0a ac/llvm,radeonsi: use texture non-uniform flag as waterfall switch
Also for calling nir_lower_non_uniform_access() when ACO.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
2023-04-19 01:59:02 +00:00
Qiang Yu
ba5eb2f5c1 radeonsi: add si_mark_divergent_texture_non_uniform
For handle divergent index problem later for both
llvm and aco.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22523>
2023-04-19 01:59:02 +00:00
Mike Blumenkrantz
24555f5462 nir/lower_alpha_test: rzalloc state slots
this otherwise leads to uninitialized memory

cc: mesa-stable

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22558>
2023-04-18 22:40:16 +00:00
Ikshwaku Chauhan
12706fab60 radeonsi/gfx11: updated vertex format changes
GFX11 format table is different than GFX10

Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22466>
2023-04-18 21:34:02 +00:00
Ikshwaku Chauhan
da3b8c1e6b radeonsi/gfx11: updated si_is_format_supported
GFX11 format table is different than GFX10, the change is
required to pass below deqp tests for gfx11:
dEQP-GLES3.functional.texture.specification.teximage2d_pbo*,
texsubimage2d_pbo*, teximage3d_pbo*, texsubimage3d_pbo*.

Signed-off-by: Ikshwaku Chauhan <ikshwaku.chauhan@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22466>
2023-04-18 21:34:02 +00:00
Mike Blumenkrantz
543b6ca7c4 iris: use util_framebuffer_get_num_samples when setting ps dispatch samples
pipe_framebuffer_state::samples may be zero, which is why this helper exists

cc: mesa-stable

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22563>
2023-04-18 21:01:23 +00:00
Mike Blumenkrantz
cbac02b7d3 zink: avoid zero-sized memcmp for descriptor layouts
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22559>
2023-04-18 19:33:05 +00:00
Aleksey Komarov
f2e7482202 pan/va: fix typo in IADD_IMM.i32 description
`IADD.f32` replaced with `IADD.i32`

Signed-off-by: Signed-off-by: Aleksey Komarov <q4arus@ya.ru>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20467>
2023-04-18 19:44:48 +03:00