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Author SHA1 Message Date
Mary Guillemard
ade42dfb0e zink: Initialize pQueueFamilyIndices for image query / create 
Fixes: d922850e36 ("zink: break out image/buffer create info structs into helper funcs")

Signed-off-by: Mary Guillemard <mary.guillemard@collabora.com>
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26303>
(cherry picked from commit db0f177edd)
 2024-01-09 17:31:42 +00:00
Karol Herbst
cff9bdc316 zink: fix heap-use-after-free on batch_state with sub-allocated pipe_resources 
zink_bo_create can run into a heap-use-after-free when the bo is still
referencing an batch_state from an older destroyed context. In order to
fix this, every context gives back their batch_states to the zink, where
they can be reused from for new contexts.

Cc: mesa-stable
Suggested-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26889>
(cherry picked from commit b06f6e00fb)
 2024-01-09 17:31:42 +00:00
Eric Engestrom
5d1329a1b3 .pick_status.json: Mark fbe4e16db2 as denominated 2024-01-09 17:31:42 +00:00
Eric Engestrom
488a1ee83c .pick_status.json: Update to 0319789331 2024-01-09 17:31:42 +00:00
Friedrich Vock
2934ae2736 radv/rt: Free traversal NIR after compilation 
Could lead to OOM in games that compile RTPSOs often,
like Ghostwire Tokyo.

Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26892>
(cherry picked from commit 34cc765172)
 2024-01-04 18:45:58 +00:00
Samuel Pitoiset
84d8ac768f radv: disable stencil test without a stencil attachment 
Implementations are supposed to do that per the Vulkan spec.

This fixes the following new VKCTS tests
dEQP-VK.pipeline.*.stencil.no_stencil_att.*

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26847>
(cherry picked from commit 8b7b5be98b)
 2024-01-04 18:43:32 +00:00
Samuel Pitoiset
1acb1a232f radv: fix binding partial depth/stencil views with dynamic rendering 
With dynamic rendering, it's allowed to begin rendering with depth or
stencil only but still with a depth/stencil format. The test below
checks that unbound part of ds isn't modified, if depth is bound and
stencil not and vice versa.

This fixes a recent CTS
dEQP-VK.dynamic_rendering.primary_cmd_buff.basic.partial_binding_depth_stencil.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25350>
(cherry picked from commit 1ef5feac5e)
 2024-01-04 18:43:24 +00:00
Dave Airlie
955d7b3fa3 llvmpipe: fix caching for texture shaders. 
caching only works if you check the size and store the result,
later the size is always set.

Fixes: f675e4ee82 ("llvmpipe: Pre compile sample functions")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25648>
(cherry picked from commit c2f79d7fb1)
 2024-01-04 18:36:07 +00:00
Dave Airlie
4ea8f20b19 intel/compiler: fix release build unused variable. 
This is only used in an assert.

Fixes: 158ac265df ("intel/fs: Make helpers for saving/restoring instruction order")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26863>
(cherry picked from commit 37366fef68)
 2024-01-04 18:35:59 +00:00
Dave Airlie
548cc0dd8c gallivm: handle llvm 16 atexit ordering problems. 
This is ported from amd ac_llvm_helper.cpp, thanks to Marek for the pointer.

This is needed to avoid crashes due to atexit ordering between some piglit
tests and mesa internals.

Cc: mesa-stable
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26883>
(cherry picked from commit b3cfec2fd8)
 2024-01-04 18:35:32 +00:00
Eric Engestrom
1c4c1c8431 .pick_status.json: Update to e2a7c877ad 2024-01-04 18:31:24 +00:00
Mike Blumenkrantz
f544bd05ca zink: enforce maxTexelBufferElements for texel buffer sizing 
according to spec, creating larger texel buffers is legal for apps
but the resulting texel buffer must be clamped to device limits

fixes #10068

backport-to: 23.3

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26873>
(cherry picked from commit 49378bc3cd)
 2024-01-03 23:02:56 +00:00
Karol Herbst
f4e231dddd zink: lock screen queue on context_destroy and CreateSwapchain 
Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25985>
(cherry picked from commit 208875516c)
 2024-01-03 23:02:44 +00:00
Rhys Perry
6fa1ab1ad0 aco/tests: use more raw strings 
Python 3.12 started giving a SyntaxWarning for unrecognized escapes such
as "\w". This might become a SyntaxError in a future python version.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26850>
(cherry picked from commit cad2c0915d)
 2024-01-03 23:02:17 +00:00
Sil Vilerino
10b141aa89 Revert "d3d12: Fix screen->winsys leak in d3d12_screen" 
This reverts commit 81c8e89ff8.

Fixes: 81c8e89ff8 ("d3d12: Fix screen->winsys leak in d3d12_screen")
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26872>
(cherry picked from commit e11605321a)
 2024-01-03 23:02:07 +00:00
Sil Vilerino
2382dca2c5 Revert "d3d12: Only destroy the winsys during screen destruction, not reset" 
This reverts commit 325fb6e26b.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10371
Fixes: 325fb6e26b ("d3d12: Only destroy the winsys during screen destruction, not reset")
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26872>
(cherry picked from commit 97cc7ea5a5)
 2024-01-03 23:02:07 +00:00
Eric Engestrom
fb5dea4b0d .pick_status.json: Update to 2c078bfd18 2024-01-03 23:02:03 +00:00
Jonathan Gray
f03eab9efc zink: put sysmacros.h include under #ifdef MAJOR_IN_SYSMACROS 
Fixes the build on OpenBSD, where major() is in sys/types and
sys/sysmacros.h does not exist.  Also include sys/mkdev.h if
MAJOR_IN_MKDEV is defined.

Fixes: 6d60115be7 ("zink: Fix enumerate devices when running compositor")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26735>
(cherry picked from commit 33eecafe75)
 2024-01-03 12:03:03 +00:00
Erik Faye-Lund
c47c264f4d zink: use KHR version of maint5 features 
This is still not in Vulkan core, so we can't refer to it without the
KHR suffix.

Fixes: f501f9453a ("zink: use maintenance5")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26419>
(cherry picked from commit 5024b212b6)
 2024-01-03 12:03:02 +00:00
Erik Faye-Lund
8ef5124871 zink: update profile schema 
This is needed for VK_KHR_maintenance5 support.

Fixes: f501f9453a ("zink: use maintenance5")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26419>
(cherry picked from commit 021645ebf5)
 2024-01-03 12:03:02 +00:00
Yonggang Luo
92cdf6cb5f meson: Support for both packaging and distutils 
distutils was deprecated and is now gone on modern systems.
so the default behavior is to use the supported thing, which is packaging.version, and when on an old system, fallback to the old distutils.version.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9943

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26746>
(cherry picked from commit 670a799ebf)
 2024-01-02 16:20:17 +00:00
Eric Engestrom
0b44ec8648 .pick_status.json: Update to 39c8cca34f 2024-01-02 16:20:06 +00:00
José Roberto de Souza
0aa0ae31d3 anv: Assume that imported bos already have flat CCS requirements satisfied 
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10291
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26711>
(cherry picked from commit 3465e9f352)
 2023-12-28 12:07:33 +00:00
Eric Engestrom
be59925ab2 .pick_status.json: Mark 8d0e70f628 as denominated 2023-12-28 12:07:33 +00:00
Eric Engestrom
e0d1a5f284 .pick_status.json: Mark 060439bdf0 as denominated 2023-12-28 12:07:33 +00:00
Eric Engestrom
101dcc53f1 .pick_status.json: Update to ebee672ef8 2023-12-28 12:07:33 +00:00
Eric Engestrom
4239dfff45 .pick_status.json: Mark eb5bb5c784 as denominated 2023-12-28 12:07:33 +00:00
Eric Engestrom
9e60ecdd21 docs: add sha256sum for 23.3.2 2023-12-27 22:34:20 +00:00
Eric Engestrom
527d45230f VERSION: bump for 23.3.2 2023-12-27 22:27:12 +00:00
Eric Engestrom
ad50fc2dba docs: add release notes for 23.3.2 2023-12-27 22:26:11 +00:00
Kenneth Graunke
64741669de iris: Skip mi_builder init for indirect draws 
We only need it for indirect draws.

Improves performance on an i7-12700 and A770:

- Piglit's drawoverhead base case +150.639% +/- 2.86933% (n=15).
- gfxbench5 gl_driver2_off +19.7219% +/- 1.13778% (n=15)
- SPECviewperf2020 catiav5test1 +1.6831% +/- 0.552052% (n=10).

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26806>
(cherry picked from commit 55c262898a)
 2023-12-27 13:39:30 +00:00
Kenneth Graunke
43e9a93fca iris: Don't search the exec list if BOs have never been added to one 
Whenever we use a BO in a batch, we need to find its corresponding exec
list entry, either to a) record that it's been used, b) update whether
it's being written, c) check for cross-batch implicit dependencies.

bo->index exists to accelerate these lookups.  If a BO is used multiple
times by a batch, bo->index is its location in the list.  Because the
field is global, and a BO can in theory be used concurrently by multiple
contexts, we need to double-check whether it's still there.  If not, we
fall back to a linear search of all BOs in the list, looking to see if
our index was simply wrong (but presumably right for another context).

However, there's one glaringly obvious case that we missed here.  If
bo->index is -1, then it's wrong for /all/ contexts, and in fact implies
that said BO has never been added to any exec list, ever.  This is quite
common in fact: a new BO, never been used before, say from the BO cache,
or streaming uploaders, gets used for the first time.

In this case we can simply conclude that it's not in the list and skip
the linear walk through all buffers referenced by the batch.

Improves performance on an i7-12700 and A770:

- SPECviewperf2020 catiav5test1: 72.9214% +/- 0.312735% (n=45)

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26806>
(cherry picked from commit d55b5d4af5)
 2023-12-27 13:39:29 +00:00
Kenneth Graunke
72dac9936f iris: Initialize bo->index to -1 when importing buffers 
A value of -1 means that the buffer has never been used in an execbuf
buffer list in any of our contexts.  While setting this isn't critical,
doing so will allow us to short-circuit some looping in the next patch.

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26806>
(cherry picked from commit d178334d5c)
 2023-12-27 13:39:28 +00:00
Eric Engestrom
0289027140 .pick_status.json: Update to 55c262898a 2023-12-27 13:39:24 +00:00
Tapani Pälli
99fdd1bcf1 drirc/anv: disable FCV optimization for Baldur's Gate 3 
Cc: mesa-stable
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26754>
(cherry picked from commit 9e88c711a3)
 2023-12-24 07:34:01 +00:00
Vinson Lee
04ed77a1ae etnaviv: Remove duplicate initializers 
Fix initializer-overrides warnings.

../src/gallium/drivers/etnaviv/etnaviv_compiler.c:62:29: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
   62 |       .lower_extract_byte = true,
      |                             ^~~~
../src/gallium/drivers/etnaviv/etnaviv_compiler.c:63:29: warning: initializer overrides prior initialization of this subobject [-Winitializer-overrides]
   63 |       .lower_extract_word = true,
      |                             ^~~~

Fixes: 9dc4ee9121 ("etnaviv: lower (un)pack_{2x16,2x32}_split and extract_{byte,word}")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26773>
(cherry picked from commit f5d08bdf4e)
 2023-12-24 07:34:01 +00:00
Tapani Pälli
7cfc8d3ab9 mesa: fix enum support for EXT_clip_cull_distance 
Extension was enabled but required enums not.

Fixes: 979bcb9f42 ("glsl: add EXT_clip_cull_distance support based on ARB_cull_distance")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26688>
(cherry picked from commit 629b15f446)
 2023-12-24 07:34:01 +00:00
Jonathan Gray
fa0f07c5e1 intel/common: add directory prefix to intel_gem.h include 
Otherwise common/intel_gem.h may get included instead of
common/i915/intel_gem.h when building in a different directory.

Fixes: e050a00b9f ("intel/common: Move i915 files to i915 folder")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26784>
(cherry picked from commit fbb9ce0140)
 2023-12-22 15:48:47 +00:00
Karol Herbst
676fd7a287 rusticl: check rustc version for flags requiring newer rustc/clippy 
Fixes: 7e74ee07e3 ("rusticl: silence clippy::arc-with-non-send-sync for now")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26780>
(cherry picked from commit 9643671dae)
 2023-12-22 15:48:26 +00:00
Karol Herbst
0c6d7bcd0c rusticl: silence clippy::arc-with-non-send-sync for now 
Allows compilation with newer clippy

Cc: mesa-stable
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26764>
(cherry picked from commit 7e74ee07e3)
 2023-12-22 15:47:35 +00:00
Eric Engestrom
3c7025cc4e .pick_status.json: Update to 1e6fcd6a61 2023-12-22 15:47:28 +00:00
Pierre-Eric Pelloux-Prayer
d93e7ef99f radeonsi/sqtt: use calloc instead of malloc 
This makes sure the record is fully initialized and
fixes RGP crashes or missing shaders.

Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26774>
(cherry picked from commit af8e6c9347)
 2023-12-20 21:26:40 +00:00
Pierre-Eric Pelloux-Prayer
fab56a0d03 radeonsi/sqtt: rework pm4.reg_va_low_idx 
The initial logic was to remember the place were SPI_SHADER_PGM_LO_*
are written, then assume that we can get the register offset because
the sequence would always be:

   PKT3_SET_SH_REG
   SPI_SHADER_PGM_LO_* register offset
   VA low 32 bits value <- reg_va_low_idx

The problem is that this sequence isn't guaranteed, for instance we
can get this instead:

   0   c0067600 |
   1   00000046 |
   2   003ffffd | SPI_SHADER_PGM_RSRC3_VS
   3   00000020 | SPI_SHADER_LATE_ALLOC_VS
   4 * 00002080 | SPI_SHADER_PGM_LO_VS
   5   00000080 | SPI_SHADER_PGM_HI_VS

So the assert in si_state_draw.cpp would fail as well as the VA
update logic.

So instead remember which the SPI_SHADER_PGM_LO_* offset, and the low
32 bits of the VA in si_update_shaders.

Fixes: 8034a71430 ("radeonsi/sqtt: re-export shaders in a single bo")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26774>
(cherry picked from commit b55a2065e0)
 2023-12-20 21:26:40 +00:00
Pierre-Eric Pelloux-Prayer
4425ef5653 radeonsi/sqtt: clear record_counts variable 
This avoids hitting the asserts in ac_sqtt_finish.

Fixes: 94ce6540d8 ("ac/sqtt: add helpers for initializing ac_thread_trace_data")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26774>
(cherry picked from commit e4d537fb84)
 2023-12-20 21:26:40 +00:00
Pierre-Eric Pelloux-Prayer
78b48817d1 radeonsi/sqtt: fix RGP pm4 state emit function 
It was missing in c3129b2b83.

Fixes: c3129b2b83 ("radeonsi: add a simple version of si_pm4_emit_state for non-shader states")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26774>
(cherry picked from commit 77098ec467)
 2023-12-20 21:26:40 +00:00
Bas Nieuwenhuizen
953da13070 radv: Use correct writemask for cooperative matrix ordering. 
Not expecting this to actually fix anything externally visible,
but reduces some invalid usage when the resulting vector is
not 16 elements long (e.g. the C/result matrix).

Fixes: 9df4703fbb ("radv: Add cooperative matrix lowering.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26768>
(cherry picked from commit 07ad6fd34a)
 2023-12-20 21:26:40 +00:00
Karol Herbst
a23408d57a rusticl: do not warn on empty RUSTICL_DEBUG or RUSTICL_FEATURES 
Fixes: b90d1cfbfe ("rusticl/platform: add RUSTICL_FEATURES boilerplate")
Fixes: ca1e9917a9 ("rusticl/program: allow dumping compilation logs through RUSTICL_DEBUG")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26764>
(cherry picked from commit 382718e0e1)
 2023-12-20 20:19:35 +00:00
Eric Engestrom
8d2fa241ae .pick_status.json: Update to e61fae6eb8 2023-12-20 20:19:35 +00:00
Sil Vilerino
771c65fe5f d3d12: Fix AV1 video encode 32 bits build 
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26573>
(cherry picked from commit 096e17b578)
 2023-12-20 20:18:46 +00:00
Sviatoslav Peleshko
af708d5e80 intel/fs: Don't optimize DW*1 MUL if it stores value to the accumulator 
Fixes: a8b86459 ("i965/fs: Optimize a * 1.0 -> a.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9570
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25710>
(cherry picked from commit 8f8cde4c60)
 2023-12-20 00:05:06 +00:00