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Author SHA1 Message Date
Mike Blumenkrantz
197e4f2ae2 egl: delete DRI_FLUSH_CONTROL remnants 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:15 +00:00
Mike Blumenkrantz
6b7e6e3bdc egl: always advertise KHR_context_flush_control 
this is supported by all dri interfaces

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:15 +00:00
Mike Blumenkrantz
0ae2958452 egl: delete DRI_BUFFER_DAMAGE remnants 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:15 +00:00
Mike Blumenkrantz
591bc52e3e egl: inline DRI_BUFFER_DAMAGE 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:15 +00:00
Mike Blumenkrantz
77e85377ae egl: use pipe_screen check for damage region, simplify buffer_damage checks 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:15 +00:00
Mike Blumenkrantz
e7b303c680 egl: add a util to get the pipe_screen 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:15 +00:00
Mike Blumenkrantz
9d41f1f552 dri: make set_damage_region public 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:15 +00:00
Mike Blumenkrantz
85d459fcec egl: simplify DRI_BUFFER_DAMAGE checks 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:15 +00:00
Mike Blumenkrantz
f6afe277d3 dri: only add DRI_BUFFER_DAMAGE if the driver supports set_damage_region 
100% of callers check both

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
f8fbec8e63 egl: delete DRI2_FLUSH remnants 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
fd17c018e9 egl/wayland: replace a couple DRI2_FLUSH checks with non-kms_swrast checks 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
a98434d257 egl/drm: replace a DRI2_FLUSH check with a non-kms_swarst check 
only (non-kms) swrast doesn't support this

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
b1f1046857 egl: replace a DRI2_FLUSH check with swrast check in x11_copy_buffers 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
1d41299109 egl: replace another DRI2_FLUSH check with a non-kms_swrast check in surface query 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
3b050af311 egl: inline DRI2_FLUSH usage 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
09b52c61bf egl: replace another DRI2_FLUSH check with non-kms_swrast check in dri2_wait_client 
only (non-kms) swrast doesn't support this

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
e5f9d004bb egl: delete a DRI2_FLUSH check in dri2 swapbuffers 
this is always true here

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
af3aefda04 egl: use a swrast check for a swapbuffers DRI2_FLUSH case 
as the comment indicates, this is swrast. thus, check swrast

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
0ff37e7591 egl: use a non-kms_swrast check for swapbuffers DRI2_FLUSH 
only swrast (non-kms) doesn't support this

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
a04f8cba53 gbm: delete DRI_FLUSH remnants 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
1ecb4c5cf7 gbm: inline DRI_FLUSH 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
484b50bd73 egl: add a bool to indicate swrast but not kms_swrast 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
3e7840ac37 egl: further simplify driver loading 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
a940f17ee1 egl: delete DRI_CONFIG_OPTIONS remnants 
also simplify driver opening a little

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
7ea0091a19 egl: inline CONFIG_OPTIONS usage 
this is always supported

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
0c220741e6 pipe-loader: fix driconf memory management 
this had a number of issues:
* pipe_loader_get_driinfo_xml() frees driver_driconf immediately,
  except the driOptionCache struct string pointers are all just copied
  in merge_driconf instead of having the strings copied, which means any
  subsequent access of driver_driconf strings is invalid access
* pipe_loader_drm_get_driconf_by_name() is a disaster that only happened
  to work because the dlopen here is the same lib that gets opened elsewhere
  by mesa and not closed. if the lib here is actually closed, then all
  the statically allocated strings become invalid, which means they need to
  be manually copied

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Mike Blumenkrantz
390151bef2 gallium: make some sw screen create functions public 
linkage fixes

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30494>
 2024-08-05 20:33:14 +00:00
Juston Li
43cb986d9e anv/android: resolve ANB swapchain images on bind 
Like AHB, we don't know the layout for an image backed by gralloc
swapchain memory until bind when gralloc information is passed by the
platform.

Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29850>
 2024-08-05 20:06:06 +00:00
Juston Li
bcb17acab9 anv/android: refactor out u_gralloc tiling query 
Refactor out shared code for the u_gralloc tiling query so it can also
be used by ahw and later anb resolves.

Signed-off-by: Juston Li <justonli@google.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29850>
 2024-08-05 20:06:06 +00:00
Marek Olšák
0e27df4521 radeonsi/gfx12: fix VS output corruption with streamout 
We increased VS_EXPORT_COUNT to 8 for streamout in gfx10_shader_ngg,
but we forgot to increase the attribute ring stride, causing all waves
except the first one to get corrupted VS outputs.

Fixes: f703dfd1bb - radeonsi: add gfx12

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Marek Olšák
8b3e02587e radeonsi: program OREO_MODE optimally on gfx11.x and gfx12 
This fixes a rare performance regression since we stopped setting OREO_MODE.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Marek Olšák
dd7e33d5b9 radeonsi/gfx11: prepare for CWSR 
CWSR = compute wave save restore

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Marek Olšák
07a0b5e2f2 radeonsi/gfx12: fix register programming to fix GPU hangs 
Fixes: f703dfd1bb - radeonsi: add gfx12

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Marek Olšák
83b88c54ba radeonsi: fix buffer coherency issues on gfx6-8,12 due to missing PFP->ME sync 
This fixes random GPU hangs on gfx12 due to incoherent indirect buffer data,
causing random indirect vertex and instance counts, which timeouts if
the random numbers are large.

Fixes: a8abbbb172 - radeonsi: remove r600_pipe_common.h

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Marek Olšák
72e6cefe00 radeonsi: don't set TC_L2_dirty in si_query_hw_get_result_resource 
It's set automatically by si_launch_grid_internal_ssbos.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Marek Olšák
ebc5116e70 radeonsi: ensure TC_L2_dirty is set if we don't sync after internal SSBO blits 
There was a case where if we don't sync, we wouldn't set TC_L2_dirty either,
which could cause problems later.

Fixes: f703dfd1bb - radeonsi: add gfx12

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Marek Olšák
e4b3848fde radeonsi/gfx12: fix a GPU hang due to an invalid packet with window rectangles 
I guess incorrect packet interrupts have been enabled, so this started hanging.

radeon_set_context_reg_seq shouldn't be used with gfx12_set_context_reg.

Fixes: f703dfd1bb - radeonsi: add gfx12

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Marek Olšák
de83b5ef77 ac/surface/gfx12: fix setting tile_swizzle 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30503>
 2024-08-05 19:35:39 +00:00
Thomas H.P. Andersen
0f665b8178 nvk: EXT_post_depth_coverage 
EXT_post_depth_coverage was already wired up but the tests were
failing. Through experimentation I found that running them in
combination with SET_HYBRID_ANTI_ALIAS_CONTROL would cause the
tests to fail.

This patch simply skips SET_HYBRID_ANTI_ALIAS_CONTROL when post
depth coverage is in use

Test results for *post_depth_cover*:

Test run totals:
  Passed:        21/104 (20.2%)
  Failed:        0/104 (0.0%)
  Not supported: 83/104 (79.8%)
  Warnings:      0/104 (0.0%)
  Waived:        0/104 (0.0%)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29194>
 2024-08-05 19:26:04 +00:00
Faith Ekstrand
4090aa064f nvk: Set POST_PS_INITIAL_COVERAGE 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29194>
 2024-08-05 19:26:04 +00:00
Faith Ekstrand
1ba4bc2ada nvk: Don't force sample shading when gl_SampleMaskIn[] is read 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29194>
 2024-08-05 19:26:04 +00:00
Faith Ekstrand
b8d50542c0 nak,nir: Rework gl_SampleMaskIn[] handling 
The pixld.covmask instruction returns the coverage mask for the entire
pixel being shaded, not the set of samples covered by the current FS
invocation as required by GL/Vulkan.  In order to get the GL/Vulkan
behavior, we have to mask off samples not covered by the current FS
invocation.

Previously, we handled this by masking by 1 << gl_SampleID.  This
required us to force full sample shading whenever gl_SampleMaskIn[] was
used.  Otherwise, we didn't know what to mask.  Instead, this commit
switches us to using an array in CB0 which has a sample mask for each
sample, representing the set of samples in that sample's pass.  Masking
by this allows us to get the full range of variability provided by
NVIDIA's multi-pass MSAA hardware.  It also allows us to eliminate the
workaround that forced per-sample shading for gl_SampleMaskIn[] because
we can adjust the masks from the API side as needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29194>
 2024-08-05 19:26:04 +00:00
Faith Ekstrand
761874ea85 nak: Sample locations are byte-aligned 
Fixes: cc33cafcac ("nak/nir: Use an indirect load for sample locations")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29194>
 2024-08-05 19:26:03 +00:00
Faith Ekstrand
315b788c7b nvk: Move nvk_sample_location to NAK 
It's part of the NAK compiler interface so that's where it should live.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29194>
 2024-08-05 19:26:03 +00:00
Paulo Zanoni
644dcc0337 anv: disable CCS for Source2 games on Xe2 
Dota 2 and Counter-Strike 2 really want to be able to allocate memory
for both VkImages and VkBuffers from the same memory type. Xe2's
special compression-only memory type does not support buffers, which
makes these games crash. Disable CCS on these games as a workaround.

This is a temporary workaround as we're still working towards a
long-term solution (either by fixing the engine or finding a way
better expose our memory types).

Backport-to: 24.2
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11520
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11521
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30481>
 2024-08-05 18:36:46 +00:00
Paulo Zanoni
b4f5a04223 anv: don't expose the compressed memory types when DEBUG_NO_CCS 
These memory types are useless when CCS is disabled, don't leave them
there so they don't confuse applications.

Backport-to: 24.2
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Jianxun Zhang <jianxun.zhang@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30481>
 2024-08-05 18:36:46 +00:00
Caio Oliveira
ba3fd5dc57 intel/brw: Don't retype load_subgroup_invocation result to signed 
The values are small unsigned integers, so their signed representation
will be the same -- the sign conversion is not needed.  As a result the
extra MOV can be elided by the optimizations.

Fossil-db results for DG2

```
Totals:
Instrs: 151779000 -> 151761591 (-0.01%)
Cycle count: 12743968649 -> 12742826024 (-0.01%); split: -0.01%, +0.00%
Max live registers: 31834993 -> 31834996 (+0.00%)

Totals from 17018 (2.70% of 631450) affected shaders:
Instrs: 2381740 -> 2364331 (-0.73%)
Cycle count: 76798588 -> 75655963 (-1.49%); split: -1.70%, +0.22%
Max live registers: 378921 -> 378924 (+0.00%)
```

and TGL

```
Totals:
Instrs: 149812033 -> 149794080 (-0.01%); split: -0.01%, +0.00%
Cycle count: 11534727002 -> 11534929834 (+0.00%); split: -0.01%, +0.01%
Spill count: 42510 -> 42511 (+0.00%); split: -0.00%, +0.01%
Fill count: 75100 -> 75101 (+0.00%); split: -0.00%, +0.00%
Max live registers: 31727318 -> 31727321 (+0.00%)

Totals from 17421 (2.76% of 630458) affected shaders:
Instrs: 3092614 -> 3074661 (-0.58%); split: -0.58%, +0.00%
Cycle count: 286061417 -> 286264249 (+0.07%); split: -0.32%, +0.39%
Spill count: 11538 -> 11539 (+0.01%); split: -0.02%, +0.03%
Fill count: 21359 -> 21360 (+0.00%); split: -0.01%, +0.01%
Max live registers: 418954 -> 418957 (+0.00%)
```

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30508>
 2024-08-05 18:05:45 +00:00
Felix DeGrood
86c4e89aa2 anv: fix src_hash dumping for compute shaders 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30495>
 2024-08-05 16:46:42 +00:00
Alejandro Piñeiro
28df772935 v3dv: expose Vulkan 1.3 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10896

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29476>
 2024-08-05 15:10:24 +00:00
Alejandro Piñeiro
3ae4da4ea7 v3dv: update conformanceVersion to 1.3.8.3 
As we used as reference to check if we fully pass Vulkan 1.3

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29476>
 2024-08-05 15:10:24 +00:00