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Author SHA1 Message Date
Francisco Jerez
7f39e51dd5 intel/compiler/xe2: Add extra flag registers. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
f974eacab3 intel/compiler/xe2: Fix for the removal of most predication modes. 
Reworks:
* Remove changes to fixup_nomask workaround since it applies only for
  Gfx12 family.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
f79123e1d9 intel/compiler/xe2: Fix for NibCtrl field removal. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
7db3f0b1c1 intel/compiler/xe2: Implement instruction compaction. 
Reworks:
* Handle DPAS in has_3src_unmapped_bits.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
57ba9c176c intel/compiler/xe2: Implement codegen of compact instructions. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
d8ba1d63bc intel/compiler: Add assume() checks to brw_compact_inst_(set_)bits(). 
Similar to the preconditions of brw_inst_(set_)bits().

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
4a24f49b57 intel/compiler/xe2: Implement codegen of three-source instructions. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
e10e7d5aa3 intel/compiler/xe2: Implement codegen of indirect immediates. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
294bdbb253 intel/compiler/xe2: Implement codegen of 2-source instruction operands. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
72bbfa8e8d intel/compiler/xe2: Implement codegen of general instruction controls. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Francisco Jerez
066e6c6234 intel/compiler/xe2: Add Xe2 bounds to FF() macro. 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26860>
 2024-01-12 20:18:03 +00:00
Yiwei Zhang
ecd50e70d4 venus: populate oom from ring submit alloc failures 
ring_seqno_valid indicates a successful ring cmd submission, and can be
used to avoid invalid reply decoding due to failed submit alloc.
Otherwise, the garbled VkResult will mislead into initialization failure
instead of oom.

Below cts failure is fixed:
dEQP-VK.api.device_init.create_instance_device_intentional_alloc_fail.basic

Fixes: ec131c6e55 ("venus: use instance allocator for ring allocs")
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27026>
 2024-01-12 19:56:34 +00:00
Yiwei Zhang
12d428bc68 venus: avoid redundant layout transition for optimal internal layout 
This ensures no extra barriers when internal layout is wsi layout.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27020>
 2024-01-12 19:34:56 +00:00
Matt Turner
5b7c733902 util/tests: Disable half-float NaN test on hppa/old-mips 
Bug: https://bugs.gentoo.org/908079
Fixes: 067023dce2 ("util: Add some unit tests of the half-float conversions.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26991>
 2024-01-12 17:47:55 +00:00
Matt Turner
0540c9de44 util: Add DETECT_ARCH_HPPA macro 
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26991>
 2024-01-12 17:47:55 +00:00
Corentin Noël
68f5277887 glsl: Make sure that the variable is a ir_variable before unreferencing it 
While it technically was already only using an ir_instruction field, better make
sure that it is effectively an ir_variable using the dedicated method instead of
relying on an undefined behavior.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26144>
 2024-01-12 17:11:57 +00:00
Corentin Noël
d9c4ccf56d glsl: Make sure to not cast ir_dereference_variable into ir_variable 
The parameter_lists_match_exact function was wrongly assuming that all the
elements were ir_variable when there can also be ir_dereference_variable elements.

Add case taking this into account.

Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26144>
 2024-01-12 17:11:57 +00:00
Dmitry Osipenko
b9ad22d24e virtio/vdrm: Fix lockup in vdrm_host_sync() 
The vdrm_execbuf() missed to set the seqno field for requests sent to host.
This causes vdrm_host_sync() to lock up due to the unset seqno in a case
where two or more threads are using vdrm_execbuf() and vdrm_send_req()
concurrently, like in this scenario:

	thread1: vdrm_send_req()  shmem->seqno=1 req->seqno=2
	thread2: vdrm_execbuf()   shmem->seqno=1 req->seqno=0
	thread1: vdrm_host_sync() shmem->seqno=0 req->seqno=2

Fix the lockup by setting the seqno in vdrm_execbuf().

Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27021>
 2024-01-12 16:53:59 +00:00
Derek Foreman
2fa1979c66 egl/wayland: Fix possible buffer leak 
If we have to wait for a buffer to be released in swrast_update_buffers(),
we can leak it.

Take care to reuse the existing buffer if one is still available.

Signed-off-by: Derek Foreman <derek.foreman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26761>
 2024-01-12 15:16:31 +00:00
Pierre-Eric Pelloux-Prayer
e2f39e8aca Revert "ci/radeonsi: disable VA-API testing on raven" 
This reverts commit 9017852de4.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26947>
 2024-01-12 14:42:55 +00:00
Pierre-Eric Pelloux-Prayer
4e76c4ecb4 radeonsi: compute epitch when modifying surf_pitch 
In the linear case with no mipmaps addrlib sets epitch to surf_pitch - 1
so lets do the same thing here.

The change in si_descriptors.c looks like it's papering over a bug but I
couldn't find any other changes that wouldn't break at least one use case.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10375
Fixes: 115b61e51f ("ac/surface: don't oversize surf_size")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26947>
 2024-01-12 14:42:55 +00:00
Tapani Pälli
810c1f7747 hasvk: remove gfx9 specific cs stall from emit_ps_depth_count 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26997>
 2024-01-12 14:01:08 +00:00
Tapani Pälli
30c148fd16 hasvk: remove softpin (GFX_VERx10 >= 90) related code 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26997>
 2024-01-12 14:01:08 +00:00
Tapani Pälli
ed2743258a hasvk: remove gfx9 specific code from emit_sample_pattern 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26997>
 2024-01-12 14:01:08 +00:00
Tapani Pälli
4d3d3a495f hasvk: remove cmd_buffer_ray_query_globals function decl 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26997>
 2024-01-12 14:01:08 +00:00
Job Noorman
b4015a1894 tu: support l1 dcache size on musl 
musl doesn't support _SC_LEVEL1_DCACHE_LINESIZE so calculate the size
manually like on Bionic.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27031>
 2024-01-12 13:21:10 +00:00
Rohan Garg
91798bab2d anv: refactor emit_dynamic_buffer_binding_table_entry 
Refactor emit_dynamic_buffer_binding_table_entry to emit a null surface
state when the descriptor has no assocaited buffers allowing us to drop
the same check elsewhere.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27005>
 2024-01-12 11:55:41 +00:00
Juan A. Suarez Romero
49794473c7 v3d/vc4/ci: reset the list of timeout tests 
Check all the timeout tests in the skip list to remove those that are
not timeout anymore, and add new ones.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27027>
 2024-01-12 09:33:39 +00:00
Daniel Schürmann
09413ff745 aco/insert_exec_mask: only create loop phis for exec mask if necessary 
Totals from 195 (0.25% of 79242) affected shaders: (GFX11)

Instrs: 476457 -> 476031 (-0.09%); split: -0.23%, +0.14%
CodeSize: 2453964 -> 2452108 (-0.08%); split: -0.23%, +0.16%
SpillSGPRs: 944 -> 913 (-3.28%); split: -3.39%, +0.11%
SpillVGPRs: 838 -> 835 (-0.36%); split: -0.95%, +0.60%
Latency: 10811026 -> 10810125 (-0.01%); split: -0.08%, +0.07%
InvThroughput: 2276677 -> 2276698 (+0.00%); split: -0.12%, +0.12%
VClause: 9223 -> 9233 (+0.11%); split: -0.10%, +0.21%
SClause: 9025 -> 9005 (-0.22%); split: -0.38%, +0.16%
Copies: 67419 -> 67382 (-0.05%); split: -0.97%, +0.92%
PreSGPRs: 10830 -> 10668 (-1.50%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26937>
 2024-01-12 09:05:15 +00:00
Daniel Schürmann
e83d8e1366 aco/insert_exec_mask: replace phi for loop restore mask with explicit copies 
Totals from 1785 (2.25% of 79242) affected shaders: (GFX11)

Instrs: 6787574 -> 6787041 (-0.01%); split: -0.01%, +0.00%
CodeSize: 34906500 -> 34904704 (-0.01%); split: -0.01%, +0.01%
SpillSGPRs: 5848 -> 5816 (-0.55%)
Latency: 88616877 -> 88617209 (+0.00%); split: -0.00%, +0.00%
InvThroughput: 16644948 -> 16644717 (-0.00%); split: -0.00%, +0.00%
VClause: 141122 -> 141121 (-0.00%)
SClause: 178929 -> 178906 (-0.01%); split: -0.03%, +0.02%
Copies: 569444 -> 569081 (-0.06%); split: -0.09%, +0.03%
Branches: 186980 -> 186961 (-0.01%); split: -0.01%, +0.00%
PreSGPRs: 133648 -> 133369 (-0.21%)
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26937>
 2024-01-12 09:05:15 +00:00
Daniel Schürmann
d375d297cf aco/insert_exec_mask: unify exec restore code after divergent control flow 
No fossil-db changes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26937>
 2024-01-12 09:05:15 +00:00
Eric Engestrom
eb96a4bffe docs: fix syntax highlighting on shell commands 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27010>
 2024-01-12 08:13:39 +00:00
Eric Engestrom
eb505979ba docs: fix syntax highlighting on non-code text snippet 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27010>
 2024-01-12 08:13:39 +00:00
Pavel Ondračka
83b5745404 r300/ci: move streaming-texture-leak from fails to skips 
While it passes locally, the runners are slow enough to not make it in
60 seconds so just move it to skips.

Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26973>
 2024-01-12 07:30:01 +00:00
Pavel Ondračka
328b1ae02a r300/ci: add the KHR gles2 tests 
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26973>
 2024-01-12 07:30:00 +00:00
Pavel Ondračka
13b1ff33ab r300/ci: switch to deqp-runner suite 
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26973>
 2024-01-12 07:30:00 +00:00
Tatsuyuki Ishi
63827751e1 radv: Recompute max_waves after postprocessing RT config 
The max waves for RT prolog need to be recalculated after merging the
resource usage of all shaders invoked from it.

Note that there is no need to panic, as the info was only used to
calculate maximum scratch size and with the RT prolog being low
footprint, this likely only caused overestimation rather than
underestimation.

Fixes: 533ec9843e ("radv: Precompute shader max_waves.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26998>
 2024-01-12 02:39:32 +00:00
José Roberto de Souza
475661a64e intel/isl/xe2: Disable route of Sampler LD message to LSC 
This optimization is causing some tests groups to fail, like:
dEQP-VK.image.mutable.2d_array.*
dEQP-VK.api.copy_and_blit.core.blit_image.all_formats.*

So disabling it until properly fixed.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27016>
 2024-01-12 01:51:59 +00:00
Alyssa Rosenzweig
89de5e22ae asahi: don't use NIR_PASS_V 
find . -type f -exec sed -ie 's/NIR_PASS_V(/NIR_PASS(_, /' \{} \;

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
375ad0ef26 asahi: don't use NIR_PASS for removing entrypoints 
it's not a real nir pass, doesn't do metadata, etc.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
afefcc3b30 asahi: avoid silly internal NIR_PASS in gs lowering 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
c87d46b600 asahi: return progress from passes 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
8a6850d33c agx: return progress from passes 
so we can be smarter about validation

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
26cedede0d agx: unset silly nir opts 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
01344819b0 agx: fix metadata in layer lowering 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
fe04e85be9 agx: only lower vars to ssa once 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
08fc7a4082 agx: stop lowering in opt loop 
silly

total instructions in shared programs: 2278756 -> 2278751 (<.01%)
instructions in affected programs: 587 -> 582 (-0.85%)
helped: 2
HURT: 0

total bytes in shared programs: 15008934 -> 15008916 (<.01%)
bytes in affected programs: 3794 -> 3776 (-0.47%)
helped: 2
HURT: 0

total halfregs in shared programs: 519245 -> 519253 (<.01%)
halfregs in affected programs: 63 -> 71 (12.70%)
helped: 0
HURT: 1

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
9dfb072ae3 agx: ingest undefs in the backend 
in prep for doing smarter things with them. stats changes seem to be RA
lottery, maybe?

total instructions in shared programs: 2277305 -> 2278756 (0.06%)
instructions in affected programs: 4003 -> 5454 (36.25%)
helped: 0
HURT: 9
Instructions are HURT.

total bytes in shared programs: 15000418 -> 15008934 (0.06%)
bytes in affected programs: 27072 -> 35588 (31.46%)
helped: 0
HURT: 9
Bytes are HURT.

total halfregs in shared programs: 519229 -> 519245 (<.01%)
halfregs in affected programs: 30 -> 46 (53.33%)
helped: 0
HURT: 2

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
b14987bf90 agx: rm deadcode 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00
Alyssa Rosenzweig
aee66f4c8f mesa/st: don't use NIR_PASS_V 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26976>
 2024-01-12 01:13:03 +00:00