Commit Graph

88832 Commits

Author SHA1 Message Date
Eric Engestrom
30cf9ffb59 docs: https all the links \o/
Most of them already redirected to https anyway, so we might as well
avoid the redirection and the security implications by linking directly
to the right protocol.

Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-09 11:28:15 +00:00
Eric Engestrom
2b0fe3cff7 docs: fix gallium wiki link in relnotes
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-09 11:28:10 +00:00
Eric Engestrom
9f8a6a5b79 docs: update 'thanks' for hosting
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-09 11:26:22 +00:00
Samuel Iglesias Gonsálvez
ca16f0a282 i965/fs: add support for int64 to bool conversion
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-02-09 10:18:34 +01:00
Samuel Iglesias Gonsálvez
824e1bb078 nir: add opcode to perform int64 to bool conversions
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-02-09 10:18:34 +01:00
Samuel Iglesias Gonsálvez
7ab26613db i965/fs: Add support for nir_op_[iu]2[iu]32
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-02-09 10:18:34 +01:00
Samuel Iglesias Gonsálvez
7b5834ff54 i965/fs: Add support for nir_op_[iu]642f
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-02-09 10:18:34 +01:00
Samuel Iglesias Gonsálvez
b115407d75 i965/fs: legalize [u]int64 to 32-bit data conversions in lower_d2x
Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-02-09 10:18:34 +01:00
Jason Ekstrand
8734461c58 i965/fs: Add support for nir_op_[iu]642d
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2017-02-09 10:18:34 +01:00
Jason Ekstrand
91d2d26f33 i965: Allow int64 conversion operations in channel_expressions
This fixes 143 of the new piglit tests added by Nicolai

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
2017-02-09 10:18:34 +01:00
Timothy Arceri
f3d911463e util/disk_cache: stop using ralloc_asprintf() unnecessarily
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2017-02-09 14:11:24 +11:00
Timothy Arceri
0bf21519b7 glsl: add param to force shader recompile
This will be used to skip checking the cache and force a recompile.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2017-02-09 12:22:56 +11:00
Timothy Arceri
4026b45bbc util: add a disk_cache_remove() function
This will be used to remove cache items created with old versions
of Mesa or other invalid cache items from the cache.

V2: rename stub function (cache_* funtions were renamed disk_cache_*)
in master.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2017-02-09 12:22:56 +11:00
Timothy Arceri
a3fd8bb8c5 st/mesa/i965: create link status enum
For the on-disk shader cache we want to be able to differentiate
between a program that was linked and one that was loaded from cache.

V2:
 - don't return the new enum directly to the application when queried,
   instead return GL_TRUE or GL_FALSE as required. Fixes google-chrome
   corruptions when using cache.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2017-02-09 12:22:56 +11:00
Brian Paul
ac5845453c docs: update intro.html to mention new APIs, etc
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2017-02-09 00:02:20 +00:00
Brian Paul
b2722a8970 docs: the site is now hosted by freedesktop.org
Reviewed-by: Eric Engestrom <eric@engestrom.ch>
2017-02-09 00:02:13 +00:00
Bas Nieuwenhuizen
f22836dbdd radv: Add CPU color packing for VK_FORMAT_A2B10G10R10_UNORM_PACK32.
For allowing fast color clears in the main render targets of dota2.

[airlied: fix clear_vals[1] as suggested by Andres.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-08 22:43:11 +00:00
Roland Scheidegger
f64d74aa19 mesa: (trivial) include <inttypes.h> for PRIx64 macros
Fixes a compile error with mingw.
2017-02-08 21:56:16 +01:00
Tim Rowley
c1aa444a3e swr: [rasterizer jitter] Pass LLVM-IR size into jitter
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:58:13 -06:00
Tim Rowley
e0a829d320 swr: [rasterizer core] Frontend SIMD16 WIP
Removed temporary scafolding in PA, widended the PA_STATE interface
for SIMD16, and implemented PA_STATE_CUT and PA_TESS for SIMD16.

PA_STATE_CUT and PA_TESS now work in SIMD16.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:58:06 -06:00
Tim Rowley
79174e52b5 swr: [rasterizer jitter] Disable unsafe FP optimizations in the jitter
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:58:00 -06:00
Tim Rowley
db599e316a swr: [rasterizer core] Frontend SIMD16 WIP
Widen simdvertex to SIMD16/simd16vertex in frontend for passing VS
attributes from VS to PA.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:57:52 -06:00
Tim Rowley
09c54cfd2d swr: [rasterizer jitter] Add DEBUGTRAP jit builder function
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:57:47 -06:00
Tim Rowley
b01f26e005 swr: [rasterizer jitter] Multisample blend jit fix
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:57:41 -06:00
Tim Rowley
8780706c62 swr: [rasterizer jitter] Change SimdVector representation to array
Make all SimdVectors in LLVM represented as simdscalar[4] rather
than a struct.

Fixes issues with promotion of values from i32 to i64 to match
register width.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:57:33 -06:00
Tim Rowley
d159b0bf34 swr: [rasterizer jitter] Fix issues with stream-out on llvm>=3.8
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:57:27 -06:00
Tim Rowley
8423ad437b swr: [rasterizer jitter] Adjust jitter header includes
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:57:20 -06:00
Tim Rowley
feecd7dcf5 swr: [rasterizer core] Frontend SIMD16 WIP
SIMD16 Primitive Assembly (PA) only supports TriList and RectList.

CUT_AWARE_PA, TESS, GS, and SO disabled in the SIMD16 front end.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
2017-02-08 13:57:10 -06:00
Eric Engestrom
a618d6c3e9 docs: update package contents
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-08 12:00:28 -07:00
Eric Engestrom
06e40dc671 docs: fix unpacking instructions
File names were wrong, file formats were wrong, bunzip command was
wrong...

I also removed all but the simplest example; people who use pipes already
know how to untar, so let's simplify and remove potential confusion for
non-tech-savvy users.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-08 12:00:24 -07:00
Eric Engestrom
d7e1a16f1a docs: remove dead 'beta' link
Release candidates haven't been in a 'beta' subdir in a long time, so let's
replace the dead link with an explanation instead.

Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-08 12:00:19 -07:00
Eric Engestrom
5b10c362de docs: add a note about the new version scheme
Signed-off-by: Eric Engestrom <eric.engestrom@imgtec.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2017-02-08 12:00:14 -07:00
Bartosz Tomczyk
94262e5f5d r600/sb: Fix memory leak
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
2017-02-08 17:36:05 +01:00
Timothy Arceri
90014d0766 mesa: use PRId64/PRIu64 when printing 64-bit ints
V2: actually use PRIu64

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-02-08 13:50:01 +11:00
Dave Airlie
c674f11e42 mesa/st: fix strict aliasing issue in int64 code.
This fixes the int64 code same as the double code.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-08 02:13:07 +00:00
Dave Airlie
30cff4f5f7 mesa/uniform: fix strict aliasing issues with int64 code.
This fixes these like the double version does.

Reviewed-by: Timothy Arceri <t_arceri@yahoo.com.au>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-08 02:12:31 +00:00
Dave Airlie
6d5d6dad20 radv: handle dcc in explicit image resolve path. (v2)
We need to initialize dcc like we do in the subpass path.

v2: fix initial/final layouts
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-02-07 23:31:08 +00:00
Bas Nieuwenhuizen
0d1283850b radv: Enable fast clears by default.
Works for me on dota2 and talos now.

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Andres Rodriguez <andresx7@gmail.com>
2017-02-07 22:58:06 +01:00
Jason Ekstrand
1de3cd8a34 spirv: Add more asserts in vtn_vector_construct
Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99465
2017-02-07 08:08:06 -08:00
Emil Velikov
25aa98c014 configure.ac: remove src/gallium/winsys/intel/drm/Makefile reference
Not wired up (not referenced in any SUBDIR), leading to `make distcheck'
failure.

Fixes: d77fa310ed "ilo: EOL drop unmaintained gallium drv from buildsys"
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-07 14:18:13 +00:00
Emil Velikov
73bce69938 docs: reword ilo removal note
Properly annotate <li> and keep the note analogous to all the previous
ones - OpenVG, st/egl, etc.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
2017-02-07 14:18:12 +00:00
Boyan Ding
97495c428d configure.ac: Remove redundant libglvnd stanza
There were two "libglvnd configuration" section in the squashed commit
that added libglvnd support, while only one in the original libglvnd
branch. A following commit moves one of them downwards. Now remove the
upper "older" one and move GL_LIB name decision downwards after the new
libglvnd configuration section.

Reviewed-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Boyan Ding <boyan.j.ding@gmail.com>
2017-02-07 14:17:53 +00:00
Emil Velikov
bef4d74047 travis: use both cores for make/make check
The instance offers 2 cores, so use them to speed things up.

v2: Set MAKEFLAGS instead [Eric]
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-02-07 11:14:10 +00:00
Emil Velikov
30267172c7 travis: add nearly all gallium drivers to the list
Note: we need the explicit --enable-freedreno for libdrm since the
latter is 'smart' and disables it if building on !arm platforms.

The radeonsi and swr are explicitly left out since they require
'too-recent' LLVM - 3.6

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-02-07 11:14:10 +00:00
Emil Velikov
96d86b18ee travis: correct libdrm required regex to also track libdrm itself
The current regex was tracking only the libdrm_foo packages, while with
recent changed we bumped only (and rightfully so) libdrm.

Fix the regex to track any libdrm package.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Rhys Kidd <rhyskidd@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-02-07 11:14:10 +00:00
Emil Velikov
49f6408940 configure.ac: add swr to the gallium drivers list.
v2: Rebase on top of ILO removal.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-02-07 11:14:10 +00:00
Emil Velikov
9d5b681a11 configure.ac: list all the dri-drivers in the help string
It's unlikely that any of the additions come as a suprise to anyone
i915, nouveau, radeon, r200. Regardless, state clearly what's
available.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Andres Gomez <agomez@igalia.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2017-02-07 11:14:09 +00:00
Marc Di Luzio
21efe2528c glsl: correct compute shader checks for memoryBarrier functions
As per the spec -
"The functions memoryBarrierShared() and groupMemoryBarrier() are
available only in compute shaders; the other functions are available
in all shader types."

Conform to this by adding another delegate to check for compute
shader support instead of only whether the current stage is compute

This allows some fragment shaders in Dirt Rally to compile

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-02-06 21:12:33 -08:00
Li Qiang
83fb63d31d gallium/tgsi: fix oob access in parse instruction
When parsing texture instruction, it doesn't stop if the
'cur' is ',', the loop variable 'i' will also be increased
and be used to index the 'inst.TexOffsets' array. This can lead
an oob access issue. This patch avoid this.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Li Qiang <liq3ea@gmail.com>
2017-02-07 14:00:04 +10:00
Kenneth Graunke
ce8a63de6d Revert "i965: Disable guardband clipping in the smaller-than-viewport case."
This reverts commit 0bac2551e4.

Now that we position the guardband correctly (applying translations
in addition to scaling) and made it as large (or larger) than the
render target, this shouldn't be necessary.

Now we leave guardband clipping enabled 100% of the time, like the
Windows driver does.

Fixes GL45-CTS.gtf21.GL2FixedTests.clip.clip.  It tries to draw a
16384x64 rectangle, and it appears that some kind of numerical
imprecisions in the clipper result in some edge pixels going missing.
The Windows driver passes this test because of guardband clipping.

Cc: "17.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-02-06 17:40:14 -08:00