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123 Commits

Author SHA1 Message Date
Konstantin Seurer
1a95d43e55 radv: Simplify the meta init fail path 
Move most of the the cleanup into radv_device_init_meta.

Signed-off-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17652>
 2022-07-22 07:51:14 +00:00
Jason Ekstrand
1436fa55a6 radv: Use the common image offset/extent sanitize helpers 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16873>
 2022-06-07 17:57:41 +00:00
Samuel Pitoiset
2fd5aa79b2 radv: use the fragment resolve path by default on GFX11 
GFX11 doesn't support CB_RESOLVE which means it doesn't support the
hardware resolve path. If necessary (for arrays or integer formats)
the driver will select the compute path.

No CTS regressions by forcing the fragment resolve path on GFX10.3

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16557>
 2022-05-26 07:43:38 +00:00
Jason Ekstrand
d9048e31a0 radv: Use vk_image_view as the base for radv_image_view 
I've left the extent field because, even though it looks like it should
be roughly equivalent, it's weirdly different on different hardware and
I didn't want to mess with it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16376>
 2022-05-17 18:14:55 +00:00
Jason Ekstrand
c56f3dcbaa radv: Use vk_image as the base for radv_image 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16376>
 2022-05-17 18:14:55 +00:00
Marek Olšák
39800f0fa3 amd: change chip_class naming to "enum amd_gfx_level gfx_level" 
This aligns the naming with PAL.

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pellou-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16469>
 2022-05-13 14:56:22 -04:00
Samuel Pitoiset
3dc86e4080 radv: implement VK_EXT_image_2d_view_of_3d 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16294>
 2022-05-13 17:53:25 +00:00
Rhys Perry
8e0e98a9af radv: initialize meta shader options earlier 
We might need this for NIR builders.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15854>
 2022-04-15 23:56:11 +00:00
Samuel Pitoiset
7c14671535 radv: use the common vk_framebuffer 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15612>
 2022-04-01 08:21:59 +02:00
Samuel Pitoiset
e6fac090e6 radv: convert the meta resolve HW path to dynamic rendering 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15612>
 2022-04-01 08:21:53 +02:00
Samuel Pitoiset
9309c3d887 radv: rework the workaround that disables DCC for incompatible copies 
Rely on the image view to avoid using an extra structure for the
render pass. This will allow to convert the meta operations to
dynamic rendering.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15612>
 2022-04-01 08:21:52 +02:00
Samuel Pitoiset
2b18234e61 radv: drop EXT or KHR suffixes for stuff promoted in Vulkan 1.3 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15663>
 2022-03-31 07:13:17 +00:00
Dave Airlie
1ec4e568de radv: abstract queue family away from queue family index. 
If we introduce another queue type (video decode) we can have a
disconnect between the RADV_QUEUE_ enum and the API queue_family_index.

currently the driver has
GENERAL, COMPUTE, TRANSFER which would end up at QFI 0, 1, <nothing>
since we don't create transfer.

Now if I add VDEC we get
GENERAL, COMPUTE, TRANSFER, VDEC at QFI 0, 1, <nothing>, 2
or if you do nocompute
GENERAL, COMPUTE, TRANSFER, VDEC at QFI 0, <nothing>, <nothing>, 1

This means we have to add a remapping table between the API qfi
and the internal qf.

This patches tries to do that, in theory right now it just adds
overhead, but I'd like to exercise these paths.

v2: add radv_queue_ring abstraction, and pass physical device in,
as it makes adding uvd later easier.
v3: rename, and drop one direction as unneeded now, drop queue_family_index
from cmd_buffers.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13687>
 2022-03-11 04:38:55 +00:00
Jason Ekstrand
29a164b088 radv: Use vk_command_pool 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14917>
 2022-02-11 08:06:24 +00:00
Samuel Pitoiset
7b7debe8f9 radv: fix restoring subpass during hw/fs color resolves 
This fixes an stack-use-after-scope detect by ASAN because the
subpass is used after the loop by radv_mark_noncoherent_rb().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14317>
 2021-12-28 12:53:12 +00:00
Rhys Perry
d74498e617 radv: add radv_meta_init_shader 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14087>
 2021-12-08 11:07:40 +00:00
Samuel Pitoiset
943ef0edbd radv: avoid prefixing few VkXXX structures by struct 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14115>
 2021-12-07 20:23:48 +00:00
Samuel Pitoiset
52b4185012 radv: switch the remaining stages/access to VK_PIPELINE_STAGE_2/VK_ACCESS_2 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13549>
 2021-11-26 13:41:23 +00:00
Samuel Pitoiset
8df17163c7 radv: implement vkCmdWaitEvents2KHR()/vkCmdPipelineBarrier2KHR() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13549>
 2021-11-26 13:41:22 +00:00
James Park
0aaaee09a4 radv: Match function definitions to declarations 
Fixes compiler errors for 32-bit Windows.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13749>
 2021-11-12 09:46:10 +00:00
Bas Nieuwenhuizen
64b237436a radv: Add hooks after in-renderpass meta operations. 
So that we can mark the rendertargets dirty.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13239>
 2021-10-13 14:07:05 +00:00
Samuel Pitoiset
f07e67272e radv: fix vk_object_base_init/finish for internal image views 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13102>
 2021-10-01 07:26:37 +00:00
Samuel Pitoiset
df90bb3f88 radv: remove useless check about number of samples in the HW resolve path 
Although this can likely hang, this is invalid and should be caught
by the validation layers. There is many ways to hang the GPU with VK,
this check alone is useless.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12556>
 2021-08-27 07:29:17 +00:00
Samuel Pitoiset
b05c2023cc radv: remove outdated radv_finishme() in the HW resolve path 
Resolving layered MSAA images is actually implemented by the HW
resolve path but never used because the driver uses the compute path.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12556>
 2021-08-27 07:29:17 +00:00
Samuel Pitoiset
0b637919a8 radv: fix specifying the stencil layout for separate depth/stencil layouts 
The Vulkan spec has been updated few months ago again and pNext is
always honored if present.

Found this with vkd3d-proton which implemented separate depth/stencil
layouts recently.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11903>
 2021-07-16 09:20:58 +02:00
Samuel Pitoiset
7af5a0c1b9 radv: only init DCC if compressed in the HW resolve path 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10667>
 2021-05-26 06:59:35 +00:00
Samuel Pitoiset
bdb9634151 radv: pass an image range to radv_layout_dcc_compressed() 
With DCC and mipmaps, some mips can't be compressed and it makes
sense to check this here.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10667>
 2021-05-26 06:59:35 +00:00
Marek Olšák
3f074d2f45 ac/surface: inline and reorder gfx9_surf_flags for better packing 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10083>
 2021-04-12 20:53:45 +00:00
Bas Nieuwenhuizen
59c501ca35 radv: Format. 
Using

find ./src/amd/vulkan -regex '.*/.*\.\(c\|h\|cpp\)' | xargs -P8 -n1 clang-format --style=file -i

Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10091>
 2021-04-10 03:31:58 +02:00
Samuel Pitoiset
8b80e8f832 radv: init CMASK/FMASK/DCC in parallel 
To remove bubbles during layout transitions from UNDEFINED, especially
with MSAA because we might have all.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10004>
 2021-04-05 16:21:12 +00:00
Samuel Pitoiset
57916fbdcd radv: use COLOR_ATTACHMENT_OPTIMAL for fast clear/hw resolve operations 
This should be equivalent without needed to force enable FMASK for
some specific internal pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9940>
 2021-04-02 08:36:19 +02:00
Samuel Pitoiset
fb648634b0 radv: use common entrypoints for VK_KHR_copy_commands2 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9600>
 2021-03-17 07:43:36 +00:00
Mike Blumenkrantz
1d1c7a965c radv: use common interfaces for shader modules 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9508>
 2021-03-15 21:47:44 +00:00
Jason Ekstrand
8304b4eef7 radv/meta: Use CreateRenderPass2 
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8857>
 2021-03-10 18:17:31 +00:00
Samuel Pitoiset
97925cee8d radv: remove useless decompression of the DS resolve attachment 
The DS resolve attachment is the destination attachment, it doesn't
need to be decompressed before resolving the depth/stencil attachment.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9256>
 2021-03-01 18:10:35 +00:00
Samuel Pitoiset
e5d8b731e4 radv: emit missing subpass resolve marker for SQTT 
RGP now shows CmdEndRenderPassResolve() in the Event timing panel.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9106>
 2021-02-22 08:30:38 +01:00
Samuel Pitoiset
491a1949eb radv: rework radv_cmd_buffer_resolve_subpass() a bit 
To emit the subpass resolve marker properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9106>
 2021-02-22 08:30:36 +01:00
Bas Nieuwenhuizen
12ce72fcfc radv: Use stricter HW resolve swizzle compat check. 
D and linear are both DISPLAY micro tiling according to ac_surface
but don't work together. This fixes an issue with GFX9+.

This fixes the SkQP WritePixelsNonTexture_Gpu test.

Fixes: 69ea473eeb ("amd/addrlib: update to the latest version")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8665>
 2021-01-25 20:53:16 +00:00
Samuel Pitoiset
60ead6e04b radv: add a comment explaining the micro tile mode resolve 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8558>
 2021-01-19 18:52:43 +01:00
Bas Nieuwenhuizen
8f8d72af55 radv: Use access helpers for flushing with meta operations. 
This way we're properly using the vulkan barrier paradigm instead
of adhoc guessing what caches need to be flushed. This is more robust
for cache policy changes as we now don't have to revisit all the meta
operations all the time.

Note that a barrier has both a src and dst part though. So

barrier:
   flush src
   meta op
   flush dst

becomes

barrier:
  flush barrier src
  flush meta op dst
  meta op
  flush meta op src
  flush barrier dst

And there are some places where we've been able to replace a CB flush
with a shader flush because that is what we'd need according to vulkan rules
(and it turns out that in the cases the CB flush mattered the app will set the
bit in one of the relevant flushes or it was needed as a result of an optimization
that we counter-acted in the previous patch.)

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7202>
 2021-01-13 16:27:19 +00:00
Samuel Pitoiset
20af07d089 radv: fix color resolves if the dest image has DCC 
Using the graphics resolve path when DCC is enabled should only be
a hint to avoid DCC fixup.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3388
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8326>
 2021-01-12 16:03:36 +00:00
Bas Nieuwenhuizen
f23eaf0db6 radv: Add option to disable DCC in renderpasses without layout. 
If DCC is enabled for GENERAL then we cannot disable DCC by going
to the GENERAL layout.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7004>
 2020-12-21 18:32:24 +00:00
Samuel Pitoiset
7880faccc5 radv: add missing DB flush after depth/stencil resolve operations 
I thought this was a bug in CTS but the Vulkan spec says:

    "VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT specifies write access
     to a color, resolve, or depth/stencil resolve attachment during
     a render pass or via certain subpass load and store operations."

So, VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT is used to synchronize
depth/stencil resolve attachments. Yes, it's counterintuitive.

This can't actually be fixed properly for now because RADV performs
the end subpass barrier *before* resolve attachments instead of after.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8138>
 2020-12-17 15:19:57 +00:00
Samuel Pitoiset
cd59c22325 ac,radv: use better export formats for 8-bit when RB+ isn't allowed 
When RB+ is enabled, R8_UINT/R8_SINT/R8_UNORM should use FP16_ABGR
for 2x exporting performance. Otherwise, use 32_R to remove useless
instructions needed for 16-bit compressed exports.

fossils-db (Vega10):
Totals from 8858 (6.35% of 139517) affected shaders:
SGPRs: 801248 -> 801210 (-0.00%); split: -0.01%, +0.00%
VGPRs: 596224 -> 596120 (-0.02%); split: -0.02%, +0.01%
CodeSize: 71462452 -> 71356684 (-0.15%); split: -0.15%, +0.00%
MaxWaves: 37097 -> 37105 (+0.02%); split: +0.04%, -0.02%
Instrs: 13963177 -> 13950809 (-0.09%); split: -0.09%, +0.00%
Cycles: 1476539360 -> 1476489996 (-0.00%); split: -0.00%, +0.00%
VMEM: 2363008 -> 2361349 (-0.07%); split: +0.04%, -0.11%
SMEM: 550362 -> 549977 (-0.07%); split: +0.01%, -0.08%
VClause: 245704 -> 245727 (+0.01%); split: -0.01%, +0.02%
SClause: 485161 -> 485104 (-0.01%); split: -0.01%, +0.00%
Copies: 1420034 -> 1422310 (+0.16%); split: -0.01%, +0.17%
Branches: 518710 -> 518705 (-0.00%)
PreSGPRs: 706633 -> 706584 (-0.01%)
PreVGPRs: 547163 -> 547007 (-0.03%); split: -0.03%, +0.01%

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7512>
 2020-11-23 17:54:16 +00:00
Eric Anholt
eda3e4e055 nir/builder: Add a name format arg to nir_builder_init_simple_shader(). 
This cleans up a bunch of gross sprintfs and keeps the caller from needing
to remember to ralloc_strdup.  I added a couple of '"%s", name ? name :
""' to radv where I didn't fully trace through whether a non-null name was
being passed in.

I also took the liberty of adding a basic name to a few shaders (pan_blit,
unit tests)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
 2020-11-11 08:50:29 -08:00
Eric Anholt
5f992802f5 nir/builder: Drop the mem_ctx arg from nir_builder_init_simple_shader(). 
This looks a lot more simple now!

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
 2020-11-11 08:50:29 -08:00
Eric Anholt
4e9328e3b6 nir_builder: Return a new builder from nir_builder_init_simple_shader(). 
It's a little inline function, so we can just RAII it for better
ergonomics.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7323>
 2020-11-11 08:49:49 -08:00
James Park
28d02b9d3e ac,amd/llvm,radv: Initialize structs with {0} 
Necessary to compile with MSVC.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7123>
 2020-10-14 12:15:23 +00:00
Rhys Perry
19561f31a8 radv: remove trailing whitespace 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7043>
 2020-10-07 11:53:23 +00:00
Samuel Pitoiset
0401507b77 radv: add support for CmdResolveImage2KHR() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6813>
 2020-09-23 07:14:15 +00:00