Brian Paul
ecadb51bbc
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
2008-09-18 15:17:05 -06:00
Eric Anholt
8db761409d
intel: Add a width field to regions, and use it for making miptrees in TFP.
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Otherwise, we would use the pitch as width of the texture, and compiz would
render the pitch padding on the right hand side.
2008-09-12 15:48:13 -07:00
Dave Airlie
f75843a517
Revert "Revert "Merge branch 'drm-gem'""
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This reverts commit 7c81124d7c
2008-08-24 17:59:10 +10:00
Dave Airlie
7c81124d7c
Revert "Merge branch 'drm-gem'"
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This reverts commit 53675e5c05
2008-08-24 17:52:40 +10:00
Eric Anholt
902e401a38
intel: Don't return a renderbuffer with alpha when just GL_RGB is requested.
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Fixes oglconform rbGetterFuncs testcase. The span code for this mode hasn't
actually been tested.
2008-07-26 17:39:23 -07:00
Eric Anholt
2e37143800
intel: Add a little span cache to spead up readpixels by cutting syscalls.
2008-07-23 10:21:25 -07:00
Eric Anholt
d2d5abfaeb
intel-gem: Use pread/pwrite for span access.
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This will avoid clflushing entire buffers for small acesses, such as those
commonly used by regression tests.
2008-07-23 10:21:25 -07:00
Eric Anholt
2e841880cf
drm-gem: Use new GEM ioctls for tiling state, and support new swizzle modes.
2008-07-11 18:58:19 -07:00
Eric Anholt
19f585a3cf
intel-gem: Fix Y-tiling span setup.
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The boolean that the server gives us for whether the region is tiled was
getting used as the enum for what tiling mode. Instead, guess the correct
tiling in screen setup.
Also, fix the Y-tiling pitch setup. The pitch to the next tile in Y is
32 scanlines, not 8.
2008-07-02 09:10:21 -07:00
Keith Packard
537bbe6dec
[intel-GEM] Add tiling support to swrast.
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Accessing tiled surfaces without using the fence registers requires that
software deal with the address swizzling itself.
2008-05-06 10:51:08 -07:00
Xiang, Haihao
f94d317d7a
intel: fix abort issue with shadowtex demo when use
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DEPTH_STENCIL texture. (bug#14952).
2008-03-14 11:50:11 +08:00
Eric Anholt
c741d287ec
[intel] Allow attIndex to be negative to avoid defeating the >= 0 check.
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Otherwise, we would go wildly out of bounds if passed -1 (no renderbuffer), such
as while doing LOCK_HARDWARE with glDrawBuffer(GL_NONE).
2008-02-15 13:48:11 -08:00
Kristian Høgsberg
e131c46b20
[intel] Simplify intelCreateBuffer() a bit.
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Drop a bunch of unused arguments from intel_create_renderbuffer() and
introduce intel_renderbuffer_set_region() to set the region for
a renderbuffer.
2008-01-09 20:43:18 -05:00
Brian
601a6b872c
Replace gl_framebuffer's _ColorDrawBufferMask with _ColorDrawBufferIndexes
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Each array element is now a BUFFER_x token rather than a BUFFER_BIT_x bitmask.
The number of active color buffers is specified by _NumColorDrawBuffers.
This builds on the previous DrawBuffer changes and will help with drivers
implementing GL_ARB_draw_buffers.
2008-01-06 18:07:26 -07:00
Eric Anholt
bea6b5fe5a
[965] Enable EXT_framebuffer_object.
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To do so, merge the remainnig necessary code from the buffers, blit, span, and
screen code to shared, and replace it with those.
2007-12-20 11:32:55 -08:00
Eric Anholt
7c71ef3a3d
[intel] Move bufmgr back to context instead of screen, fixing glthreads.
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Putting the bufmgr in the screen is not thread-safe since the emit_reloc
changes. It also led to a significant performance hit from pthread usage
for the attempted thread-safety (up to 12% of a cpu spent on refcounting
protection in single-threaded 965). The motivation had been to allow
multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
2007-12-12 11:52:10 -08:00
Eric Anholt
77a5bcaff4
[intel] Move over files that will be shared with 965-fbo work.
2007-11-09 14:27:33 -08:00
