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1200 Commits

Author SHA1 Message Date
Lionel Landwerlin
1e081bd680 anv: split 3DSTATE_TE packing between static & dynamic parts 
We can reduce the amount of packing we do by only packing the dynamic
part.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
 2023-09-06 20:07:02 +00:00
Lionel Landwerlin
19c3f3ede4 anv: categorize partial/final pipeline instruction 
The old gfx8 field doesn't apply anymore.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
 2023-09-06 20:07:02 +00:00
Lionel Landwerlin
1fdc089e9c anv: change anv_batch_emit_merge to also do packing 
Instead of having that function do only merging of 2 sets of dwords,
it can also do the packing of the new dynamic values. This saves us a
bunch of local structures to declare and calling the packing functions
ourselves.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24536>
 2023-09-06 20:07:01 +00:00
Jordan Justen
543a707b7b intel/common: Move intel_clflush.h to intel_mem.h/intel_mem.c 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22379>
 2023-09-06 01:39:53 +00:00
Jordan Justen
735026e811 anvil,hasvk: Rename need_clflush to need_flush 
$ git grep -l need_clflush | xargs sed -i 's/need_clflush/need_flush/g'

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22379>
 2023-09-06 01:39:53 +00:00
Lionel Landwerlin
2108742257 anv: reuse cmd_buffer::total_batch_size 
This was left unused after 624ac55721 ("anv: move total_batch_size to
anv_batch"). We're now going to use it to store the total amount of
commands written in a command buffer.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24628>
 2023-09-05 11:50:02 +00:00
Lionel Landwerlin
94e3e05b93 anv: rename total_batch_size 
This name is confusing, the real thing it represents is the allocated
amount of batch space.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24628>
 2023-09-05 11:50:02 +00:00
Chris Spencer
b492f73f87 anv/android: Enable shared presentable image support 
Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24941>
 2023-09-05 10:02:24 +00:00
Tapani Pälli
672155ee04 anv: implement Wa_14018912822 
When MSAA is enabled, instead of using BLENDFACTOR_ZERO use CONST_COLOR,
CONST_ALPHA and supply zero by using blend constants.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24714>
 2023-09-04 18:57:33 +00:00
Lionel Landwerlin
688bb37552 anv: deal with new pipeline flags 
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24387>
 2023-08-31 16:02:52 +03:00
Lionel Landwerlin
5c2aca456e anv: implement vkCmdBindIndexBuffer2KHR 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24387>
 2023-08-31 16:02:52 +03:00
Chris Spencer
35fddccf3f anv/android: Fix importing hardware buffers with planar formats 
Currently, we try to fetch the color aspect of the format and convert that
to an ISL format, which is then used to convert the pixel stride to bytes.
This does not work with planar formats because they don't have a color
aspect, and the planes can be of different sizes anyway, so may not have
the same byte stride. Change to calculate the stride individually for each
plane.

Signed-off-by: Chris Spencer <spencercw@gmail.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24388>
 2023-08-23 09:56:03 +00:00
Faith Ekstrand
b9870275b1 anv: Disable CCS_E for ISL_FORMAT_YCRCB_* 
We're about to start using YCRCB_NORMAL and YCRCB_SWAPUV for 8-bit
interleaved YCbCr and, while ISL claims CCS_E support, it's not well
tested and we don't think it's working yet for all of ANV's use-cases.
Disable it for now in ANV and only for YUV formats.

Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24619>
 2023-08-14 23:44:19 +00:00
Tapani Pälli
92941ee84b anv: implement required PSS sync for Wa_18019816803 
According to WA description, we need to track DS write state
and emit a PSS_STALL_SYNC whenever that state changes.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18411>
 2023-08-11 07:15:48 +00:00
Lionel Landwerlin
9934613c74 anv/hasvk: track robustness per pipeline stage 
And split them into UBO and SSBO

v2 (Lionel):
 - Get rid of robustness fields in anv_shader_bin
v3 (Lionel):
 - Do not pass unused parameters around

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17545>
 2023-08-09 09:00:12 +03:00
Yonggang Luo
d130c96bda util/treewide: Use alignas(x) instead __attribute__((aligned(x))) 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24571>
 2023-08-09 05:15:09 +00:00
Sagar Ghuge
49eabb9ea6 anv: Add GPU breakpoint before/after specific draw call 
This change allow us to insert the MI_SEMAPHORE_WAIT before/after
specific draw call. With GTX tool, we can always update the memory
address to unblock spinning wait.

v2:
- Make sure draw_call_count is thread-safe (Lionel)
- Add static inline helper (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24308>
 2023-08-08 17:36:19 +00:00
José Roberto de Souza
d686cadfbf intel: Sync xe_drm.h and rename engine to exec_queue 
Sync with commit f16c04291100 ("drm/xe: Rename engine to exec_queue").
With that Iris and ANV had some major renames that were done manually
as there is to many "engine" in non-related code.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24476>
 2023-08-07 21:34:14 +00:00
Felix DeGrood
7db2003209 anv: add fake sparse support 
Some DX12 games require sparse resource support but don't
actually use sparse resources. Add a way to make these games work
while we still don't have sparse resources fully working on every
KMD backend.

When fake_sparse=true, anv advertises sparse resource support
despite lacking full support.

Based-on-patch-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24046>
 2023-08-03 19:57:18 +00:00
José Roberto de Souza
f49989148a anv: Return earlier in anv_reloc_list functions 
Xe KMD don't need relocs, so calling a nop function and avoiding the
CPU cycles and memory waste with reloc.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24411>
 2023-08-01 22:30:04 +00:00
José Roberto de Souza
d9d284d050 anv: Remove VkAllocationCallbacks parameter from reloc functions 
Mismatch allocator could cause bad things, so better set the allocator
on anv_reloc_list_init() and use it in every reloc function.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24411>
 2023-08-01 22:30:04 +00:00
José Roberto de Souza
a7ab31b96a anv: Set MI_MATH MOCS field 
MOCS = 0 is a invalid MOCS index, so it is necessary get a valid value
and set to MI_MATH instructions.

So here the mocs index is set with mi_builder_set_mocs(), it can be
always set but it is required when mi_build will emit MI_MATH
instructions.
The mocs index will only be stored and used in gfx12.5+ platforms
so no changes were are required in crocus or hasvk.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22508>
 2023-08-01 19:49:45 +00:00
Faith Ekstrand
e4485bc062 anv: Use vk_query_pool 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>
 2023-08-01 19:17:05 +00:00
Faith Ekstrand
1d6d775ffe anv: Use vk_buffer_view 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>
 2023-08-01 19:17:05 +00:00
Faith Ekstrand
92f996d0fa anv: Use vk_sampler 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24409>
 2023-08-01 19:17:05 +00:00
Iván Briano
71ebd9b9d7 anv,hasvk: respect provoking vertex setting on geometry shaders 
We need to set the right value on ReorderMode based on the provoking
vertex mode, or the order in which the vertices for tristrip[_adj] are
delivered to the geometry shader doesn't match what Vulkan expects.

Fixes
dEQP-VK.transform_feedback.primitives_generated_query.concurrent.*triangle_strip_with_adjacency*

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23243>
 2023-07-27 18:52:49 +00:00
Rohan Garg
01965a2fe9 anv: drop CFE state validation checks 
anv no longer needs to track if the CFE state is valid since we ensure
that the state is valid at pipeline creation time.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23934>
 2023-07-21 10:46:08 +00:00
Felix DeGrood
b145d05381 anv: save a shader source uint32_t hash in gfx/compute pipelines 
Save lowest dword of shader source sha1 in pipeline object for use
later as hash for uniquely identifying shader in debug outputs.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23942>
 2023-07-20 09:08:08 +00:00
José Roberto de Souza
6f88e3befb anv: Add support for userptr in Xe KMD 
Xe KMD only requires userptr to be bound to VM, so here reusing
workaround_bo->gem_handle id to all userptr bos in Xe version of
gem_create_userptr(). The Xe version of gem_close() will make sure
that workaround_bo->gem_handle is not closed when userptr bos
are closed.

With the same gem_handle for all userptr bos, it was also necessary
skip the anv_device_lookup_bo() and manually allocate memory to store
anv_bo in host heap memory, what lead to some small changes in
anv_device_release_bo() as well.

The remaining changes are the support to VM bind userptr bos and the
gem_vm_bind() call in anv_device_import_bo_from_host_ptr().

Fixes: dEQP-VK.memory.external_memory_host*
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23787>
 2023-07-19 22:20:24 +00:00
José Roberto de Souza
7e7ab39424 anv: Add gem_create_userptr() to KMD backend 
Xe support of userptr will be implemented in the next patch,
this is just moving the i915 and stub functions to KMD backend.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23787>
 2023-07-19 22:20:24 +00:00
Iván Briano
4ad19c8310 anv: implement Wa_14019750404 
Cc: 23.2 <mesa-stable>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8931

Reviewed-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24150>
 2023-07-18 19:14:27 +00:00
Lionel Landwerlin
67a8b70c57 anv: hide exec_flags selection inside the i915 backend 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24073>
 2023-07-13 17:12:26 +00:00
José Roberto de Souza
2fa4fe2c85 anv: Fix some mismatches of canonical and regular addresses around anv_bo_vma_alloc_or_close() 
anv_vma_alloc() returns a canonical address, but explicit_address is a
regular address. This mismatch can potentially cause issues.

So here making bo->offset as always canonical address by converting it
in the explicit case and fixing the only caller that was caling
anv_bo_vma_alloc_or_close() with a canonical address.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23977>
 2023-07-04 15:24:04 +00:00
Lionel Landwerlin
2e8c0a33e7 anv: implement storage image depth query using descriptor buffer read 
The HW not returning the depth value we would like for
VK_EXT_sliced_view_of_3d, we can pull that value by reading the
RENDER_SURFACE_STATE struct directly.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23868>
 2023-06-29 10:32:20 +00:00
Sagar Ghuge
0b42a6c3b5 anv: Add CCS cache flush bits to anv_pipe_bits 
This will help us to flush the entries out of the CCS cache.

v2:
- Move enum value close to HW bits section (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
 2023-06-26 15:57:39 -07:00
Matt Turner
727335045d anv: Pipe anv_physical_device to anv_get_image_format_features2 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23776>
 2023-06-24 02:54:37 +00:00
Lionel Landwerlin
61496915c2 anv: tracking query buffer writes & query clears separately 
Clears should be flushed only on :
  - vkCmdBeginQuery*
  - vkCmdWriteTimestamp*
  - vkCmdWriteAccelerationStructuresPropertiesKHR
  - vkCmdCopyQueryPoolResults

Buffer writes should be flush only on :
  - vkCmdCopyQueryPoolResults

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
 2023-06-20 02:34:51 +00:00
Lionel Landwerlin
8c548700b6 anv: change the way we clear pending query bits 
Instead of having genX(emit_apply_pipe_flushes) doing the clearing,
ask genX(emit_apply_pipe_flushes) for the emitted bits and do the
clearing using a helper.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23675>
 2023-06-20 02:34:51 +00:00
Lionel Landwerlin
0e728ea7b0 anv: avoid private buffer allocations in vkGetDeviceImageMemoryRequirementsKHR 
The whole point of vkGetDeviceImageMemoryRequirementsKHR is to avoid
creating an image so we should completely avoid any allocation like
the private binding.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4075dd16ab ("anv: implement vkGetDeviceImageMemoryRequirementsKHR")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23720>
 2023-06-19 18:35:30 +03:00
Lionel Landwerlin
b3b12c2c27 anv: enable CmdCopyQueryPoolResults to use shader for copies 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:57 +03:00
Lionel Landwerlin
930e862af7 anv: add shaders for copying query results 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:57 +03:00
Lionel Landwerlin
4cee8ce7a5 anv: generalize internal kernel concept 
We'll add more of those kernels for other purposes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:57 +03:00
Lionel Landwerlin
dbbcd5c32c anv: factor out generation kernel dispatch into helper 
We would like to reuse this mechanism to dispatch different types of
internal shader. Those would replace some of the command streamer
commands we currently use.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:57 +03:00
Lionel Landwerlin
455a13fb7f anv: limit ANV_PIPE_RENDER_TARGET_BUFFER_WRITES to blorp operations using 3D 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23074>
 2023-06-14 09:43:56 +03:00
Rohan Garg
d0e0ba897f anv: split ANV_PIPE_RENDER_TARGET_BUFFER_WRITES for finer grained flushing 
split ANV_PIPE_RENDER_TARGET_BUFFER_WRITES into separate CS_STALL,
RT_FLUSH & TILE_FLUSH flags in order to have finer control over cache
coherency.

Tigerlake CS has it's own cache fetching directly from the memory controller,
so we need to do a tile flush to ensure the query data is visible.

This fixes test_resolve_non_issued_query_data in vkd3d on TGL.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Fixes: 3c4c18341a ("anv: narrow flushing of the render target to buffer writes")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23500>
 2023-06-12 14:46:44 +00:00
Emma Anholt
0be83bf1c4 anv: Drop unused ALL_GRAPHICS_LIB_FLAGS. 
copy and paste from radv.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22865>
 2023-06-06 09:03:09 +00:00
Felix DeGrood
5731ebac40 anv: override vendorID for Cyberpunk 2077 
A recent update to Cyberpunk 2077 enables XeSS code for Intel GPUs
which is causing the game to crash in the XeSS libraries.  As a
temporary work around, stop identifying as Intel for Cyberpunk so
XeSS falls back to the cross-vendor path.

References: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8860
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23271>
 2023-05-30 01:05:36 -07:00
Lionel Landwerlin
a8ef34bd31 anv: bring back the max number of sets to 8 
Not sure we bumped it to 32 for the right reasons. This generates more
push constant data and because we're not tighly packing our push
constant data this can generate more register pressure.

We could tightly pack things at the cost of some CPU cycles but only
for some stages. RT stages would have to retain the current "sparse"
version of push constants.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
1d24d0bdcc anv: track descriptor data size 
descriptor_stride includes multiple plane size, this new field tracks
just the data of one plane.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00
Lionel Landwerlin
739981e0ac anv: implement binding table emission for direct descriptors 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21645>
 2023-05-30 06:36:38 +00:00