Connor Abbott
66a275d50f
ir3: Fix shared reg delay
...
Based on computerator experiments, this is actually 6, including for
movmsk.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
b1b4ce7be2
ir3: Actually allow shared reg moves to be folded
...
I realized that shared registers were never actually getting folded,
even after adding them to valid_flags, because the move wasn't even
being considered.
I looked at the other uses of is_same_type_mov(), and they should be ok
with this.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
b32188cdba
ir3: Better valid flags for shared regs
...
Shared registers seem to use the same port as consts, so the same
restrictions for cat2/cat3 apply to them.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
590efd180b
ir3: Prevent propagating shared regs out of loops
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
394c597b1b
ir3: Handle unreachable blocks
...
This fixes a pre-existing bug in ir3, but it showed up even more due to
other changes in this series and it interacts with the logical/physical
CFG split. When both sides of an if end with a jump, a block may become
unreachable via the logical CFG, which can cause problems because it has
no predecessors to figure out the location of live-in non-shared
values. In this case we assume that nir_opt_if has removed any code in
these blocks and just skip processing live-ins for these blocks,
pretending that they aren't live.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
22ae91b284
ir3: Handle shared register liveness correctly
...
As explained in the comments added, we need to add extra edges to the
CFG which are ignored except for shared registers. This plumbs through
support for this.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
8176657ead
ir3/nir: Call nir_lower_subgroups
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
68b8b9e9e1
tu, ir3: Plumb through support for CS subgroup size/id
...
The way that the blob obtains the subgroup id on compute shaders is by
just and'ing gl_LocalInvocationIndex with 63, since it advertizes a
subgroupSize of 64. In order to support VK_EXT_subgroup_size_control and
expose a subgroupSize of 128, we'll have to do something a little more
flexible. Sometimes we have to fall back to a subgroup size of 64 due to
various constraints, and in that case we have to fake a subgroup size of
128 while actually using 64 under the hood, by just pretending that the
upper 64 invocations are all disabled. However when computing the
subgroup id we need to use the "real" subgroup size. For this purpose we
plumb through a driver param which exposes the real subgroup size. If
the user forces a particular subgroup size then we lower
load_subgroup_size in nir_lower_subgroups, otherwise we let it through,
and we assume when translating to ir3 that load_subgroup_size means
"give me the *actual* subgroup size that you decided in RA" and give you
the driver param.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
cc514bfa0e
nir: Add read_invocation_cond_ir3 intrinsic
...
On qualcomm, we have shared registers similar to SGPR's on AMD. However,
there is no readlane or readfirstlane primitive. shared registers can
only be written to when just one lane is active. This means that we have
to lower readInvocation(val, id) to something like:
if (gl_SubgroupInvocation == id) {
scalar_reg = val;
}
return scalar_reg;
However it's a bit difficult to actually get the value of
gl_SubgroupInvocation in the backend, because for compute it requires
some calculations and we don't have any CSE support in the backend. This
intrinsic lets us turn it into
"readInvocationCond(val, id == gl_SubgroupInvocation)" in NIR at which
point the backend code generation is a lot easier.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
e4e79de2a4
nir/subgroups: Support > 1 ballot components
...
Qualcomm has a mode with a subgroup size of 128, so just emitting larger
integer operations and then lowering them later isn't an option. This
makes the pass able to handle the lowering itself, so that we don't have
to go down to 64-thread wavefronts when ballots are used.
(The GLSL and legacy SPIR-V extensions only support a maximum of 64
threads, but I guess we'll cross that bridge when we come to it...)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Connor Abbott
90819b9b0e
nir/subgroups: Replace lower_vote_eq_to_ballot with lower_vote_eq
...
Lower it to a vote instead of a ballot. This was only used for AMD, and
in that case they're pretty much the same. However Qualcomm has a vote
builtin, which we want to use instead of ballots.
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Acked-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6752 >
2021-07-08 16:02:41 +00:00
Timur Kristóf
4fcb7e96b8
radv: Set parameter cache oversubscription according to the PC lines.
...
This matches how RadeonSI also sets this register.
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711 >
2021-07-08 16:54:29 +02:00
Timur Kristóf
32fafa43ae
radv: Allow enabling vertex grouping, fix NGG info with it disabled.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711 >
2021-07-08 16:54:29 +02:00
Timur Kristóf
fd64c18214
radv: Move radv_optimize_nir_algebraic to a separate function.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711 >
2021-07-08 16:54:29 +02:00
Timur Kristóf
00d11c2065
radv: Add last_vgt_api_stage and use it to simplify some code.
...
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com >
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11711 >
2021-07-08 16:54:26 +02:00
Mike Blumenkrantz
c6d677ce3d
zink: ensure sparse allocations aren't marked host-visible
...
Fixes: 5fee58bf59airlied@redhat.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11768 >
2021-07-08 13:26:41 +00:00
Samuel Pitoiset
74a221bcfd
aco: fix shared_atomic_comp_swap if the second source isn't a VGPR
...
Only VGPRs are valid with DS instructions.
Cc: 21.1 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11777 >
2021-07-08 10:41:14 +00:00
Simon Ser
3ee30d98ff
vulkan/wsi/wayland: handle dmabuf params allocation failure
...
Return VK_ERROR_OUT_OF_HOST_MEMORY if
zwp_linux_dmabuf_v1_create_params fails.
Signed-off-by: Simon Ser <contact@emersion.fr >
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11589 >
2021-07-08 12:05:28 +02:00
Simon Ser
7d711a10aa
vulkan/wsi/wayland: fix wsi_wl_image_init error code
...
If image->buffer cannot be allocated, the value returned by
wsi_create_native_image is returned. However, if we got that far,
that value is VK_SUCCESS.
Fix it and return VK_ERROR_OUT_OF_HOST_MEMORY.
Signed-off-by: Simon Ser <contact@emersion.fr >
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11589 >
2021-07-08 12:05:25 +02:00
Simon Ser
c45a1de5c6
vulkan/wsi/wayland: remove unnecessary wl_proxy_set_queue call
...
A wl_proxy inherits its queue from its parent.
display->dmabuf.wl_dmabuf already has its queue correctly set up,
so it's unnecessary to set it again on the child
zwp_linux_buffer_params_v1 proxy.
Signed-off-by: Simon Ser <contact@emersion.fr >
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11589 >
2021-07-08 12:05:20 +02:00
Simon Ser
589ea55732
vulkan/wsi/wayland: remove swapchain wl_drm wrapper
...
The sole purpose of this wl_proxy is to set the queue to
chain->display->queue. However, wl_proxy inherit their queue from
their parent, so the original wl_drm proxy already has its queue
set up properly (inherited from wl_registry).
Signed-off-by: Simon Ser <contact@emersion.fr >
Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11589 >
2021-07-08 12:05:09 +02:00
Qiang Yu
cf66ccf3f0
st/mesa: fix size miss match for some check
...
While we shrink some variable from "GLuint" to "ubyte",
need to update the check from "x != ~0U" to "x != 0xff" too.
This fixes the crash for SPECviewperf 13 benchmark medical
case.
Fixes: d947e3e2c8marek.olsak@amd.com >
Signed-off-by: Qiang Yu <yuq825@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11757 >
2021-07-08 01:21:51 +00:00
Emma Anholt
f2ae76e1a6
nir_to_tgsi: Declare immediates as float on non-native-ints hardware.
...
Makes the values more legible on i915g, and may keep us from tripping
asserts on nouveau's non-native-integer HW.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11744 >
2021-07-07 23:39:33 +00:00
Emma Anholt
b4ad947135
nir_to_tgsi: Run copy prop (and thus dce) after lower_bool_to_float.
...
Fixes some i915g instruction count failures by eliminating some MOVs from
translating b2f32s.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11744 >
2021-07-07 23:39:33 +00:00
Emma Anholt
2008ec8a43
i915g: Fix writemasking of SEQ/SNE/SSG.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11744 >
2021-07-07 23:39:33 +00:00
Heinrich Fink
a2c92da9a1
softpipe: add missing sentinel to debug option array
...
Add DEBUG_NAMED_VALUE_END to finalize debug option array (see
lp_screen.c). Otherwise debug_get_flags_option might attempt to read
debug_named_value::name at an offset and SIGSEGV.
Signed-off-by: Heinrich Fink <hfink@snap.com >
Fixes: 991def0edcmarcin.slusarz@intel.com >
Reviewed-by: Emil Velikov <emil.velikov@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11742 >
2021-07-07 23:27:34 +00:00
Erik Faye-Lund
b138d2f8a3
ci: fix source-deps for radv on windows
...
If we're giong to build RADV on Windows, we need to make sure we trigger
the build on all RADV-changes.
Fixes: d18563ea58bas@basnieuwenhuizen.nl >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11731 >
2021-07-07 21:04:23 +00:00
Kenneth Graunke
aefba29cd3
iris: Force device local memory for u_upload_mgr buffers
...
We try to place persistent/coherent buffers from the application in
system memory, because they want the CPU-GPU coherency.
However, our internal u_upload_mgr buffers are also flagged persistent +
coherent, but we absolutely want most of them in device local memory.
Mark had done this correctly in an earlier patch series, but I made a
mistake when refactoring things during upstreaming, and accidentally
put these in SMEM again. This fixes that mistake.
Tested-by: Luis Felipe Strano Moraes <luis.strano@intel.com >
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com >
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11681 >
2021-07-07 13:04:11 -07:00
Dylan Baker
4ef2594056
docs: Add calendar entries for 21.2 release candidates.
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11767 >
2021-07-07 12:23:11 -07:00
Roman Stratiienko
80f42e1d15
AOSP: Do not add '-Wl,--gc-sections' to the linker arguments
...
With '-Wl,--gc-sections' meson.build cc.has_function() will never fail,
providing wrong input to the build system.
Fixes: 8621bd8d5er.stratiienko@gmail.com >
Tested-by: Mauro Rossi <issor.oruam@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11637 >
2021-07-07 18:32:28 +00:00
Mike Blumenkrantz
97c19ac358
lavapipe: disable line rasterization ext
...
need to add some gallium hooks for line drawing mode before this can
be reliably supported
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11762 >
2021-07-07 14:32:16 +00:00
Mike Blumenkrantz
b67a4ba4ad
nir/format_convert: add ssa version of uint packing
...
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10619 >
2021-07-07 13:41:37 +00:00
Mike Blumenkrantz
c948251d2b
nir/format_convert: nir_shift -> nir_shift_imm
...
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10619 >
2021-07-07 13:41:37 +00:00
Alyssa Rosenzweig
d09948e006
panfrost: Remove unused midgard-pack.h includes
...
Now only included from the per-gen file.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
6b2fc9f718
panfrost: Remove pan_cmdstream.h
...
Now empty.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
b7975c3e90
panfrost: Move sample accessor to pan_cmdstream
...
Not really arch-dependent but technically uses GenXML. This is pretty
trivial anyway.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
ed56d8f7b7
panfrost: Clean up pan_cmdstream.h
...
We don't want other files accessing these functions except through the
vtables, since they will soon be architecture dependent.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
035434658e
panfrost: Use vtable for fragment descriptor functions
...
Arch dependent and not directly from Gallium.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
d4e3f4858c
panfrost: Move panfrost_emit_tile_map to pan_job
...
...where it's actually called. Saves us from using the vtable since this
isn't version-dependent.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
fa2d70aad8
panfrost: Move launch_grid to pan_cmdstream
...
Same issues apply as for draw_vbo.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
c08dd038dc
panfrost: Don't ralloc panfrost_blend_state
...
Pointless divergence from other CSO creates.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
25a879e5f9
panfrost: Move blend CSO to cmdstream/context
...
Create is hardware specifc, bind/delete/set_colour is not.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
5e992e17de
panfrost: Split out prepare_rsd into a vtbl
...
This needs to be per-gen, but the rest of the caller does not, so let's
split this out. iris makes extensive use of this vtbl pattern for cold
paths like this one.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
cf557909eb
panfrost: Move most CSO creates to pan_cmdstream.c
...
These need to be conditionally compiled per-generation.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Alyssa Rosenzweig
a13eb5fcc5
panfrost: Move draw_vbo to pan_cmdstream.c
...
This needs to be conditionally compiled per-generation.
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com >
Acked-by: Boris Brezillon <boris.brezillon@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11745 >
2021-07-07 13:19:35 +00:00
Samuel Pitoiset
265a900229
aco: fix emitting a16 for MIMG instructions on GFX10+
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11734 >
2021-07-07 14:44:13 +02:00
Samuel Pitoiset
ffdb980a12
aco: fix emitting d16 for MIMG instructions on GFX9+
...
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com >
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11734 >
2021-07-07 14:44:11 +02:00
Iago Toral Quiroga
b103855abc
v3dv: account for dst offset of copy query results operations
...
This fixes several CTS tests with this pattern:
dEQP-VK.query_pool.occlusion_query.copy_results*dstoffset
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11758 >
2021-07-07 10:41:06 +00:00
Corentin Noël
d080262524
ci: Bump virglrenderer
...
Use the latest commit from master branch
Signed-off-by: Corentin Noël <corentin.noel@collabora.com >
Reviewed-by: Gert Wollny <gert.wollny@collabora.com >
Reviewed-by: Rohan Garg <rohan.garg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11572 >
2021-07-07 10:04:10 +00:00
Corentin Noël
441b480a5f
ci: Re-enable virgl tesselation shader
...
Partially undoes c8c7450fc7corentin.noel@collabora.com >
Reviewed-by: Gert Wollny <gert.wollny@collabora.com >
Reviewed-by: Rohan Garg <rohan.garg@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11572 >
2021-07-07 10:04:10 +00:00
