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392 Commits

Author SHA1 Message Date
Samuel Pitoiset
291cfb1e41 radv: move lowering of FS outputs outside of ACO 
This enables lowering of FS outputs for RADV/LLVM.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6865>
 2020-09-29 14:44:05 +00:00
Samuel Pitoiset
4dae9e53f6 radv: call nir_io_add_const_offset_to_base for FS outputs 
The store_output of RADV/LLVM expects the const offset to be 0.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6865>
 2020-09-29 14:44:05 +00:00
Samuel Pitoiset
778fe02f3b radv/llvm: call nir_lower_io_to_vector with FS to fix array tests 
Fixes dEQP-VK.glsl.440.linkage.varying.component.frag_out.*.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6883>
 2020-09-29 10:00:50 +00:00
Samuel Pitoiset
1588644543 radv: lower deref operations for global memory for both backends 
To match ACO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5316>
 2020-09-29 07:24:35 +00:00
Kenneth Graunke
140f53e646 Revert "nir: replace lower_ffma and fuse_ffma with has_ffma" 
This reverts commit 939ddf3f67.

Intel has a separate pass for fusing FFMAs selectively.  We split
these flags in commit 1b72c31e1f and
the reasoning still stands.  The patch being reverted was just a
cleanup, so there should be no issue with reverting it.

Acked-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6849>
 2020-09-24 13:11:50 -07:00
Marek Olšák
939ddf3f67 nir: replace lower_ffma and fuse_ffma with has_ffma 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
 2020-09-24 12:29:11 +00:00
Marek Olšák
771aad3027 nir: split lower_ffma into lower_ffma16/32/64 
AMD wants different behavior for each bit size

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6756>
 2020-09-24 12:29:11 +00:00
Samuel Pitoiset
05b6612b4e radv: do not lower UBO/SSBO access to offsets 
Use nir_lower_explicit_io instead of lowering to offsets. Extra
(useless) additions are removed by lowering load_vulkan_descriptor
to vec2(src.x, 0).

fossils-db (Navi):
Totals from 18236 (13.21% of 138013) affected shaders:
SGPRs: 1172766 -> 1168278 (-0.38%); split: -0.89%, +0.50%
VGPRs: 940156 -> 952232 (+1.28%); split: -0.08%, +1.37%
SpillSGPRs: 30286 -> 31109 (+2.72%); split: -0.78%, +3.50%
SpillVGPRs: 1893 -> 1909 (+0.85%)
CodeSize: 87910396 -> 88113592 (+0.23%); split: -0.35%, +0.58%
Scratch: 819200 -> 823296 (+0.50%)
MaxWaves: 205535 -> 202102 (-1.67%); split: +0.05%, -1.72%
Instrs: 17052527 -> 17113484 (+0.36%); split: -0.32%, +0.67%
Cycles: 670794876 -> 669084540 (-0.25%); split: -0.38%, +0.13%
VMEM: 5274728 -> 5388556 (+2.16%); split: +3.10%, -0.94%
SMEM: 1196146 -> 1165850 (-2.53%); split: +2.06%, -4.60%
VClause: 381463 -> 399217 (+4.65%); split: -1.08%, +5.73%
SClause: 666216 -> 631135 (-5.27%); split: -5.44%, +0.18%
Copies: 1292720 -> 1289318 (-0.26%); split: -1.28%, +1.01%
Branches: 467336 -> 473028 (+1.22%); split: -0.67%, +1.89%
PreSGPRs: 766459 -> 772175 (+0.75%); split: -0.53%, +1.28%
PreVGPRs: 819746 -> 825327 (+0.68%); split: -0.05%, +0.73%

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6202>
 2020-09-21 15:37:11 +00:00
Marek Olšák
ac55b1a9a6 nir: get ffma support from NIR options for nir_lower_flrp 
This also fixes the inverted last parameter of nir_lower_flrp in most drivers.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6599>
 2020-09-04 17:06:22 +00:00
Samuel Pitoiset
ebf2576862 radv,aco: disable opts if VK_PIPELINE_CREATE_DISABLE_OPTIMIZATION_BIT 
Sounds useful to determine if ACO breaks a specific pipeline
because of various optimizations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6487>
 2020-09-04 06:59:45 +00:00
Marek Olšák
b7a6333ee4 amd/registers: switch to new generated register definitions 
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6423>
 2020-09-01 08:45:54 -04:00
Samuel Pitoiset
8301a43f27 radv: dump shader stats with VK_KHR_pipeline_executable_properties 
Instead of duplicating shader statistics in two different parts
in the driver. This also now reports the LDS size in bytes instead
of blocks with VK_AMD_shader_info.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6406>
 2020-08-31 09:42:25 +02:00
Samuel Pitoiset
0d8ae4ac15 radv: fix setting EXCP_EN for different shader stages 
While TRAP_PRESENT is always at the same place, EXCP_EN can be
different between shader stages. This sets it properly.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6452>
 2020-08-26 08:12:22 +02:00
Samuel Pitoiset
8e97a61cfb radv: enable the trap handler and configure the shader exceptions 
When TRAP_PRESENT is not enabled, all traps and exceptions are ignored.
Only EXCP_EN.mem_viol is currently supported because the other
exceptions have to be tested/validated first.

EXCP_EN.mem_viol is used to detect any sort of invalid memory
access like VM fault. When a memory violation is reported, the
hw jumps to the trap handler.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
 2020-08-24 11:08:24 +00:00
Samuel Pitoiset
8fd2f5c16d radv: add a small interface for creating the trap handler shader 
Similar to the GS copy shader except that NIR is unused because
the shader is written directly using ACO IR.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6384>
 2020-08-24 11:08:24 +00:00
Jesse Natalie
d3faac7a15 nir: Add options to nir_lower_compute_system_values to control compute ID base lowering 
If no options are provided, existing intrinsics are used.
If the lowering pass indicates there should be offsets used for global
invocation ID or work group ID, then those instructions are lowered to
include the offset.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
 2020-08-21 22:07:05 +00:00
Jesse Natalie
2e1df6a17f nir: Move compute system value lowering to a separate pass 
The actual variable -> intrinsic lowering stays where it is, but
ops which convert one intrinsic to be implemented in terms of
another have moved.

Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5891>
 2020-08-21 22:07:05 +00:00
Eric Anholt
b3c822a0a8 radv: Move nir_opt_shrink_vectors() into the opt loop. 
Upcoming changes to opt_undef will result in this pass doing more work and
generating vector MOVs that need re-scalarizing (which is inside of the
main opt loop).

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6054>
 2020-08-20 16:44:08 +00:00
Samuel Pitoiset
e901b901cb radv,aco: report ACO errors/warnings back via VK_EXT_debug_report 
To help developers.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6318>
 2020-08-20 08:15:08 +02:00
Connor Abbott
c77716294b radv: Use an input for the layer when lowering input attachments 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5719>
 2020-08-19 16:36:43 +00:00
Connor Abbott
d243bf1032 nir/lower_input_attachments: Support loading layer id as an input 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5719>
 2020-08-19 16:36:43 +00:00
Connor Abbott
e72895767b nir/lower_input_attachments: Refactor to use an options struct 
While we're at it, fold the details of how to load the fragcoord into
load_fragcoord().

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5719>
 2020-08-19 16:36:43 +00:00
Samuel Pitoiset
11781c0e49 radv: report the spirv-nir logs back to the application 
Via VK_EXT_debug_report to help debugging various SPIRV->NIR issues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6223>
 2020-08-10 13:19:21 +02:00
Samuel Pitoiset
bea8930468 radv: allow to force-enable LLVM internally for a specific shader stage 
For ACO debugging purposes, developers only.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6208>
 2020-08-07 07:45:06 +00:00
Rhys Perry
6e2e77557e radv/llvm: enable VK_KHR_memory_model 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6063>
 2020-08-05 09:45:54 +00:00
Rhys Perry
da38e99eda radv/aco: enable VK_KHR_memory_model 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6063>
 2020-08-05 09:45:54 +00:00
Eric Anholt
d8c2f896db amd: Swap from nir_opt_shrink_load() to nir_opt_shrink_vectors(). 
This should do much more trimming than shrink_load, and is a win on i965's
vec4 and nir-to-tgsi.  For scalar backends like this that don't need ALU
shrinking, it still gets more load intrinsics covered.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6050>
 2020-08-03 21:26:45 +00:00
Rhys Perry
cc3bc9493c radv: use scoped barriers 
fossil-db (LLVM, Navi):
Totals from 843 (0.62% of 135820) affected shaders:
SGPRs: 40456 -> 40480 (+0.06%); split: -0.10%, +0.16%
VGPRs: 39648 -> 39688 (+0.10%); split: -0.01%, +0.11%
CodeSize: 2936164 -> 2932508 (-0.12%); split: -0.21%, +0.09%
MaxWaves: 10828 -> 10827 (-0.01%)

fossil-db changes seem to be due to SPIR-V -> NIR emitting a workgroup
scope shared memory barrier instead of a group_memory_barrier.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5980>
 2020-07-29 17:57:13 +00:00
Jason Ekstrand
5c5555a862 nir: Add a find_variable_with_[driver_]location helper 
We've hand-rolled this loop 10 places and those are just the ones I
found easily.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
 2020-07-29 17:38:58 +00:00
Jason Ekstrand
caab46c1e9 nir: Take a shader and variable mode in nir_assign_io_var_locations 
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
 2020-07-29 17:38:58 +00:00
Jason Ekstrand
2956d53400 nir: Add nir_foreach_shader_in/out_variable helpers 
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5966>
 2020-07-29 17:38:57 +00:00
Rhys Perry
cd392a10d0 radv/aco,aco: use scoped barriers 
fossil-db (Navi):
Totals from 109 (0.08% of 132058) affected shaders:
SGPRs: 5416 -> 5424 (+0.15%)
CodeSize: 460500 -> 460508 (+0.00%); split: -0.07%, +0.07%
Instrs: 87278 -> 87272 (-0.01%); split: -0.09%, +0.09%
Cycles: 2241996 -> 2241852 (-0.01%); split: -0.04%, +0.04%
VMEM: 33868 -> 35539 (+4.93%); split: +5.14%, -0.20%
SMEM: 7183 -> 7184 (+0.01%); split: +0.36%, -0.35%
VClause: 1857 -> 1882 (+1.35%)
SClause: 2052 -> 2055 (+0.15%); split: -0.05%, +0.19%
Copies: 6377 -> 6380 (+0.05%); split: -0.02%, +0.06%
PreSGPRs: 3391 -> 3392 (+0.03%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4905>
 2020-07-28 16:56:34 +00:00
Daniel Schürmann
af0bc71015 radv: call radv_nir_lower_ycbcr_textures after first optimizations 
There might still be tex instructions with undef texture/sampler before
the first round of optimizations. No pipelinedb changes.

Fixes: 14a12b771d ('spirv: Rework our handling of images and samplers')
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6083>
 2020-07-27 10:03:20 +00:00
Samuel Pitoiset
a1b237b9ef radv: set LDS TCS size at shaders creation for GFX9+ 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5837>
 2020-07-24 12:30:03 +00:00
Jason Ekstrand
196db51fc2 anv,turnip,radv,clover,glspirv: Run nir_copy_prop before nir_opt_deref 
We're about to make the SPIR-V -> NIR path generate a bit more complex
SSA chains for certain derefs.  This will ensure we don't regress anyone
when we start making vec2's of derefs.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5278>
 2020-07-23 22:43:21 -05:00
Samuel Pitoiset
6c1108d25b radv: advertise VK_EXT_shader_atomic_float 
No hw support for float atomic add for buffer and (sparse) images.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6000>
 2020-07-22 10:20:58 +02:00
Rhys Perry
ec9920e72b radv: use lower_shuffle_to_swizzle_amd 
Affects a few shaders in Detroit: Become Human and Doom Eternal.

fossil-db (Navi):
Totals from 9 (0.01% of 135946) affected shaders:
CodeSize: 31188 -> 25096 (-19.53%)
Instrs: 6136 -> 4999 (-18.53%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5695>
 2020-07-13 14:11:50 +00:00
Samuel Pitoiset
7324977e42 radv: remove the secure compile support feature 
Steam was the only client of this feature and it seems no longer used.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5869>
 2020-07-13 08:56:44 +02:00
Samuel Pitoiset
26a48d8d35 radv: enable VK_AMD_shader_ballot on GFX6-7 with both compiler backends 
It gives +1-2 FPS with Doom Eternal on Pitcairn.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5659>
 2020-06-29 07:40:05 +00:00
Daniel Schürmann
db0afb3800 radv: change use_aco -> use_llvm 
We are about to make ACO the default backend.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5445>
 2020-06-25 15:16:28 +02:00
Samuel Pitoiset
a102896cff radv: lower 64-bit dfloor on GFX6 for fixing precision issues 
GFX6 doesn't support v_floor_f64 and the precision of v_fract_f64
which is used to implement 64-bit floor is less than what Vulkan
requires.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5609>
 2020-06-25 12:09:08 +00:00
Samuel Pitoiset
c84f11e7b6 radv: lower 64-bit drcp/dsqrt/drsq for fixing precision issues 
The hardware precision of v_rcp_f64, v_sqrt_f64 and v_rsq_f64
is less than what Vulkan requires.

This lowers using the Goldschmidt's algorithm to improve precision.

Fixes dEQP-VK.glsl.builtin.precision_double.* on both compiler
backends.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5609>
 2020-06-25 12:09:08 +00:00
Bas Nieuwenhuizen
aa35670fd0 radv: Make radv_alloc_shader_memory static. 
Just a cleanup.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
 2020-06-24 13:00:02 +00:00
Bas Nieuwenhuizen
a5cb88eea4 radv: Handle mmap failures. 
Which can happen if we have to many mmaps active in the process.

CC: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5578>
 2020-06-24 13:00:02 +00:00
Daniel Schürmann
f03a5f6cac radv/aco: implement logic64 instead of lowering 
to make use of the scalar ALU

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5527>
 2020-06-22 10:59:45 +00:00
Samuel Pitoiset
51fb3b09dc radv/aco: enable FP16 features/extensions on GFX9+ 
This enables shaderFloat16, VK_AMD_gpu_shader_half_float and
VK_AMD_gpu_shader_int16.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5347>
 2020-06-17 18:12:51 +02:00
Samuel Pitoiset
6f21995f98 radv: add new drirc option radv_enable_mrt_output_nan_fixup 
To replace NaN from FS with zeros to fix game bugs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
 2020-06-12 14:43:31 +02:00
Samuel Pitoiset
64f2d45c3b radv/aco: enable shaderInt8 and VK_KHR_shader_float16_int8 on GFX6-GFX7 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
 2020-06-09 21:25:38 +00:00
Samuel Pitoiset
be4dd6abd1 radv/aco: enable shaderInt16 on GFX6-GFX7 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
 2020-06-09 21:25:38 +00:00
Samuel Pitoiset
b3aee3aa23 radv/aco: enable 8-bit/16-bit storage on GFX6-GFX7 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5226>
 2020-06-09 21:25:38 +00:00