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Author SHA1 Message Date
Mike Blumenkrantz
e9864d7f39 llvmpipe: fix native vector width init 
this otherwise causes infinite loops in subgroup tests
and kills ci

Fixes: 4a056807bc ("gallivm: break out native vector width calc for reuse")

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22767>
 2023-04-29 03:36:19 +00:00
Dave Airlie
78ea6220a7 gallivm: reorder some texture/image members. 
This just aligns texture/image a bit more, shouldn't have much
affect, but might make things easier going forward.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
 2023-04-29 02:57:19 +00:00
Dave Airlie
d32aa2686c gallium: consolidate jit image types between draw/llvmpipe 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
 2023-04-29 02:57:19 +00:00
Dave Airlie
d3ed01d5eb gallivm: consolidate llvmpipe/draw sampler types. 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
 2023-04-29 02:57:19 +00:00
Dave Airlie
fd2902a1cf gallivm: consolidate draw/lp texture type. 
This just makes the type creation, struct and fields the same.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
 2023-04-29 02:57:19 +00:00
Dave Airlie
5f22f35590 lp_jit: use pipe max for the lp_jit texture levels. 
Align this with draw, so we the structs can be shared.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18265>
 2023-04-29 02:57:19 +00:00
Mike Blumenkrantz
af214c233b ci: disable all a306/a530/a630 jobs 
these have been dead and timing out all day

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22768>
 2023-04-28 22:27:04 -04:00
David Heidelberg
4f1716ebca ci/dzn: add flaking test 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22766>
 2023-04-28 22:35:21 +02:00
Ruijing Dong
b07f575a91 radeonsi/vcn: correct cropping for hevc case 
reason:

corect cropping calculation error.

If no cropping from the external, then it will
need to calculate cropping size internally, the
padding size on left and top should be zero.

Cc: mesa-stable
Fixes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7171
Reviewed-by: Thong Thai <thong.thai@amd.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22758>
 2023-04-28 18:07:42 +00:00
Samuel Pitoiset
faf27fa0a2 ac/nir: fix 8-bit/10-bit PS exports clamping 
This broke many tests on GFX6 (Pitcairn).

Fixes: c182154456 ("ac/nir: add ac_nir_lower_ps")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22756>
 2023-04-28 17:38:06 +00:00
Samuel Pitoiset
559d3b0f9a ac,radv,radeonsi: rename thread_trace to sqtt everywhere 
SQTT stands for SQ Thread Trace but it's shorter.
Note that environment variables aren't renamed because this might
break external applications.

This renames:
- ac_thread_trace_data to ac_sqtt (this is the main struct)
- ac_thread_trace_info to ac_sqtt_data_info
- ac_thread_trace_se to ac_sqtt_data_se
- ac_thread_trace to ac_sqtt_trace (this contains trace only)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
 2023-04-28 16:55:13 +00:00
Samuel Pitoiset
c2d312c401 ac/rgp: remove ac_thread_trace_data from ac_thread_trace 
We only need the RGP objects.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
 2023-04-28 16:55:13 +00:00
Samuel Pitoiset
3a19c36618 radv: do not abort when the SQTT buffer resize failed 
This seems to much. While we are at it, update the error msg.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
 2023-04-28 16:55:12 +00:00
Samuel Pitoiset
1202d8b0f9 ac/sqtt: add ac_sqtt_get_trace() helper 
It can be shared between RADV and RadeonSI. The only difference is
that RadeonSI can't auto-resize the SQTT BO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
 2023-04-28 16:55:12 +00:00
Samuel Pitoiset
d0a11c5b9e ac/sqtt: add ac_sqtt_se_is_disabled() helper 
It can be shared between RADV and RadeonSI.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22732>
 2023-04-28 16:55:12 +00:00
Matt Coster
a031bfdb9d pvr: Fixup format features 
Fixes: dEQP-VK.api.info.format_features.*

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22749>
 2023-04-28 15:37:59 +00:00
Matt Coster
37f202a54a pvr: Remove false assumption from pvr_write_draw_indirect_vdm_stream() 
Partially reverts: bd51305943
  pvr: Minor cleanup around pvr_emit_vdm_index_list()

Signed-off-by: Matt Coster <matt.coster@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22751>
 2023-04-28 15:21:08 +00:00
Eric Engestrom
5d11e50367 v3d: fix various minor issues in gen_pack_header.py 
Signed-off-by: Eric Engestrom <eric@igalia.com>
Acked-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22742>
 2023-04-28 14:53:10 +00:00
José Roberto de Souza
ec6d520eb9 iris: Allow shared scanout buffer to be placed in smem as well 
i915 and Xe kmd allows scanout to display of prime buffers placed
in smem.

Allowing shared and scanout bos to be placed in smem and lmem allows
the dma buf to work in some cases that only lmem is not enough.

Fixes: c10ff19704 ("iris: Place scanout buffers only into lmem for discrete GPUs")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8867
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8766
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Tested-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22665>
 2023-04-28 14:29:14 +00:00
Gert Wollny
8b52c9bab7 r600/sfn: Tie in address load splitting 
Add R600_NIR_DEBUG flag "noaddrsplit" to disable the behaviour and use the
old code path.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
4beefbe074 r600/sfn: prepare for emitting AR loads 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
5da9f08657 r600/sfn: factor out index loading for non-alu instructions 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
9f39531743 r600/sfn: Can't use an indirect array access as source to AR load 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
ae55668f77 r600/sfn: print failing block when scheduling fails 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
fdec18640a r600/sfn: Add more tests and update to use address splits 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
7fdb056277 r600/sfn: scheduled instructions are always ready 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
5d6b80bf5b r600/sfn: Fix copy-prop with array access 
We will have to check whether there is access to an array between the
instructions involved with the copy prop, so for now do not allow it.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
062188de16 r600/sfn: Override Array access handling in backend assembler 
Since we do thi sin the scheduler, there is no need to do this in the
backend again.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
e57643cf54 r600/sfn: Add handling for R600 indirect access alias handling 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
d955633319 r600/sfn: Add chip family to shader class 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
4d5859a524 r600/sfn: Start a new ALU CF on index use, not on index emission 
With that we can use the two IDX registers in parallel any might
save some CF instructions.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
557dc14944 r600/sfn: set CF force flag always when starting a new block 
There is no reason not to do this, because we only start a new
block if a new CF block must be started.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
e9e1806a2e r600/sfn: Add test for multiple index load 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
669aba02b0 r600/sfn: Don't copy-propagate indirect access into LDS instr 
Propagating array elements has the problem that we would have to
check whether the last load is not overwritten by an indirect store.

Indirect kcache buffer loads require starting a new CF, and we would
have to make sure that we don't split the LDS fetch/read group with
that, so don't do this.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
f4816d2a72 r600/sfn: Add more tests and update to use address splits 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
d617052db6 r600/sfn: take address loads into account when scheduling 
Also change a bit the instruction priority handling

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
8e1cf2d439 r600/sfn: Add function to check whether a group loads a index register 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
d21054b4bc r600/sfn: Add pass to split addess and index register loads 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
aca80216c1 r600/sfn: Add interface to count AR uses in ALU op 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
6e5327fef6 r600/sfn: Add a RW get function of IF predicate access 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
a7611bc093 r600/sfn: AR and IDX don't need the write flag, but haev a parent 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
cb8f12ded5 r600/sfn: Be able to track expected AR uses 
Because AR emission and AR use must be in the same CF we have to
be able to track whether all AR ready are emitted.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
af3d496253 r600/sfn: Update resource based instruction index mode check 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
e7b497fe87 r600/sfn: Add function to insert op in block 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
f464fc28d4 r600/sfn: add method to update indirect address to all instrution types 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
c3f60f77d6 r600/sfn: handle AR and IDX register in shader from string 
This is needed for testing

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
9a29301567 r600/sfn: Prepare uniforms and local arrays for better address handling 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:55 +00:00
Gert Wollny
fac4760c7d r600: Allow both index registers for all CF types 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:54 +00:00
Gert Wollny
db0752a809 r600/sfn: don't allow more than one AR per instruction 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:54 +00:00
Gert Wollny
886a3e5286 r600/sfn: Rework query for indirect access in alu instr and opt 
Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21347>
 2023-04-28 13:13:54 +00:00