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Author SHA1 Message Date
Samuel Pitoiset
15a3aff0f1 radv: use zero allocation for the device queues 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Samuel Pitoiset
5fa22f9fec radv: regroup all tools initialization in one helper 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Samuel Pitoiset
9d2751bbde radv: add radv_device_init_rmv() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Samuel Pitoiset
27a90f1f29 radv: add helpers for init/deinit device fault detection 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Samuel Pitoiset
351fba7ee3 radv: add radv_device_init_trap_handler() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Samuel Pitoiset
4ab6357c42 radv: simplify keeping shader info for GPU hangs debugging 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Samuel Pitoiset
fe09a6d72b radv: add helpers for init/deinit RGP 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Samuel Pitoiset
033084c912 radv: add helpers for init/deinit device memory cache 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Samuel Pitoiset
01339c6c93 radv: add radv_device_init_perf_counter() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Samuel Pitoiset
5657f21fcf radv: destroy the perf counter BO in radv_device_finish_perf_counter() 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30153>
 2024-07-15 09:34:42 +02:00
Josh Simmons
c68408d195 radv: Fix crash when using SQTT and NO_COMPUTE 
Signed-off-by: Josh Simmons <josh@nega.tv>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30177>
 2024-07-15 07:05:40 +00:00
Dave Airlie
d94a40fe08 anv/video: use correct offset for MPR row store scratch buffer. 
While playing with zink video, I found this was using the wrong
offset.

Fixes: 98c58a16ef ("anv: add initial video decode support for h264.")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30143>
 2024-07-15 01:05:18 +00:00
M Henning
e506955056 nir: Handle texop_*_nv in nir_tex_instr_is_query 
Fixes: aa1f00cf ("nir/gather_info: handle uses_fbfetch_output for texture operations")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11505
Tested-by: Thomas H.P. Andersen <phomes@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30166>
 2024-07-13 15:36:29 +00:00
Eric Engestrom
bfef1a4450 lvp+zink/ci: document a flake seen in a merge pipeline 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30175>
 2024-07-13 10:17:10 +00:00
Eric Engestrom
f0af09d1f6 turnip+zink/ci: add two more CS related flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30174>
 2024-07-13 09:55:17 +00:00
Eric Engestrom
89742437ef zink+nvk/ci: document regression from !30033 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30171>
 2024-07-13 11:30:09 +02:00
Eric Engestrom
92572501bb zink+nvk/ci: ascii-sort fails 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30171>
 2024-07-13 11:30:09 +02:00
Pierre-Eric Pelloux-Prayer
a04dc1a451 frontends/dri: add error logs to dri2_create_image_from_fd 
These silent failures are hard to track otherwise.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30159>
 2024-07-13 02:44:17 +00:00
Pierre-Eric Pelloux-Prayer
252485b0e2 radeonsi: fix si_get_dmabuf_modifier_planes for gfx12 
DCC_RETILE/DCC only makes sense if TILE_VERSION is lower than
AMD_FMT_MOD_TILE_VER_GFX12.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30159>
 2024-07-13 02:44:17 +00:00
Marek Olšák
0bb83a4060 ac/surface: finish display DCC for gfx12 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30114>
 2024-07-13 02:17:37 +00:00
Marek Olšák
46071c90c7 ac/surface: finish display DCC for gfx11.5 
Fixes: 6835257246 - amd/common: update DCC for gfx11.5

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30114>
 2024-07-13 02:17:37 +00:00
Marek Olšák
641ec0ae6e radeonsi/gfx12: fix compute register settings for global_atomic_ordered_add 
This is for future documentation/reference. It's likely radeonsi won't use
the atomic in compute shaders.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
acb3d5f132 radeonsi/gfx12: always set BO metadata, not just during export 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
462ef2d638 radeonsi: expose internal buffer bindings to compute shaders 
so that compute shaders can use SI_RING_SHADER_LOG.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
33d4e32545 radeonsi: implement nir_intrinsic_load_ssbo_address 
It was useful for testing the ordered_add_loop_gfx12_amd intrinsic.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
678d520162 as/llvm: add s_nops before the ordered add loop and s_wait_alu workaround 
The s_nops improve performance.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
bd8d20543d ac/llvm: fix inline assembly register constraints for ordered_add_loop_gfx12_amd 
This is only known to fix the assembly code when num_atomics > 6, which is
not currently used.

The VGPRs are reordered to simplify the clobber constraint.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
b617c3b06e ac/llvm: remove s_nop from ordered_add_loop_gfx12_amd 
This is faster.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
11272a8d82 ac/nir: remove sleeps from gfx12 streamout code 
This is faster.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
1b2cd628b8 nir: rename ordered_xfb_counter_add_gfx12_amd -> ordered_add_loop_gfx12_amd 
because it can also be used by compute.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30063>
 2024-07-13 01:32:48 +00:00
Marek Olšák
1fd43bca2c radeonsi: don't use CP DMA on GFX940 
It's been defeatured.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30115>
 2024-07-13 00:58:30 +00:00
Marek Olšák
b0205a92d9 radeonsi: replace shader SHA1 hashes with BLAKE3 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30110>
 2024-07-12 23:43:55 +00:00
Marek Olšák
090f27035d mesa: switch remaining shader functions from SHA1 to BLAKE3 
This fixes shader replacements, which require BLAKE3 now.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30110>
 2024-07-12 23:43:55 +00:00
Yiwei Zhang
c2d26a5c08 venus: simplify cached mem type emulation 
Instead of exposing the original cached memory type index and silently
remapping to the first coherent, we could directly append the cached bit
to the first coherent if coherent-cached doesn't exist.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30144>
 2024-07-12 21:28:15 +00:00
Mike Blumenkrantz
9e37ec9cb6 zink: use maint7 to capture venus driver and more accurately use workarounds 
maint7 provides the ability for virtualized drivers to pass along the
real driver's info, which allows for the enablement of per-driver workarounds
based on the underlying hardware

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29964>
 2024-07-12 21:04:02 +00:00
Mike Blumenkrantz
7e9d5c7b12 zink: hook up maintenance7 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29964>
 2024-07-12 21:04:02 +00:00
Mike Blumenkrantz
f9d451e837 zink: move all driverID checks to a helper function 
no functional changes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29964>
 2024-07-12 21:04:01 +00:00
Caio Oliveira
f48b3bee31 intel/brw: Split off assembler logic into library 
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30006>
 2024-07-12 19:34:23 +00:00
Faith Ekstrand
1f906f8715 zink/kopper: Set VK_COMPOSITE_ALPHA_OPAQUE_BIT when PresentOpaque is set 
This is required for EGL_EXT_present_opaque to work correctly.

Fixes: 8ade5588e3 ("zink: add kopper api")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11007
Reviewed-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30133>
 2024-07-12 15:22:44 +00:00
Mike Blumenkrantz
70b40fd2a0 zink: modify some buffer mapping behavior for buffer replacement srcs 
if the src for a replace_buffer call is mapped after replacement:
* avoid clearing access flags
* update valid range

the pointer access here is always safe because the only case in which
this scenario can occur is if tc is forced to sync immediately after
creating a replaceent buffer, and the replacement buffer's lifetime
will always be exceeded by the lifetime of the real buffer

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107>
 2024-07-12 12:29:47 +00:00
Mike Blumenkrantz
76da22bfc2 zink: track the "real" buffer range from replacement buffers 
when tc replaces a buffer in subdata, it may subsequently perform subdata calls
on the replacement if it is forced to sync during map, e.g.,
* bind_vbo(dst)
* draw
* subdata(src)
  * buffer replacement
  * map
  * tc sync
  * replace_buffer(dst, src)
  * memcpy <- broken
* draw

in this scenario, src may not have data at the time of replacement,
but it will get data soon after, and this buffer range is the real one

cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107>
 2024-07-12 12:29:47 +00:00
Mike Blumenkrantz
fa210726b6 zink: propagate valid buffer range to real buffer when mapping staging 
cc: mesa-stable

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30107>
 2024-07-12 12:29:47 +00:00
Danylo Piliaiev
7231eef630 tu: Have single Flush/Invalidate memory entrypoints 
Make all flush/invalidation logic kernel independent. The only
downside is that aarch32 would have cached non-coherent memory
disabled, but there are probably no users of it.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11468

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30131>
 2024-07-12 11:48:36 +00:00
Rohan Garg
5bb9c1cca9 anv: reuse existing macro to query for flushes 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30102>
 2024-07-12 10:50:12 +00:00
Eric Engestrom
29c4961b53 v3d/ci: include results of CL run in expectations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30134>
 2024-07-12 10:12:38 +00:00
Eric Engestrom
10af395f72 v3d/ci: include results of GL full run in expectations 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30134>
 2024-07-12 10:12:38 +00:00
Samuel Pitoiset
aa1f00cf5c nir/gather_info: handle uses_fbfetch_output for texture operations 
Like nir_texop_txf_ms.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30109>
 2024-07-12 09:33:51 +00:00
Samuel Pitoiset
0d0b949cd7 nir/gather_info: handle uses_fbfetch_output for sparse image loads 
Looks like this was missing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30109>
 2024-07-12 09:33:51 +00:00
Samuel Pitoiset
0a6852907d radv: fix marking RADV_DYNAMIC_COLOR_ATTACHMENT_MAP as dirty 
Due to the cmdbuf dirty split.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30119>
 2024-07-12 06:37:52 +00:00
Christian Gmeiner
87786a7a7e nak: Move imad late optimization to nir 
It is more or less just a code move, but I touched
is_only_used_by_iadd(..) to match the style of the other functions in
that file.

Signed-off-by: Christian Gmeiner <cgmeiner@igalia.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30099>
 2024-07-12 05:54:46 +00:00