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Author SHA1 Message Date
Eric Engestrom
ace54cc998 zink+turnip/ci: fix .zink-turnip-valve-manual-rules 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30929>
 2024-08-29 22:59:49 +00:00
Ian Romanick
f11a414645 nir/algebraic: Remove incorrect bfi of iand pattern 
The comment says, "This expands to (b & 3) & ~0xc which is (b & 3) &
3." This is not correct. ~0xc is actually 0xfffffff3.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Closes: #11695
Fixes: 1c7e35d4e0 ("nir/algebraic: Optimize some bit operation nonsense observed in some shaders")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30913>
 2024-08-29 22:21:55 +00:00
Vignesh Raman
0b010b357d ci: use v6.11-rc5 kernel for Mali V10 testing 
Set FORCE_KERNEL_TAG to v6.11-rc5 for Mali V10 testing.

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30883>
 2024-08-29 20:45:56 +00:00
Vignesh Raman
0d90f48b4f ci: enable Mali V10 testing 
Panthor support was added in Linux 6.10 and Panfrost V10
in Mesa, enabling new GPUs on Rockchip's RK3588. Add CI
jobs to test Mali V10.

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30883>
 2024-08-29 20:45:56 +00:00
Lionel Landwerlin
91b3ae71d7 iris: fix utrace compute end timestamp reads on Gfx20 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30923>
 2024-08-29 20:10:12 +00:00
Lionel Landwerlin
14d772d678 anv: fix utrace compute timestamp reads on Gfx20 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30923>
 2024-08-29 20:10:11 +00:00
Eric Engestrom
08ecfe8fa4 zink+nvk/ci: mark a ton of tests as fixed 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
 2024-08-29 19:21:52 +00:00
Eric Engestrom
f668b17da6 zink+nvk/ci: bump zink-nvk-ga106-valve timeout as more tests are being run 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
 2024-08-29 19:21:52 +00:00
Eric Engestrom
0cbd5bbb47 venus/ci: add flake and skip timing out test 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
 2024-08-29 19:21:52 +00:00
Eric Engestrom
71dbe29537 venus/ci: drop redundant flakes definitions 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
 2024-08-29 19:21:52 +00:00
Eric Engestrom
66bae75d47 radeonsi/ci: mark a bunch of subgroups tests as failing 
Fixes: 48a49c4e04 ("radeonsi: enable KHR_shader_subgroup")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
 2024-08-29 19:21:52 +00:00
Eric Engestrom
f05887a359 freedreno/ci: fix test timeout for a306_piglit 
Two issues:
1. this is a baremetal/fastboot job, not a lava job, so JOB_TIMEOUT does
   nothing and TEST_PHASE_TIMEOUT_MINUTES was erroneously removed
   instead.
2. the test timeout needs to be smaller than the job timeout, otherwise
   it can't do anything. 5min is the margin almost every job uses, so
   let's use that.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
 2024-08-29 19:21:52 +00:00
Eric Engestrom
8bfd2c083e Revert "freedreno/ci: drop TEST_PHASE_TIMEOUT_MINUTES that match the default value" 
This reverts commit 71787885e3.

The last version of the MR, the one that got merged, dropped the
bm/fastboot changes as they were causing issues; I should have dropped
this commit too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
 2024-08-29 19:21:52 +00:00
Eric Engestrom
39d6251141 radeonsi/ci: bump timeout for nightly job glcts-vangogh-valve 
It now takes ~45min (likely due to new failures being retried, itself
caused by KHR_shader_subgroup being added), but let's bump the timeout
a bit higher to avoid having to do this again soon.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
 2024-08-29 19:21:52 +00:00
Eric Engestrom
8ffb44a633 nvk/ci: mark -dEQP-VK.drm_format_modifiers.export_import* as fixed 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30928>
 2024-08-29 19:21:52 +00:00
Job Noorman
b967677d4e ir3/postsched: take WAR ss-delay into account 
Waiting for WAR hazards needs (ss) just like waiting for ss-producers.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30611>
 2024-08-29 18:44:14 +00:00
Job Noorman
bb13f30db2 ir3: add is_war_hazard_producer helper 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30611>
 2024-08-29 18:44:14 +00:00
Job Noorman
ce5c0c21c4 ir3/legalize: don't add (ss) for WAR hazards synced with (sy) 
(ss) can be used to resolve all tex/sfu/mem WAR hazards. However, when
the reader is a sy-producer, they can also be resolved using (sy). Track
those cases separately and make sure we don't add (ss) when the reader
has already been synced using (sy).

For example, take a sequence like this:
sam rd, rs, ...
(sy)...
(ss)write rs

Before this commit, we would add the (ss) to resolve the WAR hazard
between the consumer (sam) and the writer of rs. However, the consumer
of rs has already been synced using (sy) so has definitely consumed rs.
This commit ensures the unnecessary (ss) for the write is not added
anymore.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30611>
 2024-08-29 18:44:14 +00:00
Job Noorman
6a19274e3d ir3/legalize: add needs_ss_war helper 
The condition was getting unwieldy and we will need to add more to it in
the next commit.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30611>
 2024-08-29 18:44:14 +00:00
Job Noorman
6e16dc60a1 ir3: add assert to detect getting reg file of const/imm 
ir3_reg_file_offset should only be called for actual registers, not for
const or immediate values. However, this did happens accidentally for
tracking WAR hazards in ir3_legalize. While that case has been fixed,
better to prevent such cases in the future.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30611>
 2024-08-29 18:44:14 +00:00
Job Noorman
523a0e2e39 ir3/legalize: don't add WAR dependencies for const/imm regs 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30611>
 2024-08-29 18:44:14 +00:00
Job Noorman
7cc24aa506 ir3: fix recognizing const/imm registers as a0 
Fixes: 72bb4d79dc ("ir3/legalize: handle scalar ALU WAR hazards for a0.x")
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30611>
 2024-08-29 18:44:14 +00:00
Daniel Stone
43d65e0ff0 ci: Make per-build dependencies optional 
Sometimes not all of the jobs execute. For instance, Windows build jobs
will not trigger on AMD-only MRs. Use the 'optional' keyword to ignore
jobs which don't exist in our pipeline.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Fixes: 310e3bb026 ("ci: do not start build-only jobs until the critical build-for-tests jobs are done")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30926>
 2024-08-29 17:50:16 +00:00
Roland Scheidegger
9b717596b2 llvmpipe: Fix type mismatch when storing residency info 
The storage allocated was always the same for both the ordinary texture
result data as well as the residency info. However, the former can be
float vector, whereas the latter is always int vector.
At least some llvm versions/builds will assert on this mismatch when
storing the data.
While here, also cut unnecessary zero initialization (lp_build_alloca()
already explicitly does this).

Fixes: 6168317b84 (lavapipe: Implement shaderResourceResidency)

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Reviewed-by: Brian Paul <brian.paul@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30878>
 2024-08-29 16:53:45 +00:00
Valentine Burley
7fb7fa794c util: Remove Vulkan-only formats from get_plane_width/height 
This reverts commit 3316bc3e88.

These formats were only used by RADV and are no longer needed as we can get the plane dimensions
from the YCbCr table.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30899>
 2024-08-29 15:57:52 +00:00
Valentine Burley
1ae09c4e79 tu: Use vk_format_get_plane_count for tu6_plane_count 
This change simplifies the code by avoiding special casing, making it easier to add support
for formats like P010 with minimal changes.

Inline it on one place where where the difference for VK_FORMAT_D32_SFLOAT_S8_UINT doesn't matter.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30899>
 2024-08-29 15:57:51 +00:00
Valentine Burley
29d1cd6e8b tu: Use vk_format_get_plane_width/height to get the plane dimensions 
This change simplifies the code by avoiding special casing, making it easier to add support
for formats like P010 with minimal changes.

Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30899>
 2024-08-29 15:57:51 +00:00
Valentine Burley
b37e06fd58 vulkan, radv: Add new common vk_format_get_plane_width/height helpers 
Add new vk_format_get_plane_width/height helpers using ycbcr_info and use it to
replace RADV's ones which relied on util_format_get_plane_width/height.

We already have this data in the YCbCr table, so this avoids having the maintain the list
of pipe formats in util_format_get_plane_width/height.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30899>
 2024-08-29 15:57:51 +00:00
Mike Blumenkrantz
7d0a631f20 llvmpipe: export dmabuf caps for kms_swrast 
kms_swrast can import and export dumb buffers, so this cap must be
exported in order for frontends to correctly detect support

Reviewed-by: Lucas Fryzek <lfryzek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30893>
 2024-08-29 15:27:56 +00:00
Eric Engestrom
310e3bb026 ci: do not start build-only jobs until the critical build-for-tests jobs are done 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30808>
 2024-08-29 14:33:15 +00:00
Eric Engestrom
27fba5ccdf ci: merge build-x86_64 & build-misc 
The split doesn't really make sense anymore, and with the next commit,
the build-misc jobs would get delayed until the build-x86_64 jobs are
done, which is undesirable.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30808>
 2024-08-29 14:33:15 +00:00
Eric Engestrom
c9e847e51f ci: move build jobs that are used by tests to an earlier stage 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30808>
 2024-08-29 14:33:15 +00:00
Tapani Pälli
096acf8c0c anv: change existing ICL workaround to depend on BLEND_STATE 
Commit f900b763b1 we started to dirty MS as WM changes. However
later on things changed with eebb6cd236, we need to dirty with
BLEND_STATE now.

Fixes: eebb6cd236 ("anv: stop using 3DSTATE_WM::ForceThreadDispatchEnable")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30920>
 2024-08-29 13:58:08 +00:00
Rohan Garg
51e05c2844 iris,anv: simplify and inline sampler count calculations 
Use the CLAMP macro to clamp the value and simplify the sampler count
encoding.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30922>
 2024-08-29 11:49:56 +00:00
Rohan Garg
32f606486f anv: prefetch samplers when dispatching compute shaders 
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30922>
 2024-08-29 11:49:56 +00:00
Timothy Arceri
bb426b7f3c nir/tests: add basic terminator merge test 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30862>
 2024-08-29 10:26:30 +00:00
Timothy Arceri
85741c6a15 nir/tests: make add_loop_terminators more flexible 
Here we update the helper to have an option to add the break to the else
blocks of the terminators.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30862>
 2024-08-29 10:26:30 +00:00
Daniel Schürmann
51bb0e68b3 nir/opt_if: merge IFs which have phis between them 
The phi-uses are rewritten on each side of the following if-stmt,
so that register pressure is kept the same.

Totals from 719 (0.91% of 79395) affected shaders: (Navi31)
MaxWaves: 18531 -> 18527 (-0.02%); split: +0.02%, -0.04%
Instrs: 4683616 -> 4621920 (-1.32%); split: -1.32%, +0.00%
CodeSize: 24154608 -> 23811472 (-1.42%); split: -1.42%, +0.00%
VGPRs: 46020 -> 46140 (+0.26%); split: -0.05%, +0.31%
SpillSGPRs: 1134 -> 1107 (-2.38%)
SpillVGPRs: 2221 -> 2202 (-0.86%)
Scratch: 603648 -> 602624 (-0.17%)
Latency: 30355976 -> 29516199 (-2.77%); split: -2.77%, +0.01%
InvThroughput: 7017283 -> 6878583 (-1.98%); split: -2.00%, +0.03%
VClause: 119826 -> 113392 (-5.37%); split: -5.37%, +0.00%
SClause: 100380 -> 93516 (-6.84%); split: -6.85%, +0.01%
Copies: 360589 -> 359154 (-0.40%); split: -1.13%, +0.73%
Branches: 146438 -> 138623 (-5.34%); split: -5.37%, +0.03%
PreSGPRs: 38237 -> 38317 (+0.21%); split: -0.52%, +0.72%
PreVGPRs: 37745 -> 37742 (-0.01%); split: -0.05%, +0.04%
VALU: 2594909 -> 2593667 (-0.05%); split: -0.12%, +0.07%
SALU: 572636 -> 554587 (-3.15%); split: -3.19%, +0.04%
VMEM: 203188 -> 201030 (-1.06%)
SMEM: 135731 -> 128683 (-5.19%)
VOPD: 1978 -> 1982 (+0.20%)

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7710>
 2024-08-29 09:42:55 +00:00
Daniel Schürmann
37881801c1 nir/opt_if: optimize phis between similar IFs 
This small optimization targets phis between two IF statements with
the same condition. If the phi dst is only used on one branch leg,
the 'unused' phi source gets replaced with undef.

Totals from 1773 (2.23% of 79395) affected shaders: (Navi31)
Instrs: 6546338 -> 6539039 (-0.11%); split: -0.11%, +0.00%
CodeSize: 34819124 -> 34780660 (-0.11%); split: -0.11%, +0.00%
VGPRs: 92100 -> 92052 (-0.05%); split: -0.07%, +0.01%
SpillVGPRs: 2211 -> 2206 (-0.23%)
Latency: 51621404 -> 51620966 (-0.00%); split: -0.03%, +0.03%
InvThroughput: 7907110 -> 7905382 (-0.02%); split: -0.05%, +0.03%
VClause: 159268 -> 159273 (+0.00%); split: -0.00%, +0.01%
SClause: 180166 -> 180155 (-0.01%)
Copies: 559867 -> 553966 (-1.05%); split: -1.07%, +0.01%
Branches: 237327 -> 236366 (-0.40%); split: -0.41%, +0.00%
PreSGPRs: 81128 -> 81116 (-0.01%); split: -0.02%, +0.01%
PreVGPRs: 74264 -> 74245 (-0.03%)
VALU: 3547408 -> 3541257 (-0.17%); split: -0.18%, +0.00%
SALU: 824426 -> 824104 (-0.04%); split: -0.04%, +0.00%
VMEM: 265009 -> 265003 (-0.00%)
SMEM: 235766 -> 235760 (-0.00%)
VOPD: 1853 -> 1839 (-0.76%)

Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7710>
 2024-08-29 09:42:55 +00:00
Daniel Schürmann
50d416fe89 nir: add nir_block *nir_src_get_block(src) helper 
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7710>
 2024-08-29 09:42:55 +00:00
Juan A. Suarez Romero
12ff1b683e Revert "ci: take igalia farm offline" 
This reverts commit 4246c88c5e.

Farm is back again.

Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30917>
 2024-08-29 09:13:26 +00:00
Konstantin
893c93a27a meson: Allow building lavapipe without specifying llvmpipe 
Avoids compiling glsl/opengl/... support when testing only lavapipe.

Reviewed-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30423>
 2024-08-29 10:17:52 +02:00
Konstantin Seurer
0fc3c52e43 nir/opt_loop: Fix handling else-breaks in merge_terminators 
If both breaks are in the else branch, we have to use iand.

Fixes: 9995f33 ("nir: add merge loop terminators optimisation")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11726
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30850>
 2024-08-29 05:49:35 +00:00
Tapani Pälli
44e1cf2748 anv: set correct miplevel for anv_image_hiz_op 
Fixes: 5efecc9782 ("anv: Enable HiZ on multi-LOD depth buffers.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11787
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30892>
 2024-08-29 04:50:44 +00:00
Faith Ekstrand
5f402f3aae nvk: Hash minSampleShading in nvk_hash_graphics_state() 
We put minSampleShading in the nvk_shader and [de]serialize that to/from
the binary so it also needs to go in the hash.  We could also plumb the
pipeline state through to the deserialize callback but that's quite a
stretch and this literally only affects minSampleShading which is a
rarely used feature.

Fixes: 813b253939 ("nvk: Switch to shader objects")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30914>
 2024-08-29 04:27:43 +00:00
Faith Ekstrand
5b69215ec2 nvk: Use 4 bits per value for the anti alias values 
They should always fit in 3 bits but the masks we use set 4 bits at a
time so it's probably good to be consistent.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30914>
 2024-08-29 04:27:43 +00:00
Faith Ekstrand
6e63a79267 nvk: Fix a typo in a comment 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30914>
 2024-08-29 04:27:43 +00:00
Eric Engestrom
615d6b0e1a docs: add sha sum for 24.1.7 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30910>
 2024-08-29 04:20:30 +00:00
Eric Engestrom
8503dbd0d2 docs: update calendar for 24.1.7 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30910>
 2024-08-29 04:20:30 +00:00
Eric Engestrom
e78ecfc9a4 docs: add release notes for 24.1.7 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30910>
 2024-08-29 04:20:30 +00:00